PI49FCT3805 PERICOM | Alldatasheet
Document overview
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Technical content
Features
3.3V version of PI49FCT805/806 Extremely low output skew: 0.5ns Monitor ouput pin Clock busing wih 3-state control TTL inpu and CMOS output compatible Industrial operation at40°C to 85°C Extremely low static power (1mW, typ.) Hysteresis on all inputs Packages available: 20-pin 300-mil wide SOIC (S) 20-pin 150-mil wide QSOP (Q) 20-pin 209-mil wide SSOP (H) Device models available on request
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1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 PI49FCT3805/3806 3.3V Fast CMOS Buffer/Clock Driver Capacitance (TA = 25°C, f = 1 MHz) Parameters(1) Description Test Conditions Typ Max. Units C IN Input Capacitance V IN = 0V 4.5 6.0 pF C OUT Output Capacitance V OUT = 0V 5.5 8.0 pF Product Pin Description Pin Name Description OE A, OEB 3-State Output Enable Inputs (Active LOW) INA, INB Clock Inputs OA N, OBN Clock Outputs MON Monitor Output GND Ground V CC Power VCCA OA 0 OA 1 OA 2 GND A OA 3 OA 4 GND Q OE A INA VCCB OB 0 OB 1 OB 2 GND B OB 3 OB 4 MON OE B INB 20-Pin H20 Q20 S20 PI49FCT3805 Product Pin Configuration Inputs Outputs OE A , OEB INA , INB OA N , OBN MON LL L L LH H H HL Z L HH Z H PI49FCT3805 Truth Table(1) Note: 1. H = High Voltage Level L = Low Voltage Level Z = High Impedance Inputs Outputs OE A , OEB INA , INB OA N , OBN MON LL H H LH L L HL Z H HH Z L PI49FCT3806 Truth Table(1) Note: 1. H = High Voltage Level L = Low Voltage Level Z = High Impedance VCCA OA 0 OA 1 OA 2 GND A OA 3 OA 4 GND Q OE A INA VCCB OB 0 OB 1 OB 2 GND B OB 3 OB 4 MON OE B INB 20-Pin H20 Q20 S20 PI49FCT3806 Product Pin Configuration Note: 1. This parameter is determined by device characterization but is not production tested.
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1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 PI49FCT3805/3806 3.3V Fast CMOS Buffer/Clock Driver Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other condi- tions above those indicated in the operational sec- tions of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 3.3V, +25°C ambient and maximum loading. 3. VOH = VCC – 0.6V at rated current. 4. This parameter is determined by device characterization but is not production tested. 5. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. Operating Range Ambient Temperature = –40°C to +85°C, Vcc = 3.3V ±0.3V lobmySn oitpircseDs noitidnoCtseT )1( .niM. pyT )2( .xaMs tinU V HO tuptuOH GIHe gatlovV CC V,V5.1= NI V= HI roV LI I HO Am1.0= I HO Am8= V CC 2.0- 4.2 )3( 0.3 V V LO egatlovWOLtuptuOV CC V,V5.1= NI V= HI roV LI I LO Am1.0= I LO Am61= I LO Am42= 2.0 3.0 2.0 4.0 5.0 V HI tupnIH GIHe gatlovl evelHGIHcigoLdeetnarauGs niPtupnI 0.2 5 .5 V LI egatlovWOLtupnIl evelWOLcigoLdeetnarauGs niPtupnI 5.0 8 .0 I HI tupnIH GIHt nerrucV CC .xaM=V NI V= CC )sniPtupnI( 1 mA I LI tnerrucWOLtupnIV CC .xaM=V NI tupnI(DNG= )sniPO/I& 1 I HZO ecnadepmihgiH tnerruCtuptuO V CC xaM= )sniPtuptuOetatS-3( V TUO V= CC V TUO DNG= 1I LZO V KI egatlovedoidpmalCV CC I,.niM= NI Am81= 7 .02 .1V I HDO HGIHtuptuOt nerrucV CC V,V3.3= NI V= HI Vro ,LI V TUO V5.1= )4( 530 60 11 AmI LDO WOLtuptuOt nerrucV CC V,V3.3= NI V= HI Vro ,LI V TUO V5.1= )4( 050 90 02 I SO tnerructiucrictrohS )5( V CC V,.xaM= TUO DNG= )5( 065 310 42 VH siseretsyHtupnI 0 51 V m
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1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 PI49FCT3805/3806 3.3V Fast CMOS Buffer/Clock Driver Power Supply Characteristics Parameters Description Test Conditions(1) Min. Typ (2) Max. Units ICC Quiescent Power V CC = Max. V IN = GND or VCC —33 0 µ A Supply Current DICC Supply Current per V CC = Max. V IN = VCC – 0.6V(3) — 2.0 300 µA Inputs @ TTL HIGH ICCD Supply Current per V CC = Max., V IN = VCC — 0.08 0.16 mA/ Input per MHz(4) Outputs Open V IN = GND MH Z OE A or OEB = GND Per Output Toggling 50% Duty Cycle IC Total Power Supply V CC = Max., V IN = VCC — 3.3 9.0 (5) Current(6) Outputs Open V IN = GND fO = 10 MHZ 50% Duty Cycle V IN = VCC – 0.6V — 3.3 10.0(5) OE A or OEB = GND V IN = GND Mon. Outputs Toggling mA V CC = Max., V IN = VCC — 1.8 6.0 (5) Outputs Open V IN = GND fO = 2.5 MHZ 50% Duty Cycle V IN = VCC – 0.6V — 1.8 7.0 (5) OE A or OEB = GND V IN = GND Eleven Outputs Toggling Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device. 2. Typical values are at V CC = 3.3V, +25°C ambient. 3. Per TTL driven input (VIN = VCC 0.6V); all other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the I C formula. These limits are guaranteed but not tested. 6. I C = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + DICC DHNT + ICCD (fONO) ICC = Quiescent Current DICC = Power Supply Current for a TTL High Input (VIN = VCC 0.6V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fO = Output Frequency NO = Number of Outputs at fO All currents are in milliamps and all frequencies are in megahertz.
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1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 PI49FCT3805/3806 3.3V Fast CMOS Buffer/Clock Driver Switching Characteristics over Operating Range Tests Circuits for All Outputs(1) , except for FIN >100 MHz Test Switch Disable LOW 6V Enable LOW Disable HIGH GND Enable HIGH All Other Inputs Open Switch Position DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. sretemaraPn oitpircseDn oitidnoC )1( 6083/5083A 6083/A5083B 6083/B5083C 6083/C5083 stinU.moC. moC. moC. moC .niMx aM. niMx aM. niMx aM. niMx aM t HLP t LHP yaleDnoitagaporP NI A AOot ,N NI B BOot N CL Fp05= RL 005= W sn t HZP t LZP emiTelbanEtuptuO EO A AOot N EO, B BOot N t ZHP t ZLP emiTelbasiDtuptuO EO A AOot N EO, B BOot N t )o(KS )3( fostuptuoowtneewtebwekS )noitisnartemaS(egakcapemas ¾ 7.0 ¾ 7.0 ¾ 5.0 ¾ 5.0 t )p(KS )3( etisopponeewtebwekS t(noitisnart LHP t- HLP ehtfo) tuptuoemas ¾ 0.1 ¾ 7.0 ¾ 5.0 ¾ 5.0 t )t(KS )3( fostuptuoowtneewtebwekS emastaegakcaptnereffid )noitisnartemaS(erutarepmet ¾ 5.1 ¾ 2.1 ¾ 0.1 ¾ 8.0 /K50/K75/K6C/K73/K65 /K47/K65/K6E/K65/K72/K61/K74/K6F/K72 /K44/K2E/K55/K2E/K54/K2E /K56/K49/K4E /K52 /K54 /K56/K4F/K55/K54 /K43 /K4C /K35/K30/K30W /K35/K30/K30W /K35/K30/K70/K46 /K56/K43/K43 /K36/K2E/K30/K56 Note: 1. See test circuit and waveforms 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. Skew measured at worst cast temperature (max. temp).
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1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 PI49FCT3805/3806 3.3V Fast CMOS Buffer/Clock Driver SWITCHING WAVEFORMS Output Skew tSK(o) Pulse Skew – tSK (p) Package Skew tSK(t) Propagation Delay Enable and Disable Times Input tPLH 1.5V Output VOH 1.5V VOL tPHL Input tPLH 1.5V Output VOH 1.5V VOL tPHL tSK(p) = | tPHL – tPLH | Input tPLHx 1.5V Ox VOH 1.5V VOL tPHLx tSK(o) Oy VOH 1.5V VOL tSK(o) tPLHy tPHLy tSK(o) = | tPLHy – tPLHx | or | tPHLy – tPHLx | Input tPLH1 1.5V Package 1 Output VOH 1.5V VOL tPHL1 tSK(t) Package 2 Output VOH 1.5V VOL tSK(t) tPLH2 tPHL2 tSK(t) = | tPLH2 – tPLH1 | or | tPHL2 – tPHL1 | /K74 /K50/K5A/K4C /K4F/K45 /K31/K2E/K35/K56 /K30/K56 /K33/K56 /K31/K2E/K35/K56 /K33/K2E/K30/K56 /K30/K56 /K31/K2E/K35/K56 /K74 /K50/K4C/K5A /K56/K4F/K4C /K33/K2E/K30/K56 /K30/K56 /K74 /K50/K5A/K48 /K74 /K50/K48/K5A /K30/K2E/K33/K56 /K30/K2E/K33/K56 /K4F/K75/K74/K70/K75/K74 /K4E/K6F/K72/K6D/K61/K6C/K6C/K79 /K4C/K6F/K77 /K4F/K75/K74/K70/K75/K74 /K4E/K6F/K72/K6D/K61/K6C/K6C/K79 /K48/K69/K67/K68 /K53/K77/K69/K74/K63/K68 /K43/K6C/K6F/K73/K65/K64 /K53/K77/K69/K74/K63/K68 /K4F/K70/K65/K6E /K56/K4F/K48 /K45/K6E/K61/K62/K6C/K65 /K44/K69/K73/K61/K62/K6C/K65
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1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 PI49FCT3805/3806 3.3V Fast CMOS Buffer/Clock Driver edoCgniredrO epyTegakcaP gnitaRe toN H5083TCF94IP H6083TCF94IP POSSlim902nip-02 lairtsudnI gnihctiwSotrefeR citsiretcarahC deepSrofelbaT scitsiretcarahCedarG Q5083TCF94IP Q6083TCF94IP POSQlim051nip-02 S5083TCF94IP S6083TCF94IP CISSlim003nip-02 HA5083TCF94IP HA6083TCF94IP POSSlim902nip-02 QA5083TCF94IP QA6083TCF94IP POSQlim051nip-02 SA5083TCF94IP SA6083TCF94IP CISSlim003nip-02 HB5083TCF94IP HB6083TCF94IP POSSlim902nip-02 QB5083TCF94IP QB6083TCF94IP POSQlim051nip-02 SB5083TCF94IP SB6083TCF94IP CISSlim003nip-02 HC5083TCF94IP HC6083TCF94IP POSSlim902nip-02 QC5083TCF94IP QC6083TCF94IP POSQlim051nip-02 SC5083TCF94IP SC6083TCF94IP CISSlim003nip-02
Ordering Information
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1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 PI49FCT3805/3806 3.3V Fast CMOS Buffer/Clock Driver SEATING PLANE .050 BSC 0-8˚ .2914 .2992 X.XX X.XX DENOTES CONTROLLING DIMENSIONS IN MILLIMETERS 7.40 7.60.496 .511 12.60 12.99 1.27 .0926 .1043 2.35 2.65 .394 .419 10.00 10.65 .0040 .0118 0.10 0.30 .013 .020 0.33 0.51 .010 .029 0.254 0.737 .0091 .0125 0.23 0.32 0.41 1.27 .016 .050 x 45˚ .020 .030 0.508 0.762 REF .337 .344 .053 .069 .004 .010 SEATING PLANE .025 BSC .007 .010 .228 .244 .150 .157 .016 .050 X.XX X.XX DENOTES DIMENSIONS IN MILLIMETERS 0.635 8.56 8.74 1.35 1.75 5.79 6.19 0.41 1.27 0.101 0.254 .008 .012 0.203 0.305 3.81 3.99 0.178 0.254 .058 1.47 .015 x 45˚ 0.38 REF 20-Pin SOIC Package Drawing (S) 20-Pin QSOP Package Drawing (Q)
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1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 PI49FCT3805/3806 3.3V Fast CMOS Buffer/Clock Driver Pericom Semiconductor Corporation 2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com 20-Pin SSOP Package Drawing (H) .272 .295 .078 .002 SEATING PLANE .0098 Max. .0256 BSC .022 .037 .004 .009.291 .322 .197 .220 0.25 X.XX X.XX DENOTES DIMENSIONS IN MILLIMETERS 0.050 7.40 8.20 0.55 0.95 0.09 0.25 5.00 5.60 2.00 6.90 7.50 0.65 Max Min