PI3VDP3212 PERICOM | Alldatasheet
Document overview
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Technical content
Features
ÎÎ 2-lane, 1:2 mux/demux that will support RBR, HBR1, or HBR2 ÎÎ 1-channel 1:2 mux/demux for DP_HPD signal ÎÎ 1-differential channel 1:2 mux/demux for DP_Aux signal with support up to 720Mbps ÎÎ Insertion Loss for high speed channels @ 2.7 GHz: -1.7dB ÎÎ -3dB Bandwidth for high speed channels: 4.7GHz ÎÎ Return loss for high speed channels @ 2.7GHz: -16dB ÎÎ Low Bit-to-Bit Skew , 7ps max (between '+' and '-' bits) ÎÎ Low Crosstalk for high speed channels: -25dB@5.4 Gbps ÎÎ Low Off Isolation for high speed channels: -25dB@5.4 Gbps ÎÎ VDD Operating Range: 3.3V +/-10% ÎÎ ESD Tolerance: 2kV HBM ÎÎ Low channel-to-channel skew, 35ps max ÎÎ Packaging (Pb-free & Green): à 32 TQFN (ZL)
Description
Pericom Semiconductor’s PI3VDP3212 mux/demux is targeted for next generation digital video signals. This device can be used to connect a DisplayPort™ Source to two Independent Display Port Sinks or to connect two DisplayPort sources to a single DP display. The newly released DisplayPort spec requires a data rate of 5.4 Gbps. Pericom's solution has been specifically designed around this standard and will support such signals. Application Routing of DisplayPort signals with low signal attenuation be - tween source and sink. Block Diagram PI3VDP3212 2-Lane DisplayPort™ Rev 1.2 Compliant Switch D0+ D1+ AUX+ AUX HPD D0+A D0-A D1+A D1-A D0+B D0-B D1+B D1-B Logic Control OE AUX+ A AUX-A HPD A AUX+ B AUX- B HPD B SEL AUX_SEL 13-0166
2-Lane DisplayPort™ Rev 1.2 Compliant Switch 11/11/13 Pin Assignment (TQFN-32) GND D0- D0+ AUX_SEL SEL D1+ D1- AUX- AUX+ D1-A D1+A D0-B D0+B GND D1-B D1+B OE HPD HPD_A AUX-A D0+A AUX+B AUX-B D0-A AUX+A GND 16 28 VDD VDD VDD HPD_B VDD VDD VDD OE SEL AUX_ SEL Function Low Low Low Port A active for all channels Low Low High Port A for HS, port B for HPD/AUX Low High Low Port B for HS, port A for HPD/AUX Low High High Port B active for all channels High x x All I/O's are hi-z and IC is power down Truth Table 13-0166
2-Lane DisplayPort™ Rev 1.2 Compliant Switch 11/11/13 Pin Description pin# pin Name Signal Type Description
1 D0+ I/O positive differential signal 0 for COM port
negative differential signal 0 for COM port VDD Power 3.3V +/-10% power supply D1+ I/O positive differential signal 1 for COM port D1- I/O negative differential signal 1 for COM port AUX+ I/O positive differential signal for AUX COM port AUX- I/O negative differential signal for AUX COM port HPD I/O HPD for COM port VDD Power 3.3V +/-10% power supply SEL I switch logic control. If HIGH, then path B is selected for high speed channels only If LOW, then path A is selected for high speed channels only 11 OE I Output enable. if OE is low, IC is enabled. If OE is high, then IC is power down and all I/Os are hi-z VDD Power 3.3V +/-10% power supply HPD_B I/O HPD for port B
14 AUX-B I/O negative differential signal for AUX, port B
15 AUX+B I/O positive differential signal for AUX, port B
3.3V +/-10% power supply HPD_A I/O HPD for port A
18 AUX-A I/O negative differential signal for AUX, port A
19 AUX+A I/O positive differential signal for AUX, port A
3.3V +/-10% power supply GND Ground Ground D1-B I/O negative differential signal 1 for port B D1+B I/O positive differential signal 1 for port B D0-B I/O negative differential signal 0 for port B
25 D0+B I/O positive differential signal 0 for port B
26 D1-A I/O negative differential signal 1 for port A
positive differential signal 1 for port A GND Ground Ground 29 VDD Power 3.3V +/-10% power supply
30 D0-A I/O negative differential signal 0 for port A
positive differential signal 0 for port A AUX_SEL I switches only the AUX and HPD channels from port A vs. port B If High, path B is selected If LOW, path A is selected 13-0166
2-Lane DisplayPort™ Rev 1.2 Compliant Switch 11/11/13 3.3V ±10%) Parameter Description Test Conditions(1) Min Ty p(1) Max Units VIH Input HIGH Voltage Guaranteed HIGH level 1.5 V VIL Input LOW Voltage Guaranteed LOW level 0.75 VIK Clamp Diode Voltage, Dx VDD = Max., IIN = –18mA –1.6 –1.8 IIH Input HIGH Current VDD = Max., VIN = VDD ±5 µAI IL Input LOW Current VDD = Max., VIN = GND ±5 IOFF_SB I/O leakage when part is off for side band signals only (DDC, AUX, HPD) VDD = 0V, VINPUT = 0V to 3.6V 20 RON_HS On resistance between input to out - put for high speed signals VDD = 3.3V, Vinput = 0V to 2V, IINPUT = 20mA 10 Ohm RON_AUX On resistance between input to out - put for side-band signals (AUX) VDD = 3.3V, Vinput = 0 to 3.3V, IINPUT = 20mA 7 Ohm Aux_ss Signal Swing Tolerance in Aux path VDD = 3.0V –0.5 3.6 V HPD_I Input voltage tolerance on HPD path 5.5 V HPD_O Output voltage on HPD path HPD input from 0V to 5.25V 3.6 V Supply Voltage to Ground Potential –0.5V to +4.2V Note: Stresses greater than those listed under MAXI MUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional op eration of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maxi - mum rating conditions for extended periods may affect reliability. Maximum Ratings (Above which useful life may be impaired. For user guidelines, not tested.) Power Supply Characteristics (TA = –40°C to +85°C) Parameter Description Test Conditions(1) Min Ty p(1) Max Units ICC Quiescent Power Supply Current VDD = 3.3V., VIN = GND or VDD 320 500 uA 13-0166
2-Lane DisplayPort™ Rev 1.2 Compliant Switch 11/11/13 Dynamic Electrical Characteristics over Operating Range (TA = -40º to +85ºC, VDD = 3.3V ±10%) Parameter Description Test Conditions Ty p. Max Units XTALK Crosstalk on High Speed Channels See Fig. 1 for Measurement Setup f= 2.7 GHz -25dB dB f = 1.35 GHz -32dB OIRR OFF Isolation on High Speed Channels See Fig. 2 for Measurement Setup, f= 2.7 GHz -22dB f = 1.35 GHz -30dB ILOSS Differential Insertion Loss on High Speed Channels @5.4Gbps (see figure 3) -1.7 dB Rloss Differential Return Loss on high speed channels @ 2.7GHz -16 dB BW_Dx± Bandwidth -3dB for Main high speed path (Dx±) See figure 3 4.7 GHz BW_AUX/ HPD -3dB BW for AUX and HPD signals See figure 3 1.5 GHz Tsw a-b time it takes to switch from port A to port B 1 us Tsw b-a time it takes to switch from port B to port A us Tstartup Vdd valid to channel enable 10 us Twa keup Enabling output by changing OE from low to High 10 us 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at V DD = 3.3V, TA = 25°C ambient and maximum loading. Switching Characteristics (T A = -40º to +85ºC, V DD = 3.3V±10%) Parameter Description Min. Ty p. Max. Units Tpd Propagation delay (input pin to output pin) 80 ps tb-b Bit-to-bit skew within the same differential pair 5 ps tch-ch Channel-to-channel skew 50 ps 13-0166
2-Lane DisplayPort™ Rev 1.2 Compliant Switch 11/11/13 Fig 1. Crosstalk Setup Fig 2. Off-isolation setup BALANCED PORT1 DUT BALANCED PORT2 BALANCED PORT1 BALANCED PORT2 DUT BALANCED PORT1 BALANCED PORT2 DUT Fig 3. Differential Insertion Loss set up 13-0166
2-Lane DisplayPort™ Rev 1.2 Compliant Switch 11/11/13 1.00E+07 1.00E+08 1.00E+09 1.00E+10 Frequency (Hz) -20.0 -30.0 -40.0 -50.0 -60.0 -70.0 -80.0 -90.0 -100.0 Crosstalk (dB) Fig 4. Xtalk for high speed channels (D0 and D1) 13-0166
2-Lane DisplayPort™ Rev 1.2 Compliant Switch 11/11/13 1.00E+07 1.00E+08 1.00E+09 1.00E+10 Frequency (Hz) -30.0 -40.0 -50.0 -60.0 -70.0 -80.0 Off Isolation (dB) -0.0 -10.0 -20.0 Fig 5. Off Isolation for high speed channels (D0 an D1). Red is for path B and Blue is for path A 13-0166
2-Lane DisplayPort™ Rev 1.2 Compliant Switch 11/11/13 1.00E+07 1.00E+08 1.00E+09 1.00E+10 Frequency (Hz) -1.0 -2.0 -3.0 -4.0 -5.0 -6.0 Insertion Loss (dB) -0.0 Fig 6. Insertion Loss for high speed channels, D0 and D1. Red is for path B and Blue is for path A 13-0166
2-Lane DisplayPort™ Rev 1.2 Compliant Switch 11/11/13 RT 4pF CL VDD VIN VOUT 200-ohm 200-ohm 2 * VDD Pulse Generator D.U.T Test Circuit for Electrical Characteristics(1-5) Notes: 1. CL = Load capacitance: includes jig and probe capacitance. 2. RT = Termination resistance: should be equal to Z OUT of the Pulse Generator 3. Output 1 is for an output with internal conditions such that the output is low except when disabled by the output control. 4. Output 2 is for an output with internal conditions such that the output is high except when disabled by the output control. 5. All input impulses are supplied by generators having the following characteristics: PRR ≤ MHz, Z O = 50Ω, tR ≤ 2.5ns, t F ≤ 2.5ns. 6. The outputs are measured one at a time with one transition per measurement. Switching Waveforms Voltage Waveforms Enable and Disable Times tPLZ 50% 50% VDD VOH VOL tPHZ tPZL tPZH Output 1 Output 2 VOL VOH SEL 10% 90% Switch Positions Test Switch tPLZ, tPZL (output on B-side) 2 * Vdd tPHZ, tPZH (output on B-side) GND Prop Delay Open Test Circuit for Dynamic Electrical Characteristics DUT Agilent PNA-L Network Analyzer Balanced port 1 Balanced port 2 13-0166
2-Lane DisplayPort™ Rev 1.2 Compliant Switch 11/11/13 Packaging Mechanical: 32-Contact TQFN (ZL)1 DESCRIPTION: 32-contact, Thin Fine Pitch Quad Flat No-Lead (TQFN) PACKAGE CODE: ZL (ZL32) DOCUMENT CONTROL #: PD-2044 REVISION: A DATE: 10/09/09 09-0125 13-0166
2-Lane DisplayPort™ Rev 1.2 Compliant Switch 11/11/13 DESCRIPTION: 32-contact, Thin Fine Pitch Quad Flat No-Lead (TQFN) PACKAGE CODE: ZLS (ZLS32) DOCUMENT CONTROL #: PD-217 5 REVISION: -- DATE: 11/11/13 Note: For latest package info, please check: http://www.pericom.com/products/packaging/mechanicals.php
Ordering Information
Ordering Code Package Code Package Description PI3VDP3212ZLE ZL Pb-free & Green, 32-contact TQFN PI3VDP3212ZLSE ZLS Pb-free & Green, 32-contact TQFN Notes:
- Thermal characteristics can be found on the company web site at www.pericom.com/packaging/
- "E" denotes Pb-free and Green
- Adding an "X" at the end of the ordering code denotes tape and reel packaging 13-0166