PI3PCIE3442ZHE

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Document overview

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Technical content

Features

Î Î8 Differential Channel (2-lane) Exchange Î ÎPCI Express® 3.0 performance, 8.0 Gbps Î ÎBi-directional operation Î ÎLow Bit-to-Bit Skew: 10ps (between ± signals) Î ÎLow Crosstalk: -29dB @ 2.5GHz (5Gbps) 20dB @ 4.0GHz (8Gbps) Î ÎLow Insertion Loss: -1.1dB @ 2.5GHz (5Gbps) 1.45dB @ 4.0GHz (8Gbps) Î ÎVDD Operating Range: 3.3V ±10% Î ÎESD Tolerance: 2kV HBM Î ÎPackaging (Pb-free & Green): à 4 2-contact, TQFN (ZH42), 3.5x9mm. à 4 0-contact, TQFN (ZL40), 3x6mm.

Description

Pericom semiconductor’s PI3PCIE3442 is a differential exchange switch featuring pass-through pinout. It supports two full PCI Express® lanes operating at 8.0Gbps PCIe® 3.0 performance. With the select control input low, Port A connects to Port B, and Port C connects to port D for an 8-channel differential pass- though. When the select control input is high Port A connects to Port D, and Port B connects to Port C. Block Diagram Application Switching 4 lanes of DP1.2 from PC/Notebook/Tablet to Display monitor Truth Table Function SEL OE# Ax = Bx Cx = Dx 0 0 Ax = Dx Cx = Bx 1 0 Ax, Bx, Cx, Dx = Hi-Z (disconnect) x 1 PI3PCIE3442 3.3V PCI Express® 3.0 2-Lane Exchange Switch A0+ A0- C0+ C0- B0+ B0- D0+ D0- A1+ A1- C1+ C1- B1+ B1- D1+ D1- SEL OE# A2+ A2- C2+ C2- A3+ A3- C3+ C3- B2+ B2- D2+ D2- B3+ B3- D3+ D3- 14-0088

www.pericom.com 06/04/14All trademarks are property of their respective owners. PRELIMINARY INFORMATION - COMPANY CONFIDENTIAL Pin Diagram 42-TQFN B0+ B0- D0+ D0- B1+ B1- D1+ D1- VDD B2+ B2- D2+ D2- B3+ B3- D3+ D3- A0+ A0- C0+ C0- A1+ A1- C1+ C1- SEL A2+ A2- C2+ C2- A3+ A3- C3+ C3- VDD OE# VDD GND VDD GND VDD GND GND PI3PCIE3442 3.3V PCI Express® 3.0 2-Lane Exchange Switch 17 38 B0+ B0- D0+ D0- B1+ B1- D1+ D1- B2+ B2- D2+ D2- B3+ B3- D3+ D3- A0+ A0- C0+ C0- A1+ A1- C1+ C1- SEL A2+ A2- C2+ C2- A3+ A3- C3+ C3- OE# GND VDD GND VDD GND 40 GND GND Pin Diagram 40-TQFN 14-0088

www.pericom.com 06/04/14All trademarks are property of their respective owners. PRELIMINARY INFORMATION - COMPANY CONFIDENTIAL PI3PCIE3442 3.3V PCI Express® 3.0 2-Lane Exchange Switch A0+ A0- C0+ C0- B0+ B0- D0+ D0- A1+ A1- C1+ C1- B1+ B1- D1+ D1- SEL OE# A2+ A2- C2+ C2- A3+ A3- C3+ C3- B2+ B2- D2+ D2- B3+ B3- D3+ D3- ENB INB INA ENA OUTB0 OUTB1 SBO SBI SAI SAO OUTA0 OUTA1 ENB INB INA ENA OUTB0 OUTB1 SBO SBI SAI SAO OUTA0 OUTA1 DA0-DA3 DAX or DBX DB Monitor A DBX or DAX DA0-DA3 AUXX, HPDX AUXX, HPDX CAB_DETA CAB_DETX CAB_DETX DB0-DB3 AUXB, HPDB CAB_DETB DB Monitor B DP Source A DP Source B DP conn A DP conn B PI3PCIE3442 PI3DBS3224 PI3DBS3224 Application Diagram Generic 2 x 2 DP1.2 Switching Using PI3PCIE3442 (3x6mm 40 pad QFN) 14-0088

www.pericom.com 06/04/14All trademarks are property of their respective owners. PRELIMINARY INFORMATION - COMPANY CONFIDENTIAL PI3PCIE3442 3.3V PCI Express® 3.0 2-Lane Exchange Switch Pin Description (42-TQFN) Pin # Pin Name I/O Description A0+ A0– I/O Signal I/O, Channel 0, Port A A1+ A1– I/O Signal I/O, Channel 1, Port A A2+ A2– I/O Signal I/O, Channel 2, Port A A3+ A3– I/O Signal I/O, Channel 3, Port A B0+ B0− I/O Signal I/O, Channel 0, Port B B1+ B1− I/O Signal I/O, Channel 1, Port B B2+ B2− I/O Signal I/O, Channel 2, Port B B3+ B3− I/O Signal I/O, Channel 3, Port B C0+ C0– I/O Signal I/O, Channel 0, Port C C1+ C1– I/O Signal I/O, Channel 1, Port C C2+ C2– I/O Signal I/O, Channel 2, Port C C3+ C3− I/O Signal I/O, Channel 3, Port C D0+ D0− I/O Signal I/O, Channel 0, Port D D1+ D1− I/O Signal I/O, Channel 1, Port D D2+ D2− I/O Signal I/O, Channel 2, Port D D3+ D3− I/O Signal I/O, Channel 3, Port D 41 OE# I Output Enable, active low. When OE# = 0 the device I/O is enabled. When OE#=1, all I/O are high impedance

9 SEL I Operation mode Select

(when SEL=0: A→B, C→D, when SEL=1: A→D, C→B) 18, 20, 30, 40, 42 V DD Pwr 3.3V ±10% Positive Supply Voltage 19, 21, 39, Center Pad GND Pwr Power ground 14-0088

www.pericom.com 06/04/14All trademarks are property of their respective owners. PRELIMINARY INFORMATION - COMPANY CONFIDENTIAL PI3PCIE3442 3.3V PCI Express® 3.0 2-Lane Exchange Switch Pin Description (40-TQFN) Pin # Pin Name I/O Description A0+ A0– I/O Signal I/O, Channel 0, Port A A1+ A1– I/O Signal I/O, Channel 1, Port A A2+ A2– I/O Signal I/O, Channel 2, Port A A3+ A3– I/O Signal I/O, Channel 3, Port A B0+ B0− I/O Signal I/O, Channel 0, Port B B1+ B1− I/O Signal I/O, Channel 1, Port B B2+ B2− I/O Signal I/O, Channel 2, Port B B3+ B3− I/O Signal I/O, Channel 3, Port B C0+ C0– I/O Signal I/O, Channel 0, Port C C1+ C1– I/O Signal I/O, Channel 1, Port C C2+ C2– I/O Signal I/O, Channel 2, Port C C3+ C3− I/O Signal I/O, Channel 3, Port C D0+ D0− I/O Signal I/O, Channel 0, Port D D1+ D1− I/O Signal I/O, Channel 1, Port D D2+ D2− I/O Signal I/O, Channel 2, Port D D3+ D3− I/O Signal I/O, Channel 3, Port D 38 OE# I Output Enable, active low. When OE# = 0 the device I/O is enabled. When OE#=1, all I/O are high impedance

7 SEL I Operation mode Select (when SEL=0: A→B, C→D, when SEL=1: A→D, C→B)

17, 28 V DD Pwr 3.3V ±10% Positive Supply Voltage 15, 18, 27, 37, Center Pad GND Pwr Power ground 14-0088

www.pericom.com 06/04/14All trademarks are property of their respective owners. PRELIMINARY INFORMATION - COMPANY CONFIDENTIAL PI3PCIE3442 3.3V PCI Express® 3.0 2-Lane Exchange Switch Param- eters Description Test Conditions(1) Min Ty p(1) Max Units VIH Input HIGH Voltage Guaranteed HIGH level 0.65 x VDD VVIL Input LOW Voltage Guaranteed LOW level –0.5 0.35 x V DD VIK Clamp Diode Voltage VDD = Max., IIN = –18mA –0.7 –1.2 IIH Input HIGH Current, SEL VDD = Max., VIN = VDD –10 +10 µA IIL Input LOW Current, SEL VDD = Max., VIN = GND –10 +10 IIH Input HIGH Current, AX, BX, CX, DX VDD = Max., VIN = 1.8V –10 +10 µA IIL Input LOW Current, AX, BX, CX ,DX VDD = Max., VIN = 0V –10 +10 Note: T ypical values are at VDD = 3.3V, TA = 25°C ambient and maximum loading. Switching Characteristics Parameters Description Test Conditions Min. Ty p. Max. Units tPZH, tPZL Line Enable Time - SEL to AN, BN, CN, DN 0.5 45 ns tPHZ, tPLZ Line Disable Time - SEL to AN, BN, CN, DN 0.5 25 tb-b Bit-to-bit skew within the same differential pair 10 ps tch-ch Channel-to-channel skew 20 Electrical Characteristics Recommended Operating Conditions Symbol Parameter Conditions Min Ty p Max Units VDD 3.3V Power Supply 3.0 3.3 3.6 V IDD Total current from VDD 3.3V supply SEL and OE# at OV or VDD 300 μA TCASE Case temperature range for operation within spec. -40 85 Celsius Supply V oltage to Ground Potential to VDD Power Dissipation Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Ex- posure to absolute maximum rating conditions for extended periods may affect reliability. Maximum Ratings (Above which useful life may be impaired. For user guidelines, not tested.) 14-0088

www.pericom.com 06/04/14All trademarks are property of their respective owners. PRELIMINARY INFORMATION - COMPANY CONFIDENTIAL PI3PCIE3442 3.3V PCI Express® 3.0 2-Lane Exchange Switch Dynamic Electrical Characteristics Parameter Description Test Conditions Min. Ty p.(1) Max. Units DDIL Differential Insertion Loss (VIN = -10dBm, DC = 0V) f=1.2GHz f=2.5GHz f=4.0GHz f=5.0GHz f=7.5GHz -0.8 -1.0 -1.3 -1.8 -4.5 -1.0 -1.2 -1.5 -2.0 -5.0 dB DDIL OFF Differential Off Isolation f= 4.0GHz -19 dB DDRL Differential Return Loss f= 0 to 2.8GHz f= 2.8 to 5.0GHz f= 5.0 to 8.0GHz -26 -14 -7.5 dB DDNEXT Near End Crosstalk f= 0 to 2.8GHz f= 2.8 to 5.0GHz f= 5.0 to 8.0GHz -26 -20 -16 dB V I F Max Signal Frequency Range Insertion loss 1.5dB, VIN=0.623Vpp, DC=0V 4.0 GHz Insertion loss 1.5dB, V IN=0.623Vpp, DC=0.9V 4.0 Insertion loss 3dB, V IN=0.623Vpp, DC=0V 8.0 Insertion loss 3dB, V IN=0.623Vpp, DC=0.9V 8.0 BW -3dB Bandwidth 6.5 GHz Notes: G uaranteed by design. Typical values are at V DD = 3.3V , TA = 25°C ambient and maximum loading. 14-0088

www.pericom.com 06/04/14All trademarks are property of their respective owners. PRELIMINARY INFORMATION - COMPANY CONFIDENTIAL PI3PCIE3442 3.3V PCI Express® 3.0 2-Lane Exchange Switch Differential Insertion Loss Differential Return Loss 14-0088

www.pericom.com 06/04/14All trademarks are property of their respective owners. PRELIMINARY INFORMATION - COMPANY CONFIDENTIAL PI3PCIE3442 3.3V PCI Express® 3.0 2-Lane Exchange Switch Differential Off Isolation Differential Crosstalk 14-0088

www.pericom.com 06/04/14All trademarks are property of their respective owners. PRELIMINARY INFORMATION - COMPANY CONFIDENTIAL PI3PCIE3442 3.3V PCI Express® 3.0 2-Lane Exchange Switch 8.0 Gbps RX signal eye with PI3PCIE34428.0 Gbps RX signal eye without PI3PCIE3442 BALANCED PORT1 DUT BALANCED PORT2 BALANCED PORT1 BALANCED PORT2 DUT Differential Insertion Loss and Return Test Circuit Differential Off Isolation Test Circuit Differential Near End Xtalk Test Circuit BALANCED PORT1 BALANCED PORT2 DUT 14-0088

www.pericom.com 06/04/14All trademarks are property of their respective owners. PRELIMINARY INFORMATION - COMPANY CONFIDENTIAL PI3PCIE3442 3.3V PCI Express® 3.0 2-Lane Exchange Switch Switch Positions Test Switch tPLZ, tPZL 3.0V tPHZ, tPZH GND Prop Delay Open Switching Waveforms Voltage Waveforms Enable and Disable Times tPLZ VDD/2 VDD/2 VDD VOH VOL 0.75V 0.75V tPHZ tPZL tPZH Output 1 Output 2 VOL VOH SEL VOL + 0.15V VOL - 0.15V RT 4pF CL VDD VIN VOUT 200-ohm 200-ohm 3.0V Pulse Generator D.U.T Test Circuit for Electrical Characteristics (1-5) Notes: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to Z OUT of the Pulse Generator O utput 1 is for an output with internal conditions such that the output is low except when disabled by the output control. ou tput 2 is for an output with internal conditions such that the output is high except when disabled by the output control. A ll input impulses are supplied by generators having the following characteristics: PRR ≤ MHz, Z O = 50Ω, tR ≤ 2.5ns, t F ≤ 2.5ns. Th e outputs are measured one at a time with one transition per measurement. 14-0088

www.pericom.com 06/04/14All trademarks are property of their respective owners. PRELIMINARY INFORMATION - COMPANY CONFIDENTIAL PI3PCIE3442 3.3V PCI Express® 3.0 2-Lane Exchange Switch DATE: 07/11/13 DESCRIPTION: 40-contact, Thin Fine Pitch Quad Flat No-Lead, TQFN PACKAGE CODE: ZL (ZL40) DOCUMENT CONTROL #: PD-2165 REVISION: -- Notes: 1. All dimensions are in mm. Angles in degrees. 2. Coplanarity applies to the exposed pad as well as the terminals. 3. Refer JEDEC MO-220 13-0211 Packaging Information: 40-Contact TQFN (3x6mm) 14-0088

www.pericom.com 06/04/14All trademarks are property of their respective owners. PRELIMINARY INFORMATION - COMPANY CONFIDENTIAL PI3PCIE3442 3.3V PCI Express® 3.0 2-Lane Exchange Switch

Ordering Information

Ordering Code Package Code Package Description PI3PCIE3442ZHE ZH 42-contact, Thin Fine Pitch Quad Flat No-Lead (TQFN) PI3PCIE3442ZLE ZL 40-contact, Thin Fine Pitch Quad Flat No-Lead (TQFN) Notes: Th ermal characteristics can be found on the company web site at www.pericom.com/packaging/ E" denotes Pb-free and Green A dding an "X" at the end of the ordering code denotes tape and reel packaging DATE: 11/14/12 DESCRIPTION: 42-contact Thin Fine Pitch Quad Flat No-Lead (TQFN) PACKAGE CODE: ZH42 DOCUMENT CONTROL #: PD-2035 REVISION:D Notes: 1. All dimensions are in millimeters. Angles in degrees. 2. Coplanarity applies to the exposed pad as well as the terminals. 3. Refer JEDEC MO-220. 4. Recommended land pattern is for reference only. 5. Thermal pad soldering area 12-0529 Note: For latest package info, please check: http://www.pericom.com/products/packaging/mechanicals.php Packaging Information: 42-Contact TQFN (3.5x9mm) 14-0088