PI3L301D PERICOM | Alldatasheet

Document overview

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Technical content

Features

  • RON is 4Ω typical
  • Low bit-to-bit skew: 200ps
  • Low crosstalk: –27dB @ 250MHz
  • Low Current Consumption: 20µA
  • Near-Zero propagation delay: 250ps
  • Switching speed: 9ns
  • Channel On-Capacitance: 9.5pF (typical)
  • VCC Operating Range: +3.0V to +3.6V
  • ESD >2000V . . . Human Body Model
  • >350 MHz bandwidth (or data frequency)
  • Packaging (Pb-free & Green available): 48-pin 240 mil wide plastic TSSOP (A) 48-pin 173 mil wide plastic TVSOP (K)

Applications

  • Dual Physical Layer Device sharing to one interface connector
  • SONET OC-12(622Mbps) signal routing
  • Routes physical layer signals for 10/100/1000 Mbit Ethernet

Description

Pericom Semiconductor’s PI3L series of logic circuits are produced using the Company’s advanced sub-micron CMOS technology, achieving industry leading performance. The PI3L301D is a 16- to 8-bit multiplexer/demultiplexer LAN Switch. Industry leading advantages include a propagation delay of less than 250ps, resulting from its low channel resistance and I/O capacitance. The device multiplexes differential outputs from a Gigabit Ethernet transceiver (PHY) device to one of two corresponding B1 or B2 outputs. The switch is bidirectional and offers little or no attenuation of the high-speed signals at the outputs. It is designed for low bit-to-bit skew, high channel-to-channel noise isolation and is compatible with various standards, such as 10/100/ 1000 Base-T (Ethernet). Generally, this part can be used to replace mechanical relays in low-voltage LAN applications that interface a physical layer over CAT 5 or CAT 6 unshielded twisted pair cable through an isolation transformer. Pin Description PI3L301D 3.3V , 16-Bit to 8-Bit, Mux/DeMux Gigabit Ethernet LAN Switch with Single Enable Block Diagram SEL 1B1 0B1 1B2 0B2 3B1 2B1 3B2 2B2 5B1 4B1 5B2 4B2 7B1 6B1 7B2 6B2 1 0B1 1B1 GND 0B2 1B2 GND 2B1 3B1 GND 2B2 3B2 GND VDD 4B1 5B1 GND 4B2 5B2 GND 6B1 7B1 GND 6B2 7B2 VDD GND GND VDD GND GND GND VDD GND NC GND GND VDD GND GND SEL

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3.3V , 16-Bit to 8-Bit, Mux/DeMux Gigabit Ethernet LAN Switch with Single Enable Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and func - tional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Maximum Ratings (Above which useful life may be impaired. For user guidelines, not tested.) Truth Table Function SEL AN to NB1 L AN to NB2 H

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3.3V , 16-Bit to 8-Bit, Mux/DeMux Gigabit Ethernet LAN Switch with Single Enable (TA = –40°C to +85°C, VCC = 3.3V ±10%) Paramenter Description Test Conditions Min. Typ.(2) Max. Units VIH Input HIGH V oltage Guaranteed HIGH level 2.0 - - VVIL Input LOW V oltage Guaranteed LOW level –0.5 - 0.8 VIK Clamp Diode V oltage VCC = Max., IIN = –18mA - –0.7 –1.2 IIH Input HIGH Current VCC = Max., VIN = VCC - - ±5 µAIIL Input LOW Current VCC = Max., VIN = GND - - ±5 IOFF Power Down Leakage Current VCC = 0V , VA = 0V , VB ≤ 3.6 - - ±5 RON Switch On-Resistance(3) VCC = Min., 1.25V ≤ VIN ≤ VCC, IIN = –10mA to –30mA - - 8 ΩRFLAT(ON) On-Resistance Flatness(4) VCC = Min., VIN @ 1.25V and VCC, IIN = –10mA to –30mA - 1.0 - ∆RON On-Resistance match from center ports to any other port(4) VCC = Min., 1.25V ≤ VIN ≤ VCC, IIN = –10mA to –30mA - 0.9 2.0 (TA = –40°C to +85°C, VCC = 3.3V ±10%) Paramenter Description Test Conditions Min. Typ.(2) Max. Units VIH Input HIGH V oltage Guaranteed HIGH level 2 - - VVIL Input LOW V oltage Guaranteed LOW level –0.5 - 0.8 VIK Clamp Diode V oltage VCC = Max., IIN = –18mA - –0.7 –1.2 IIH Input HIGH Current VCC = Max., VIN = VCC - - ±5 µAIIL Input LOW Current VCC = Max., VIN = GND - - ±5 IOFF Power Down Leakage Current VCC = 0V , VA = 0V , VB ≤ 3.6 - - ±5 RON Switch On-Resistance(3) VCC = Min., 1.5V ≤ VIN ≤ VCC, IIN = –40mA - 4 8 ΩRFLAT(ON) On-Resistance Flatness(4) VCC = Min., VIN @ 1.5V and VCC, IIN = –40mA - 1 - ∆RON On-Resistance match from center ports to any other port(4) VCC = Min., 1.5V ≤ VIN ≤ VCC, IIN = –40mA - 0.9 2

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3.3V , 16-Bit to 8-Bit, Mux/DeMux Gigabit Ethernet LAN Switch with Single Enable Notes: 1. For max. or min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 3.3V , TA = 25°C ambient and maximum loading. Dynamic Electrical Characteristics Over the Operating Range (TA=-40º to +85ºC, VCC=3.3V±10%, GND=0V) Parameter Description Test Conditions Min. Typ.(2) Max. Units XTALK Crosstalk f = 250MHz, See Fig. 2 - -27 - dBOIRR OFF Isolation f = 250MHz, See Fig. 3 - -32 - BW Bandwidth –3dB CL = 10pf, See Fig. 1 - 350 - MHz Notes: 1. For max. or min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Guaranteed by design. 3. The bus switch contributes no propagational delay other than the RC delay of the On-Resistance of the switch and the load capacitance. The time constant for the switch alone is of the order of 0.25ns for 10pF load. Since this time constant is much smaller than the rise/fall times of typical driving signals, it adds very little propagational delay to the system. Propagational delay of the bus switch when used in a system is determined by the driving circuit on the driving side of the switch and its interactions with the load on the driven side. Power Supply Characteristics Parameters Description Test Conditions(1) Min. Typ.(2) Max. Units ICC Quiescent Power Supply Current VCC = Max., VIN = GND or VCC - - 800 µA Notes: 1. For max. or min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 3.3V , TA = 25°C ambient and maximum loading. 3. Measured by the voltage drop between A and B pins at indicated current through the switch. On-Resistance is determined by the lower of the voltages on the two (A & B) pins. 4. This parameter is determined by device characterization but is not production tested. 5. Measured on worst case corner pin. Capacitance (TA = 25°C, f = 1MHz) Parameters(4) Description Test Conditions Typ. Max. Units CIN Input Capacitance VIN = 0V 3.1 3.6 pFCOFF(B1, B2) Port B Capacitance, Switch OFF 2.8 6.0 CON(A/B) A/B Capacitance, Switch ON 9.5(5) 10.9 Switching Characteristics Paramenter Description Test Conditions Min. Typ.(2) Max. Units tPD Propagation Delay(2,3) - 0.25 ns tPZH, tPZL Line Enable Time - SEL to AN, BN 0.5 - 15 tPHZ, tPLZ Line Disable Time - SEL to AN, BN 0.5 - 9 tSK(o) Output Skew between center port (A4 to A5) to any other port(2) - 0.1 0.2 tSK(p) Skew between opposite transitions of the same output (tPHL - tPLH) (2) - 0.1 0.2

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  1. CL = Load capacitance: includes jig and probe capacitance.
  2. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator
  3. All input impulses are supplied by generators having the following characteristics: f = 10MHz, ZO = 50Ω, tR ≤ 2.5ns, tF ≤ 2.5ns.
  4. The outputs are measured one at a time with one transition per measurement.

Figure 1. Bandwidth -3db Testing

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Figure 2. Crosstalk Test Setup

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3.3V , 16-Bit to 8-Bit, Mux/DeMux Gigabit Ethernet LAN Switch with Single Enable Voltage Waveforms Propagation Delay Times Switching Waveforms Output Skew - tSK(o) Pulse Skew - tSK(p) Voltage Waveforms Enable and Disable Times Data In at Ax or Ay Data Out at MBx Data Out at MBy tPLHX tPHLX 3.5V 2.5V 2.5V 2.5V I tSK(o) = I tPLHy – tPLHx I or I tPHLy – tPHLx I tSK(o) tPLHy tPHLy VOH VOL VOL VOH 1.5V Input Output tPLH tSK(p) = I tPHL – tPLH I tPHL 3.5V 2.5V 2.5V VOL VOH 1.5V tPLZ 1.25V 1.25V 2.5V VDD VDD/2 VDD/2 VDD/2 VDD/2 tPHZ tPHZ tPZL tPZH tPZH Input A Output A Output B VOL +0.3V VOH –0.3V VOL VOL VOL VOL VOH SEL Applications Information Logic Inputs The logic control inputs can be driven up to +3.6V regardless of the supply voltage. For example, given a +3.3V supply, the output enables or select pins may be driven low to 0V and high to 3.6V . Driving IN Rail-to-Rail® minimizes power consumption. Power-Supply Sequencing Proper power-supply sequencing is advised for all CMOS devices. It is recommended to always apply VCC before applying signals to the input/output or control pins. Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd Input tPLH 2.5V 2.5V 2.5V 2.5V tPHL 3.5V 1.5V Output VOH VOL

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3.3V , 16-Bit to 8-Bit, Mux/DeMux Gigabit Ethernet LAN Switch with Single Enable Packaging Mechanical: 48-Pin TSSOP (A) Packaging Mechanical: 48-Pin TVSOP (K) .236 .244 .488 .496 .002 .006 SEATING PLANE .007 .010 .0197 BSC .004 .008 .319 12.4 12.6 6.0 6.2 0.50 0.17 0.27 8.1 0.05 0.15 0.09 0.20X.XX X.XX DENOTES DIMENSIONS IN MILLIMETERS .018 .030 0.45 0.75 .047

1.20 Max

.378 .386 .047 .031 .041 SEATING PLANE .0051 .009 .016 BSC .169 .177 9.60 9.80 4.30 4.50 0.40 0.13 0.23 0.80 1.05 X.XX X.XX DENOTES DIMENSIONS IN MILLIMETERS .002 .006 0.05 0.15 .0035 .008 0.09 0.20 .018 .030 0.45 0.75 .252 BSC 6.4 Max. 1.20

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3.3V , 16-Bit to 8-Bit, Mux/DeMux Gigabit Ethernet LAN Switch with Single Enable Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com Notes: 1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/

Ordering Information

Ordering Code Package Code Package Description PI3L301DA A 48-pin 240 mil wide plastic TSSOP PI3L301DAE A Pb-free & Green, 48-pin 240 mil wide plastic TSSOP PI3L301DK K 48-pin 173 mil wide plastic TVSOP PI3L301DKE K Pb-free & Green, 48-pin 173 mil wide plastic TVSOP