PI3740-00

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Cool-Power® ZVS Switching Regulators Rev 1.4 vicorpower.com Page 1 of 48 04/2017 800 927.9474 8V – 60VIN , 10V – 50VOUT , 50 – 140W Cool-Power ZVS Buck-Boost Regulator Cool-Power® ZVS Switching Regulators PI3740-00 Product Description The PI3740-00 is a high efficiency, wide input and output range DC-DC ZVS Buck-Boost Regulator. This high density System-in- Package (SiP) integrates controller, power switches, and support components. The integration of a high performance Zero-Voltage Switching (ZVS) topology within the PI3740-00 increases point of load performance, providing best in class power efficiency. The PI3740-00 requires an external inductor, resistive divider and minimal capacitors to form a complete DC–DC switching mode buck-boost regulator. The ZVS architecture also enables high frequency operation while minimizing switching losses and maximizing efficiency. The high switching frequency operation reduces the size of the external filtering components, improves power density, and enables fast dynamic response to line and load transients. Features & Benefits

• Up to 96% efficiency
• 50 – 140W continuous output power
• Parallel capable with single wire current sharing
• External frequency synchronization / interleaving
• High Side Current Sense Amplifier
• General Purpose Amplifier
• Lighting / Constant Current Mode (LGH)
• Input Over / Undervoltage Lockout (OVLO / UVLO)
• Output Overvoltage Protection (OVP)
• Overtemperature Protection (OTP)
• Fast and slow current limits
• -40°C to 115°C operating range (TJ)
• Excellent light load efficiency

Applications

• Battery Charging and Conditioning, Telecom, Networking, Lighting
• Computing, Communications, Industrial, Automotive Accessories
• 12V, 24V, 48V and 60V DC–DC Applications

Package Information

• 10mm x 14mm x 2.56mm LGA SiP PI3740-0010k CIN VIN PGND VS1 VS2 VOUT ISP PGND ISN IMON VSN VSP COMP EAO EAIN VDIFF LGH COUT R1 CHF CCOMP SYNC I TRK SGND EN SYNC O PGD VDR CTRK Typical Application Device Output Voltage Set Range PI3740-00-LGIZ 12V 10 to 50V

Cool-Power® ZVS Switching Regulators Rev 1.4 vicorpower.com Page 3 of 48 04/2017 800 927.9474 PI3740-00 Order Information Absolute Maximum Ratings Note: Stresses beyond these limits may cause permanent damage to the device. Operation at these conditions or conditions beyond those listed in the Electrical Specifications table is not guaranteed. All voltage nodes are referenced to PGND unless otherwise noted. [1] Non-Operating Test Mode Limits. [2] The ISP pin to ISN pin has a maximum differential limit of +5.5VDC and -0.5VDC. Part Number Description Package Transport Media MFG PI3740-00-LGIZ VIN 8 – 60V, VOUT 10 – 50V 10mm x 14mm 108-pin LGA TRAY Vicor Location Name VMAX VMIN ISOURCE ISINK 1–2, G–K VIN 75V -0.7V 40A [1] 40A [1] 4–5, G–K VS1 75V -0.7VDC 40A [1] 18A [1] 10–11, G–K VS2 75V -0.7VDC 40A [1] 18A [1] 13–14, G–K VOUT 75V -0.7VDC 40A [1] 40A [1] 1E VDR 5.5V -0.3V 30mA 200mA 1D PGD 5.5V -0.3V 20mA 20mA 1C SYNCO 5.5V -0.3V 5mA 5mA 1B SYNCI 5.5V -0.3V 5mA 5mA 1A FT1 5.5V -0.3V 5mA 5mA 2A FT2 5.5V -0.3V 5mA 5mA 3A FT3 5.5V -0.3V 5mA 5mA 4A FT4 5.5V -0.3V 10mA 10mA 5A EN 5.5V -0.3V 5mA 5mA 6A TRK 5.5V -0.3V 50mA 50mA 7A LGH 5.5V -0.3V 5mA 5mA 8A COMP 5.5V -0.3V 5mA 5mA 9A VSN 5.5V -1.5V 5mA 5mA 10A VSP 5.5V -1.5V 5mA 5mA 11A VDIFF 5.5V -0.5V 5mA 5mA 12A EAIN 5.5V -0.3V 5mA 5mA 13A EAO 5.5V -0.3V 5mA 5mA 14A IMON 5.5V -0.3V 5mA 5mA 14D ISN [2] 75V -2VDC 5mA 5mA 14E ISP [2] 75V -2VDC 5mA 5mA 10–14, B + 10–12, C–E SGND 0.3V -0.3V 200mA 200mA 2–9, B–E + 7–8, F–K PGND N/A N/A 18A [1] 18A [1]

Cool-Power® ZVS Switching Regulators Rev 1.4 vicorpower.com Page 4 of 48 04/2017 800 927.9474 PI3740-00 Pin Description Pin Number Pin Name Description 1–2, G–K VIN Input voltage and sense node for UVLO, OVLO and feed forward compensation. 4–5, G–K VS1 Input side switching node and ZVS sense node for power switches. 10–11, G–K VS2 Output side switching node and ZVS sense node for power switches. 13–14, G–K VOUT Output voltage and sense node for power switches, VOUT feed forward compensation, VOUT_OV and internal signals. 1E VDR Internal 5.1V supply for gate drivers and internal logic. May be used as reference or low power bias supply for up to 2mA. Must be impedance limited by the user. 1D PGD Fault & Power Good indicator. PGD pulls low when the regulator is not operating or if EAIN is less than 1.4V. 1C SYNCO Synchronization output. Outputs a high signal for ½ of the programmed switching period at the beginning of each switching cycle, for synchronization of other regulators. 1B SYNCI Synchronization input. When a falling edge synchronization pulse is detected, the PI3740-00 will delay the start of the next switching cycle until the next falling edge sync pulse arrives, up to a maximum delay of two times the programmed switching period. If the next pulse does not arrive within two times the programmed switching period, the controller will leave sync mode and start a switching cycle automatically. Connect to SGND when not in use. 1A FT1 For factory use only. Connect to SGND or leave floating in application. 2A FT2 For factory use only. Connect to SGND or leave floating in application. 3A FT3 For factory use only. Connect to SGND in application. 4A FT4 For factory use only. Connect to SGND in application. 5A EN Regulator Enable control. Asserted high or left floating – regulator enabled; Asserted low, regulator output disabled. 6A TRK Soft-start and track input. An external capacitor must be connected between TRK pin and SGND to decrease the rate of output rise during soft-start. Recommended value is 47nF for 1.6ms rise. 7A LGH Input for constant current lighting amplifier. Connect to SGND if not in use. 8A COMP Error amp compensation dominant pole. Connect a capacitor of 4700pF by default between COMP and SGND to set the control loop dominant pole. 9A VSN General purpose amplifier inverting input. 10A VSP General purpose amplifier non-inverting input. 11A VDIFF General Purpose amplifier output. When unused connect VDIFF to VSN and VSP to SGND. 12A EAIN Error amplifier inverting input and sense for PGD. Connect by resistive divider to the output. 13A EAO Error amp output: External connection for additional compensation and current sharing. Add 56pF capacitor from EAO to SGND. 14A IMON High side current sense amplifier output. 14D ISN High side current sense amplifier negative input. 14E ISP High side current sense amplifier positive input. 10–14, B + 10–12, C–E SGND Signal ground. Internal logic and analog ground for the regulator. SGND and PGND are star connected within the regulator package. 2–9, B–E + 7–-8, F–K PGND Power ground. VIN, VOUT, VS1 and VS2 power returns. SGND and PGND are star connected within the regulator package.

Cool-Power® ZVS Switching Regulators Rev 1.4 vicorpower.com Page 5 of 48 04/2017 800 927.9474 PI3740-00 SGND SGNDSGNDSGND SGNDSGNDSGND SGNDSGNDSGND SGND SGND SGND SGND PGND PGNDPGNDPGND PGNDPGNDPGND PGNDPGNDPGND PGNDPGNDPGND PGNDPGNDPGND PGNDPGNDPGND PGNDPGNDPGND PGNDPGNDPGND PGND PGND PGND PGND PGND PGND PGND PGNDPGNDPGNDPGNDPGND PGNDPGNDPGNDPGNDPGND IMON FT1 FT2 FT3 FT4 EN TRK LGH COMP VSN VSP VDIFF EAIN EAO VINVDRPGDSYNC0SYNCI VS1 VINVINVIN VINVINVIN VIN VS1VS1 VS1VS1 VS1 VOUTISPISN VOUTVOUTVOUT VOUTVOUTVOUT VS2 VOUT VS2VS2VS2 VS2VS2VS2 VS2 VS1 VS1 Package Pin-Out Pin Block Name Group of pins VIN G1-2, H1-2, J1-2, K1-2 VS2 G10-11, H10-11, J10-11, K10-11 VOUT G13-14, H13-14, J13-14, K13-14 SGND B10-14, C10-12, D10-12, E10-12 Large Pin Blocks

Cool-Power® ZVS Switching Regulators Rev 1.4 vicorpower.com Page 6 of 48 04/2017 800 927.9474 PI3740-00 IMON ISP+ - ISN VIN PGND SGND SYNC O FLT VCC FT1 EN SYNC I TRK EAO ZVS Buck Boost Control and Digital Parametric Trim Power Control 1.7V LEXT VS1 VS2 VDR COMP EAIN VDIFF VSN VSP LGH 100pF 0.1V VDR VOUT FT4 FT3 FT2 Block Diagram Storage and Handling Information Storage Temperature -65°C to 150°C Internal Operating Temperature -40°C to 115°C Soldering Temperature for 20 seconds 245°C MSL Rating 3 ESD Rating [3] 2.0kV HBM; 1.0kV CDM [3] JS-200-2014, JESD22-A114F.

Cool-Power® ZVS Switching Regulators Rev 1.4 vicorpower.com Page 7 of 48 04/2017 800 927.9474 PI3740-00 Specifications apply for the conditions -40°C < TJ < 115°C, VIN = 24V, VOUT = 12V, LEXT = 420nH[4], external CIN = 6 x 2.2µF, external COUT = 8 x 10µF, unless otherwise noted. Parameter Symbol Conditions Min Typ Max Unit Input Specifications Input Voltage VIN_DC 8 24 60 V Input Current During Output Short (fault condition duty cycle) IIN_SHORT [5] 3.75 mA Input Quiescent Current IQ_VIN Enabled (no load) 5 mA Input Quiescent Current IQ_VIN Disabled 2 mA Input Voltage Slew Rate VIN_SR [5] 1 V / µs Internal Input Capacitance CIN 25°C, VIN = 48V 0.5 µF VIN UVLO threshold rising VIN_UVLO_START 6.6 6.9 7.2 V VIN UVLO hysteresis VIN_UVLO_HYS 0.5 V VIN OVLO threshold rising VIN_OVLO_START 61.0 64.5 68.0 V VIN OVLO hysteresis VIN_OVLO_HYS 1.3 V Output Specifications EAIN Voltage Total Regulation VEAIN_DC 1.667 1.7 1.734 V Output Voltage Range VOUT_DC 10 12 50 V Output Current Range IOUT_DCR [6] 0 See note 6 A Output Current Steady State IOUT_DC VIN = 8 – 16V, VOUT ≤ 12V, TCASE = 25°C [6] 5.0 A VIN = 16 – 24V, VOUT ≤ 12V, TCASE = 25°C [6] 6.5 Output Power Steady State POUT_DC VIN = 8 – 60V, VOUT = 12 – 36V, TCASE = 25°C [6] 60 W VIN = 16 – 28V, VOUT = 24 – 36V, TCASE = 25°C [6] 123 Maximum Array Size NPARALLEL 3 Modules Output Current, array of 2 IOUT_DC-ARRAY2 Total array capability, see applications section for details 0 1.77 • IOUT_DC A Output Current, array of 3 IOUT_DC-ARRAY3 Total array capability, see applications section for details 0 2.54 • IOUT_DC Line Regulation ∆VOUT (∆VIN) @ 25°C, 8V < VIN < 60V 0.10 % Load Regulation ∆VOUT (∆IOUT) @ 25°C, IOUT above 5% of the typical full load 0.10 % Output Ripple VOUT_AC IOUT = 7.0A, VIN = 24V, VOUT = 12V, TCASE = 25°C COUT_EX = 8 x 10µF, 50V, X7R, 20MHz BW 96 mVp-p Internal Output Capacitance COUT 25°C, VOUT = 24V 0.75 µF VOUT Overvoltage Threshold VOUT_OVT Rising VOUT threshold to detect open loop 51.0 52.0 53.5 V VOUT Overvoltage Hysteresis VOUT_OVH 1.0 V VDR VDR Supply Voltage VDR Generated internally 4.9 5.1 5.36 V External Loading IVDR See Application Description for details 0 2 mA [4] See Inductor Pairing section. [5] Assured to meet performance specification by design, test correlation, characterization, and/or statistical process control. [6] Output current capability varies with input & output voltage. See rated ouput current / power curves on page 9.

Cool-Power® ZVS Switching Regulators Rev 1.4 vicorpower.com Page 8 of 48 04/2017 800 927.9474 PI3740-00 Specifications apply for the conditions -40°C < TJ < 115°C, VIN = 24V, VOUT = 12V, LEXT = 420nH[4], external CIN = 6 x 2.2µF, external COUT = 8 x 10µF, unless otherwise noted. Parameter Symbol Conditions Min Typ Max Unit Current Sense Amplifier (Dedicated to monitor Input or Output Current) ISP Pin Bias Current (Sink) VOUT = 10V, Flows to SGND 90 150 260 µA ISN Pin Bias Current VOUT = 10V 0 µA Common Mode Input Range 8 60 V IMON Source Current 1 1.8 3 mA IMON Sink Current 1 1.6 2.6 mA IMON Output at No Load 15 mV Full Scale Error 40mV input -4 4 % Bandwidth [5] 40 kHz Settling Time for Full Scale Step 1% 20 µs Gain AV_CS 15mV measured across 5mΩ shunt 20 V / V General Purpose Amplifier Open Loop Gain [5] 96 120 140 dB Small Signal Gain-Bandwidth [5] 5 7 12 MHz Offset -1 1 mV Common Mode Input Range -0.1 2.5 V Differential Mode Input Range 2 V Maximum Output Voltage IDIFF = -1mA VDR – 0.2V V Minimum Output Voltage No Load 20 mV Capacitive Load for Stable Operation [5] 0 100 pF Slew Rate 10 V / µs Output Current -1 1 mA Current Amplifier (LGH) Reference 95 100 105 mV Input Offset 0.5 mV Gain-Bandwidth Product 3 MHz Internal Feedback Capacitance 20 pF [4] See Inductor Pairing section. [5] Assured to meet performance specification by design, test correlation, characterization, and/or statistical process control. [6] Output current capability varies with input & output voltage. See rated ouput current / power curves on page 9.

Cool-Power® ZVS Switching Regulators Rev 1.4 vicorpower.com Page 9 of 48 04/2017 800 927.9474 PI3740-00 Parameter Symbol Conditions Min Typ Max Unit Transconductance Error Amplifier Reference VREF EAIN = EAO, 25ºC 1.688 1.7 1.712 V EAIN = EAO 1.674 1.7 1.726 Input Range VEAIN Note VEAIN_OV below 0 VDR V Maximum Output Voltage 3.35 3.6 4.0 V Minimum Output Voltage 0.05 0.15 V Transconductance Factory Set 7.6 mS Zero Resistor Factory Set 5 kΩ EAO Output Current Sourcing VEAO = 50mV, VEAIN = 0V 400 µA EAO Output Current Sinking VEAO = 2V, VEAIN = 5V 400 µA Open Loop Gain ROUT > 1MΩ [5] 70 80 dB Input Capacitance 56 pF Output Capacitance 1 pF Control and Protection Switching Frequency FSW 1 MHz VEAO Pulse Skip Threshold VEAO_PST VEAO to SGND 0.4 V Control Node Range VRAMP 0 3.3 V VEAO Overload Threshold VEAO_OL VEAO to SGND 3.175 3.3 3.425 V Overload Timeout TOL VEAO > VEAO_OL 1 ms Overload due to EAO limit IOUT_EAOLIM Module shuts down after 1ms of overload and restarts after 30ms 7.7 A VEAIN Output Overvoltage Threshold VEAIN_OV VEAIN > VEAIN_OV 1.94 2.04 2.14 V Overtemperature Fault Threshold TOTP [5] 125 °C Overtemperature Restart Hysteresis TOPT_HYS [5] 30 °C VOUT Negative Fault Threshold -0.45 -0.25 -0.15 V Soft Start and Tracking Function TRK Active Range Nominal 0 1.7 V TRK Disable Threshold 20 45 70 mV TRK Internal Capacitance 56 pF Soft Start Charge Current 30 50 70 µA Soft Start Discharge Current VTRK = 0.5V 9 mA Soft Start Time tSS Ext CSS = 47nF 1.6 ms [4] See Inductor Pairing section. [5] Assured to meet performance specification by design, test correlation, characterization, and/or statistical process control. [6] Output current capability varies with input & output voltage. See rated ouput current / power curves on page 9. Specifications apply for the conditions -40°C < TJ < 115°C, VIN = 24V, VOUT = 12V, LEXT = 420nH[4], external CIN = 6 x 2.2µF, external COUT = 8 x 10µF, unless otherwise noted.

Cool-Power® ZVS Switching Regulators Rev 1.4 vicorpower.com Page 10 of 48 04/2017 800 927.9474 PI3740-00 Parameter Symbol Conditions Min Typ Max Unit Enable Enable High Threshold ENIH 0.9 1 1.1 V Enable Low Threshold ENIL 0.7 0.8 0.9 V Enable Threshold Hysteresis ENHYS 100 200 300 mV Enable Pin Bias Current VEN = 0V or VEN = 2V ±50 µA Enable Pull-up Voltage Floating 2.0 V Fault Restart Delay Time tFR_DLY 30 ms Digital Signals SYNCI High Threshold VDR = 5.1V 1/2 VDR V SYNCO High SYNCOOH VDR – 0.5 VDR V SYNCO Low SYNCOOL ISYNCOUT = 1mA 0.5 V PGD High Leakage PGDILH VPGD = VDR 10 µA PGD Output Low PGDOL IPGD = 4mA 0.4 V PGD EAIN Low Rise 1.41 1.45 1.48 V PGD EAIN Low Fall 1.36 1.41 1.46 V PGD EAIN Threshold Hysteresis 35 mV PGD EAIN High 1.94 2.04 2.14 V [4] See Inductor Pairing section. [5] Assured to meet performance specification by design, test correlation, characterization, and/or statistical process control. [6] Output current capability varies with input & output voltage. See rated ouput current / power curves on page 9. Specifications apply for the conditions -40°C < TJ < 115°C, VIN = 24V, VOUT = 12V, LEXT = 420nH[4], external CIN = 6 x 2.2µF, external COUT = 8 x 10µF, unless otherwise noted.

Cool-Power® ZVS Switching Regulators Rev 1.4 vicorpower.com Page 19 of 48 04/2017 800 927.9474 PI3740-00 Figure 36 — PI3740-00 calculated MTBF Telcordia SR-332 GB MTBF 100 1000 -60 -40 -20 02 04 06 08 01 00 1201 40 MTBF (Mhrs) Temperature (°C) MTBF Calculations Over Temperature Using Telcordia SR-332

Cool-Power® ZVS Switching Regulators Rev 1.4 vicorpower.com Page 20 of 48 04/2017 800 927.9474 PI3740-00 Functional Description The PI3740-00 is a highly integrated ZVS Buck-Boost regulator. The PI3740-00 has an adjustable output voltage that is set with a resistive divider. Performance and maximum output current are characterized with a specific external power inductor as defined in the electrical specifications, and in the inductor pairing section. For basic operation, Figure 37 shows the minimum connections and components required. Enable The EN pin of the regulator is referenced to SGND and permits the user to turn the regulator on or off. The EN polarity is a positive logic assertion. If the EN pin is left floating or asserted high, the regulator output is enabled. Pulling the EN pin below 0.8VDC with respect to SGND will discharge the TRK pin until the output reaches zero or the EN pin is released. When the converter is disabled via the EN pin or due to a fault mode, the internal gate driver high side charge pumps are enabled as long as there is enough input voltage for the internal VDR supply voltage to be available. The return path for this charge pump supply is through the output. If the output load is disconnected or high impedance, the output capacitors will float up to about 3.4V maximum, sourced by 960µA of leakage current. This pre-biased condition poses no issue for the converter. The 960µA leakage current may be safely bypassed to SGND. A simple application circuit is available to bypass this current in a non-dissipative manner. Please contact Applications Engineering for details. Switching Frequency Synchronization The SYNCI input allows the user to synchronize the controller switching frequency to the falling edge of an external clock referenced to SGND. The external clock can synchronize the unit between 50% and 110% of the preset switching frequency (FSW). The SYNCI pin should be connected to SGND when not in use, and should never be left floating. Soft-Start and Tracking The PI3740-00 provides a soft start and tracking feature using the TRK pin. Programmable Soft Start requires an external capacitor from the TRK pin to SGND in addition to the internal 56pF soft-start capacitor to set the start-up ramp period equal to tSS. The recommended value is 47nF. The PI3740-00 internal reference and regulated output will proportionally follow the TRK ramp when it is below 1.7VDC. When the ramp is greater than 1.7VDC, the internal reference will remain at 1.7VDC while the TRK ramp rises and clamps at 2.5VDC. If the TRK pin goes below the disable threshold, the regulator will finish the current switching cycle and then stop switching. Remote Sensing Differential Amplifier A general purpose operational amplifier is provided to assist with differential remote sensing and/or level shifting of the output voltage. The VDIFF pin can be connected to the transconductance error amplifier input EAIN pin, or with proper configuration can also be connected to the EAO pin to drive the modulator directly. If unused, connect in unity gain with VSP connected to SGND. Power Good The PI3740-00 PGD pin functions as a power good indicator and pulls low when the regulator is not operating or if EAIN is less than 1.4V. Output Current Limit Protection PI3740-00 has three methods implemented to protect from output short circuit or over current condition. Slow Current Limit protection: prevents the regulator load from sourcing current higher than the maximum rated regulator current. If the output current exceeds the VOUT Slow Current Limit (VOUT_SCL) a slow current limit fault is initiated and the regulator is shutdown, which eliminates output current flow. After the Fault Restart Delay (tFR_DLY ), a soft-start cycle is initiated. This restart cycle will be repeated indefinitely until the excessive load is removed. Fast Current Limit protection : monitors the external inductor current pulse-by-pulse to prevent the output from supplying saturation current. If the regulator senses a high inductor current pulse, it will initiate a fault and stop switching. After the Fault Restart Delay (tFR_DLY ), a soft-start cycle is initiated. This restart cycle will be repeated indefinitely until the excessive load is removed. Overload Timeout protection: If the regulator is providing greater than the maximum output power for longer than the Overload Timeout delay (TOL), it will initiate a fault and stop switching. After Fault Restart Delay (tFR_DLY ), a soft-start cycle is initiated. This restart cycle will be repeated indefinitely until the overload load is removed. Input Undervoltage Lockout If VIN falls below the input Undervoltage Lockout (UVLO) threshold, the PI3740-00 will complete the current cycle and stop switching. The system will restart once the input voltage is reestablished. Input Overvoltage Lockout If VIN rises above the input Overvoltage Lockout (OVLO) threshold, the PI3740-00 will complete the current cycle and stop switching. The system will restart once the input voltage is reestablished and after the Fault Restart Delay. PI3740-0010kΩ CIN VIN PGND VS1 VS2 VOUT ISP PGND ISN IMON VSN VSP COMP EAO EAIN VDIFF LGH COUT R1 CHF CCOMP SYNC I TRK SGND EN SYNC O PGD VDR CTRK Figure 37 — PI3740-00 with required components

Cool-Power® ZVS Switching Regulators Rev 1.4 vicorpower.com Page 21 of 48 04/2017 800 927.9474 PI3740-00 Output Overvoltage Protection The PI3740-00 is equipped with two methods of detecting an output over voltage condition. To prevent damage to input voltage sensitive devices, if the output voltage exceeds 20% of its set regulated value as measured by the EAIN pin (V EAIN_OV ), the regulator will complete the current cycle, stop switching and issue an OVP fault. Also if the output voltage of the regulator exceeds the VOUT Overvoltage Threshold (V OUT_OVT ) then the regulator will complete the current cycle, stop switching and issue an OVP fault. The system will resume operation once the output voltage falls below the OVP threshold and after Fault Restart Delay. Overtemperature Protection The PI3740-00 features an over temperature protection (OTP), which will not engage until after the product is operated above the maximum rated temperature. The OTP circuit is only designed to protect against catastrophic failure due to excessive temperatures and should not be relied upon to ensure the device stays within the recommended operating temperature range. Thermal shutdown terminates switching and discharges the soft-start capacitor. As the temperature falls the PI3740-00 will restart, and this will always occur before the product returns to rated temperature range. Pulse Skip Mode (PSM) PI3740-00 features a hysteretic Pulse Skip Mode to achieve high efficiency at light loads. The regulator is setup to skip pulses if VEAO falls below the Pulse Skip Threshold (VEAO_PST ). Depending on conditions and component values, this may result in single pulses or several consecutive pulses followed by skipped pulses. Skipping cycles significantly reduces gate drive power and improves light load efficiency. The regulator will leave Pulse Skip Mode once the control node rises above the Pulse Skip Mode threshold (VEAO_PST ). Variable Frequency Operation The PI3740-00 is preprogrammed to a fixed, maximum, base operating frequency. The frequency is selected with respect to the required power stage inductor to operate at peak efficiency across line and load variations. The switching frequency period will stretch as needed during each cycle to accommodate low line and or high load conditions. By stretching the switching frequency period, thus decreasing the switching frequency, the ZVS operation is preserved throughout the input line voltage range maintaining optimum efficiency. IMON Amplifier The PI3740-00 provides a differential amplifier with a level shifted, SGND referenced output, the IMON Pin, which is useful for sensing input or output current on high voltage rails. A fixed gain of 20:1 is provided over a large common mode range. When using the amplifier, the ISN pin must be referenced to the common mode voltage of the ISP pin for proper operation. See Absolute Maximum Ratings for more information. If not in use, the ISN and ISP pins should be connected to SGND and the IMON pin left floating.

Cool-Power® ZVS Switching Regulators Rev 1.4 vicorpower.com Page 23 of 48 04/2017 800 927.9474 PI3740-00 Filter Considerations The PI3740-00 requires low impedance ceramic input capacitors (X7R/X5R or equivalent) to ensure proper start up and high frequency decoupling for the power stage. The PI3740-00 will draw nearly all of the high frequency current from the low impedance ceramic capacitors when the main high side MOSFET(s) are conducting. During the time the MOSFET(s) are off, the input capacitors are replenished from the source. Table 1 shows the recommended input and output capacitors to be used for the PI3740-00. Divide the total RMS current by the number of ceramic capacitors used to calculate the individual capacitor’s RMS current. Table 2 includes the recommended input and output ceramic capacitor. It is very important to verify that the voltage supply source as well as the interconnecting line are stable and do not oscillate. Input Filter case 1; Inductive source and local, external, input decoupling capacitance with negligible ESR (i.e.: ceramic type) The voltage source impedance can be modeled as a series R line Lline circuit. The high performance ceramic decoupling capacitors will not significantly damp the network because of their low ESR; therefore in order to guarantee stability the following conditions must be verified: Where rEQ_IN can be calculated by dividing the lowest line voltage by the full load input current. It is critical that the line source impedance be at least an octave lower than the converter’s dynamic input resistance, Equation (4). However, Rline cannot be made arbitrarily low otherwise Equation (3) is violated and the system will show instability, due to under- damped RLC input network. Input Filter case 2; Inductive source and local, external input decoupling capacitance with significant RCIN_EXT ESR (i.e.: electrolytic type) In order to simplify the analysis in this case, the voltage source impedance can be modeled as a simple inductor L line. Notice that the high performance ceramic capacitors CIN_INT within the PI3740-00 should be included in the external electrolytic capacitance value for this purpose. The stability criteria will be: Equation (6) shows that if the aggregate ESR is too small – for example by using very high quality input capacitors (CIN_EXT ) – the system will be under-damped and may even become destabilized. Again, an octave of design margin in satisfying Equation (5) should be considered the minimum. Note: When applying an electrolytic capacitor for input filter damping the ESR value must be chosen to avoid loss of converter efficiency and excessive power dissipation in the electrolytic capacitor.Rline > Lline CIN_INT + CIN_EXT • rEQ_IN (3) ( ) Rline << rEQ_IN (4) rEQ_IN > RCIN_EXT (5) Lline CIN_INT • RCIN_EXT (6)< rEQ_IN CINPUT (see Table 2) COUTPUT (see Table 2) 5 X 2.2µF 8 X 10µF or 2.2µF Table 1 — Minimum recommended input and output capacitance Part Number Description MFG Description GRM32ER72A225KA35 2.2µF Capacitor, X7R 20% 100V, 1210 Murata GRM32ER71H106KA12 10µF Capacitor X7R 20% 50V, 1210 Murata Table 2 — Capacitor manufacturer part numbers

Cool-Power® ZVS Switching Regulators Rev 1.4 vicorpower.com Page 24 of 48 04/2017 800 927.9474 PI3740-00 VOUT (V) VIN (V) IOUT (A) CINPUT Ripple Current (IRMS) COUTPUT Ripple Current (IRMS) Input Ripple (mVpp ) Output Ripple COUT = 10µF (mVpp) Output Ripple COUT = 2.2µF (mVpp) 10 8 5.01 5.27 5.70 468 120 333 10 12 5.01 4.50 4.80 285 82 198 10 16 6.02 4.70 5.30 296 88 206 10 18 7.02 5.28 5.95 351 114 244 10 24 7.02 4.66 5.68 274 88 201 10 28 7.42 4.60 5.88 270 90 204 10 36 7.42 4.04 5.73 232 84 183 10 48 6.82 3.30 5.50 200 62 171 10 60 6.02 2.63 5.30 183 62 163 12 8 5.01 6.00 6.20 540 154 375 12 12 6.02 5.80 6.17 432 118 300 12 16 6.62 5.50 6.00 354 119 245 12 18 6.82 5.60 6.15 352 111 244 12 24 7.02 5.00 6.00 290 96 206 12 28 7.02 4.75 5.87 260 89 190 12 36 7.02 4.30 6.00 247 84 193 12 48 6.22 3.45 5.80 220 75 186 12 60 5.21 2.70 5.41 188 64 170 18 8 3.61 5.43 5.51 416 150 310 18 12 5.01 5.71 6.20 372 201 288 18 16 5.41 5.53 5.90 309 125 225 18 18 5.82 5.70 6.00 311 119 223 18 24 6.22 5.73 6.45 319 115 227 18 28 6.22 5.50 6.50 316 116 228 18 36 5.62 4.80 6.35 285 114 217 18 48 5.01 3.90 6.00 257 110 203 18 60 4.21 3.05 5.60 221 107 181 24 8 3.01 6.20 5.54 490 193 319 24 12 4.01 5.50 5.60 312 198 258 24 16 4.61 5.43 5.74 274 134 215 24 18 5.01 5.80 6.00 306 139 229 24 24 5.01 5.80 6.26 330 144 232 24 28 5.01 5.70 6.30 330 146 233 24 36 4.61 5.00 6.20 300 146 222 24 48 4.21 4.20 6.05 282 142 209 24 60 3.61 3.30 5.50 248 136 186

Cool-Power® ZVS Switching Regulators Rev 1.4 vicorpower.com Page 25 of 48 04/2017 800 927.9474 PI3740-00 VOUT (V) VIN (V) IOUT (A) CINPUT Ripple Current (IRMS) COUTPUT Ripple Current (IRMS) Input Ripple (mVpp ) Output Ripple COUT = 10µF (mVpp) Output Ripple COUT = 2.2µF (mVpp) 28 8 2.30 5.50 4.71 390 176 240 28 12 3.61 5.62 5.75 320 230 260 28 16 4.41 5.63 5.88 277 158 230 28 18 4.41 5.80 5.90 300 156 228 28 24 4.61 6.00 6.20 240 164 239 28 28 4.41 5.70 6.20 334 166 233 28 36 4.21 5.20 6.15 315 168 225 28 48 3.61 4.10 5.70 281 162 200 28 60 3.21 3.40 5.36 255 152 184 36 8 1.70 6.00 4.06 357 175 195 36 12 2.41 5.40 4.85 280 170 206 36 16 3.41 5.62 5.47 266 188 217 36 18 3.61 5.85 5.64 290 192 228 36 24 3.61 5.89 5.68 332 196 230 36 28 3.61 5.79 5.77 337 200 231 36 36 3.61 5.44 5.90 337 208 232 36 48 3.21 4.50 5.60 314 196 212 36 60 2.61 3.47 5.00 264 174 180 50 8 1.80 8.30 5.50 740 N/A 444 50 12 2.40 7.07 5.49 425 N/A 336 50 16 2.80 6.36 5.52 306 N/A 340 50 18 3.00 6.55 5.70 322 N/A 360 50 24 2.60 5.87 5.00 319 N/A 316 50 28 2.50 5.56 4.93 320 N/A 312 50 36 2.50 5.20 5.00 323 N/A 316 50 48 2.40 4.60 4.96 300 N/A 324 50 60 2.50 4.20 5.34 342 N/A 332 Table 3 — Typical input and output ripple current / voltage with the recommended input and output capacitor recommended in Tables 1 and 2.

Cool-Power® ZVS Switching Regulators Rev 1.4 vicorpower.com Page 27 of 48 04/2017 800 927.9474 PI3740-00 The following equation can predict the junction temperature based on the heat load applied to the SiP and the known ambient conditions with the simplified thermal circuit model: TINT = (7) TTOP Φ INT-TOP TPCB Φ INT-PCB PD + + Φ INT-TOP Φ INT-PCB Where the symbol in Figure 40 is defined as the following: φINT-TOP is defined as the thermal impedance from the hottest component junction inside the SiP to the top side of the package. φINT-PCB is defined as the thermal impedance from the hottest component junction inside the SiP to the circuit board it is mounted on, assuming all customer PCB connections at one temperature. φINT-VIN is defined as the thermal impedance from the hottest component junction inside the SiP to the circuit board it is mounted on at the VIN pad. φINT-VS1 is defined as the thermal impedance from the hottest component junction inside the SiP to the circuit board it is mounted on at the VS1 pad. φINT-PGND is defined as the thermal impedance from the hottest component junction inside the SiP to the circuit board it is mounted on at the PGND pad. φINT-VS2 is defined as the thermal impedance from the hottest component junction inside the SiP to the circuit board it is mounted on at the VS2 pad. φINT-VOUT is defined as the thermal impedance from the hottest component junction inside the SiP to the circuit board it is mounted on at the VOUT pad. φINT-SGND is defined as the thermal impedance from the hottest component junction inside the SiP to the circuit board it is mounted on at the SGND pad. Device Thermal Impedance Thermal Impedance with the simplified version φINT-TOP (°C / W) φINT-VIN (°C / W) φINT-VS1 (°C / W) φINT-PGND (°C / W) φINT-VS2 (°C / W) φINT-VOUT (°C / W) φINT-SGND (°C / W) φINT-TOP (°C / W) φINT-PCB (°C / W) Table 4 — PI3740-00 SiP Thermal Impedance

Cool-Power® ZVS Switching Regulators Rev 1.4 vicorpower.com Page 29 of 48 04/2017 800 927.9474 PI3740-00 An estimation of SiP power loss to total loss percentage is shown in the following charts. The following equation can predict the junction temperature based on the heat load applied to the inductor and the known ambient conditions with the simplified thermal circuit model: THOT SPOT = (8) TTOP Φ INT-TOP TPCB Φ INT-PCB PD + + Φ INT-TOP Φ INT-PCB Device Thermal Impedance Thermal Impedance with the simplified version φINT-TOP (°C / W) φINT-BOT (°C / W) φINT-TAB (°C / W) φINT-LEAD1 (°C / W) φINT-LEAD2 (°C / W) φINT-TOP (°C / W) φINT-PCB (°C / W) Table 5 — PI3740-00 Inductor Thermal Impedance

Cool-Power® ZVS Switching Regulators Rev 1.4 vicorpower.com Page 44 of 48 04/2017 800 927.9474 PI3740-00 System Design Considerations Inductive Loads: As with all power electronic applications, consideration must be given to driving inductive loads that may be exposed to a fault in the system which could result in consequences beyond the scope of the power supply primary protection mechanisms. An inductive load could be a filter, fan motor or even excessively long cables. Consider an instantaneous short circuit through an un-damped inductance that occurs when the output capacitors are already at an initial condition of fully charged. The only thing that limits the current is the inductance of the short circuit and any series resistance. Even if the power supply is off at the time of the short circuit, the current could ramp up in the external inductor and store considerable energy. The release of this energy will result in considerable ringing, with the possibility of ringing nodes connected to the output voltage below ground. The system designer should plan for this by considering the use of other external circuit protection such as load switches, fuses, and transient voltage protectors. The inductive filters should be critically damped to avoid excessive ringing or damaging voltages. Adding a high current Schottky diode from the output voltage to PGND close to the PI3740-00 is recommended for these applications. Low Voltage Operation: There is no isolation from an SELV (Safety-Extra-Low-Voltage) power system. Powering low voltage loads from input voltages as high as 60V may require additional consideration to protect low voltage circuits from excessive voltage in the event of a short circuit from input to output. A fast TVS (transient voltage suppressor) gating an external load switch is an example of such protection.

Cool-Power® ZVS Switching Regulators Rev 1.4 vicorpower.com Page 45 of 48 04/2017 800 927.9474 PI3740-00 E D PIN 1 INDEX TOP VIEW aaa C (4)PL e SEE NOTE 1 e SEE NOTE 1 DETAIL B PIN 1 INDEX b A2 A SEE NOTE 3 SEATING PLANE bbb C ccc C C b SEE NOTE 2 L b SEE NOTE 2 DETAIL B PAD OPENING (b) ddd M C A B eee M C ddd M C A B eee M C NOTES: 'e' REPRESENTS THE BASIC TERMINAL PITCH. 1. SPECIFIES THE TRUE GEOMETRIC POSITION OF THE TERMINAL AXIS. DIMENSION 'b' APPLIES TO METALLIZED TERMINAL AND IS MEASURED2. BETWEEN 0.00mm AND 0.25mm FROM TERMINAL TIP. DIMENSION 'A' INCLUDES PACKAGE WARPAGE3. EXPOSED METALLIZED PADS ARE Cu PADS WITH SURFACE FINISH4. PROTECTION. 5. RoHS COMPLIANT PER CST-0001 LATEST REVISION. 6. ALL DIMENSIONS ARE IN MM UNLESS OTHERWISE SPECIFIED. A B C D E F G H J K BOTTOM VIEW DETAIL A DETAIL A (SECTION VIEW) BB 10x14mm SiP DIMENSIONAL REFERENCES REF. TOLERANCE OF FORM AND POSITION aaa 0.10 bbb 0.10 ccc 0.08 ddd 0.10 eee 0.08 BB 10x14mm SiP DIMENSIONAL REFERENCES REF. MIN. NOM. MAX. A 2.49 2.56 2.63 A1 -- -- 0.04 A2 -- -- 2.59 b 0.50 0.55 0.60 D 14.00 BSC E 10.00 BSC D1 13.00 BSC E1 9.00 BSC e1 .00 BSC L .175 0.225 .275 Package Drawings

Cool-Power® ZVS Switching Regulators Rev 1.4 vicorpower.com Page 46 of 48 04/2017 800 927.9474 PI3740-00 e e b b PIN 1 PCB LAND PATTERN BB 10x14mm SiP DIMENSIONAL REFERENCES REF. MIN. NOM. MAX. b 0.50 0.55 0.60 D1 13.00 BSC E1 9.00 BSC e 1.00 BSC Receiving PCB Pattern Design Recommendations Recommended receiving footprint for PI3740-00 10mm x 14mm package. All pads should have a final copper size of 0.55mm x 0.55mm, whether they are solder-mask defined or copper defined, on a 1mm x 1mm grid. All stencil openings are 0.45mm when using either a 5mil or 6mil stencil.

Cool-Power® ZVS Switching Regulators Rev 1.4 vicorpower.com Page 47 of 48 04/2017 800 927.9474 PI3740-00

Revision History

Revision Date Description Page Number(s) 1.0 02/10/17 Initial Release n/a 1.1 02/27/17 Current Sense Amplifier clarifications 8 1.2 03/10/17 Miscellaneous typo corrections 7 1.3 03/31/17 Correct LGH pin name Include additional PCB Pattern information 1.4 04/27/17 Correct Absolute Min rating for VIN 3

Cool-Power® ZVS Switching Regulators Rev 1.4 vicorpower.com Page 48 of 48 04/2017 800 927.9474 PI3740-00 Vicor Corporation

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