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Technical content

Features

1.35V/ 1.5V/1.8V 14 bit 2:1 DDR3/DDR4 Switch Î Î14 bit 2:1 switch that supports DDR3 800 2133Mbps, DDR4 1600~4266 Mbps Î ÎVDD 1.35V/ 1.5V/ 1.8V Î ÎFlow through pinout option for easy layout Î ÎSEL and Global Enable Î Î110 µA typ. operating current at 1.35V VDD. Î ÎHigh impedance and low Coff channel output when disabled or deselected Î ÎLow RON: 8Ω typical Î Î3dB Bandwidth: 3.3GHz Î ÎLow insertion loss: -0.7dB (0 ≤ f ≤ 1 GHz) Î ÎLow return loss: -23dB (0 ≤ f ≤ 1 GHz) Î ÎLow cross-talk for high speed channels: -25dB typ. (0<f<2GHz) Î ÎLow off-isolation: -28dB (0 ≤ f ≤ 1 GHz) Î ÎLow bit-to-bit skew 20ps Max Î ÎESD: 2KV HBM Î ÎPOD_12, SSTL_12, SSTL_135, SSTL_15 or SSTL_18 signaling Î ÎPackaging (Pb-free and Green) à 5 2 pin TQFN (3.5x9mm) à 4 8 pin TFBGA (4.5x4.5mm)pin compatible with CBTW28DD14 B11 C11 B10 C10 V GND EN DD A13 A12 A11 V DD A10 GND V DD SEL GND B13 C13 B12 C12 GND GND Application Î ÎDDR3/DDR4 Memory Bus System Î ÎNVDIMM Module Î ÎFlash Memory Array sub system Î ÎHigh Speed multiplexing 14-0169

www.pericom.com 10/23/14 PI2DDR3212 1.35V/ 1.5V/1.8V 14 bit 2:1 DDR3/DDR4 Switch B10 B11 B12 B13 A10 A11 A12 A13 C10 C11 C12 C13 SEL EN LOGIC CONTROL Block Diagram Application SSD, Flash storage application using PI2DDR3212 Supercapacitor 14-0169

www.pericom.com 10/23/14 PI2DDR3212 1.35V/ 1.5V/1.8V 14 bit 2:1 DDR3/DDR4 Switch Pin Name IO Ty pe Descriptions VDD Power 1.35V, 1.5V or 1.8V power supply. GND Ground 1.35V, Ground connection A[0:13] I/O 14-bit wide input/output, port A B[0:13] I/O 14-bit wide input/output, port B C[0:13] I/O 14-bit wide input/output, port C SEL I CMOS input for channel selection EN I CMOS input When HIGH, connection is set using the SEL input signal When LOW, all ports are mutually isolated EN Function

1 Global Enable

0 Global Disable

Truth Table (SEL) Truth Table (EN) SEL Function

0 Output B is selected

1 Output C is selected

www.pericom.com 10/23/14 PI2DDR3212 1.35V/ 1.5V/1.8V 14 bit 2:1 DDR3/DDR4 Switch All Inputs Ambient Operating Temperature Storage Temperature Junction Temperature Soldering Temperature 60°C Note: Stresses greater than those listed under MAXI- MUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Maximum Ratings (Above which useful life may be impaired. For user guidelines, not tested.) Recommended Operation Conditions Parameter Min. Ty p. Max. Unit Ambient Operating Temperature -10 +85 °C Power Supply Voltage (measured in respect to GND) +1.28 1.8 +2.0 V Static Characteristics Symbol Parameter Conditions Min. Ty p. Max. Unit VDD Supply Voltage 1.28 1.35/ 1.5 / 1.8 2 V IDD VDD Supply Current EN= HIGH; VDD=1.8V 220 350 μA EN= LOW; VDD=1.8V 0.1 10 μA IDD VDD Supply Current EN= HIGH; VDD=1.35V 110 200 μA EN= LOW; VDD=1.35V 0.05 2 μA Control pin (SEL, EN) IIH High level digital input current VIH=VDD, VDD=2.0V 5 μA IIL Low level digital input current VIL = GND, VDD=2.0V 5 μA VIH High level digital input voltage 0.8 DD V VIL Low level digital input voltage 0.2*VDD V I/O pin (A, B ,C) COFF Switch OFF capacitance f = 1MHz; VI/O = 0V 1.1 pF CON Switch ON capacitance f = 1MHz; VI/O = 0V 2.1 pF 14-0169

www.pericom.com 10/23/14 PI2DDR3212 1.35V/ 1.5V/1.8V 14 bit 2:1 DDR3/DDR4 Switch Dynamic Characteristics (over recommended operating conditions unless otherwise noted) Symbol Parameter Test Conditions Min. Ty p.(1) Max. Units tstartup Startup time Supply voltage valid or EN going HIGH to channels specified characteristics 5 10 µs trcfg Reconfiguration time SEL state change to channel specified operating characteristics 0.02 0.04 tpd Propagation delay From A port to B port or C port or vice versa 60 ps tsk Skew time From any output to any output 18 20 ps VI Input Voltage -0.3 Vdd+0.3 V B Bandwidth -3dB intercept 3.3 GHz C Crosstalk attenuation Adjacent channels are on; 0 ≤ f ≤ 1GHz -26 dB IL Insertion Loss 0 ≤ f ≤ 1GHz -0.7 dB f = 2.5GHz -2.5 dB RL Input Return Loss 0 ≤ f ≤ 1GHz -23 dB OI Off Isolation 0 ≤ f ≤ 1 GHz -28 dB 14-0169

www.pericom.com 10/23/14 PI2DDR3212 1.35V/ 1.5V/1.8V 14 bit 2:1 DDR3/DDR4 Switch Packaging Mechanical: 48-Pin TFBGA DESCRIPTION: 48-pin, Thin Fine Pitch Ball Grid Array PACKAGE CODE: NC (NC48) DOCUMENT CONTROL #: PD-2103 REVISION: -- DATE: 07/21/11 14-0169

www.pericom.com 10/23/14 PI2DDR3212 1.35V/ 1.5V/1.8V 14 bit 2:1 DDR3/DDR4 Switch Pericom Semiconductor Corporation • 1-800-435-2336

Ordering Information

Ordering Code Packaging Code Package Description PI2DDR3212ZLE ZL 52-Pin, Thin Quad Flat No-Lead (TQFN) PI2DDR3212NCE NC 48-Pin, Thin Fine Pitch Ball Grid Array (TFBGA) NOTES: 1. Thermal characteristics can be found on the company web site at www.pericom.com/package 2. E = Pb-free and Green 3. Adding an X suffix = Tape/Reel Packaging Mechanical: 52-Pin TQFN (ZL) DATE: 07/15/11 DESCRIPTION: 52-Pin, Thin Quad Flat No-Lead (TQFN) PACKAGE CODE: ZL (ZL52) DOCUMENT CONTROL #: PD-2102 REVISION: -- Notes: 1. All dimensions are in millimeters. 2. Refer JEDEC MO-220 3. Bilateral coplanarity zone applies to the exposed heat sink slug aswell as the terminals. 14-0169