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Technical content

Features

 3-wire (SPI compatible) serial interface with built-in bias voltage generation and ESD protection  DuNE™ technology enhanced  5-bit 32-state Digitally Tunable Capacitor  Shunt configuration C = 0.9 pF to 4.6 pF (5.1:1 tuning ratio) in discrete 119 fF steps  High RF power handling (30 Vpk RF) and linearity  Wide power supply range (2.3V to 4.8V) and low current consumption (typ. 140 μA at 2.75V)  High ESD tolerance of 2kV HBM on all pins  Applications include:  Tunable antennas  Tunable matching networks  Tunable filter networks  Phase shifters DOC-02169

Table 1. Electrical Specifications @ 25°C, VDD = 2.75V (In shunt configuration, RF- connected to GND)

2.8 GHz

  1. In shunt between 50 Ω ports. Pulsed RF input with 4620 µS period, 50% duty cycle, measured per 3GPP TS 45.005
  2. DC path to ground at RF– must be pr ovided to achieve specified performance
  3. State change activated on falling edge of SEN following data word

1 RF- Negative RF port 1

2 RF- Negative RF port 1

3 GND Ground 2

4 V DD Power supply pin

5 SCL Serial interface clock input

6 SEN Serial interface latch enable input

7 SDA Serial interface data input

8 RF+ Positive RF port

9 RF+ Positive RF port 1

10 GND Ground 2

Table 3. Operating Ranges Figure 3. Pin Configuration (Top View) Table 2. Pin Descriptions to the limits in the Operating Ranges table. Table 4. Absolute Maximum Ratings devices are immune to latch-up. exceeding the specified rating.

  1. Node voltages defined per Equivalent Circuit Model Schematic
  2. For optimal performance, recommend tying Pins 3, 10 and

Figure 5. Measured Shunt S 11 (major states) Figure 7. Measured Shunt C vs Frequency Figure 4. Measured Shunt C (@ 100 MHz) vs State

100 MHz

1000 MHz

2000 MHz

Figure 6. Measured Step Size vs State

Figure 8. Measured Shunt Q vs Frequency Figure 10. Measured Self Resonance Frequency Figure 9. Measured Shunt Q vs State

698 MHz

960 MHz

1710 MHz

2170 MHz

Figure 13. Equivalent Circuit Model Schematic in circuit simulation programs. Table 7. Equivalent Circuit Model Parameters Table 8. Equivalent Circuit Data

0.10 C A B

0.60 MAX

Figure 22. Top Marking Specifications Figure 21. Package Drawing

  1. Dimensions and tolerances per

Figure 23. Tape and Reel Specifications Table 10. Ordering Information specifications for product development. Specifications and features may change in any manner without notice. of this information. Use shall be entirely at the user’s own risk. No patent rights or licenses to any circuits described in this datasheet are implied or granted to any third party. are trademarks of Peregrine Semiconductor Corp. For sales and contact information please visit www.psemi.com.