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Features
Monolithic drop in solution with no external components required Adjustable power limiting threshold from +22 dBm to +32 dBm Max power handling +47 dBm Pulsed (50W) +40 dBm CW (10W) Unbiased power limiting operation Fast response and recovery time of 1 ns Dual mode operation Power limiting mode Power reflecting mode Superior ESD rating and ESD protection 8 kV HBM on RF pins to GND Figure 2. Package Type
Document No. DOC-44014-3 │ UltraCMOS® RFIC Solutions ©2014 Peregrine Semiconductor Corp. All rights reserved. Table 1. Electrical Specifications @ +25°C (ZS = ZL = 50Ω), unless otherwise noted Notes: 1. Measured with +40 dBm CW applied at input. circuit is a low impedance to ground, reflecting most of the incident power back to the source.
- State change is V CTRL toggle from –2.5V to +2.5V.
Figure 3. Pin Configuration (Top View) Table 2. Pin Descriptions
2 RF1 RF port 1
5 V CTRL Control
8 RF2 RF port 2
11 V DD Supply voltage
Table 3. Operating Ranges
1 PMAX,CW 40 dBm
Table 4. Absolute Maximum Ratings periods may reduce reliability.
- Machine Model (JEDEC JESD22-A115)
- Charged Device Model (JEDEC JESD22-C101)
- Pulsed, 0.1% duty cycle of 1 µs pulse width in 10 min, 50 Ω
- VCTRL = 0V or VCTRL pin left not connected
Document No. DOC-44014-3 │ UltraCMOS® RFIC Solutions ©2014 Peregrine Semiconductor Corp. All rights reserved. Latch-Up Avoidance Unlike conventional CMOS devices, UltraCMOS devices are immune to latch-up. Electrostatic Discharge (ESD) Precautions When handling this UltraCMOS device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rating specified. Moisture Sensitivity Level The Moisture Sensitivity Level rating for the PE45140 in the 12-lead 3x3 mm QFN package is MSL1. Dual Mode Operation Power Limiting Mode The PE45140 performs as a linear power limiter with adjustable P1dB / limiting threshold. The P1dB / limiting threshold can be adjusted by changing the control voltage between –2.5V and –0.5V. If unbiased, or if V CTRL = 0V, the PE45140 still offers power limiting protection. Power Reflecting Mode Power reflecting mode requires a power detector to sample the RF input power and a microcontroller to toggle the limiter control voltage between +2.5V and –2.5V based on the system protection requirements. At +2.5V, the limiter impedance to ground is less than 1Ω and most of the incident power will be reflected back to the source. At –2.5V, the device operates as in power limiting mode. Preliminary Specification
maximum junction temperature. made to alleviate solder voiding under the part. Table 5. Theta JC
Figure 15. Evaluation Board Layout
Document No. DOC-44014-3 │ UltraCMOS® RFIC Solutions ©2014 Peregrine Semiconductor Corp. All rights reserved.
50 OHM50 OHM 50 OHM
1 GND2 RF13 GND
4 GND5 VCTRL6 GND
13 DAP
Figure 16. Evaluation Board Schematic
0.10 C A B
Figure 17. Package Drawing Figure 18. Top Marking Specifications
Document No. DOC-44014-3 │ UltraCMOS® RFIC Solutions ©2014 Peregrine Semiconductor Corp. All rights reserved. specifications for product development. Specifications and features may change in any manner without notice. of this information. Use shall be entirely at the user’s own risk. No patent rights or licenses to any circuits described in this datasheet are implied or granted to any third party. For sales and contact information please visit www.psemi.com. Table 6. Ordering Information Figure 19. Tape and Reel Drawing