DATASHEET SEARCH SITE | WWW.ALLDATASHEET.COM
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 11
Technical content
Features
Attenuation: 6 dB / 12 dB steps to 18 dB Fast switching time of 29 ns Low attenuation error 0.10 dB @ 2 GHz 0.15 dB @ 3 GHz High linearity +61 dBm IIP3 @ 1950 MHz Wide supply range of 2.3V to 5.5V 1.8V control logic compatible 105°C operating temperature ESD performance 2 kV HBM on all pins 100V MM on all pins 1 kV CDM on all pins Parallel control Product Description The PE43205 is a 50Ω, HaRP™ technology-enhanced fast switching 2-bit RF Digital Step Attenuator (DSA) designed for use in 3G/4G wireless infrastructure and other high performance RF applications. This DSA is a pin-compatible upgraded version of the PE43204 with a wider frequency and power supply range, and extended operating temperature range. Covering an 18 dB attenuation range in 6 dB and 12 dB steps, it maintains high RF performance and low power consumption from 35 MHz through 6 GHz. PE43205 is offered in a 12-lead 3x3 mm QFN package. In addition, no external blocking capacitors are required if 0 VDC is present on the RF ports. The PE43205 is manufactured on Peregrine’s UltraCMOS ® process, a patented variation of silicon-on- insulator (SOI) technology on a sapphire substrate. Peregrine’s HaRP™ technology enhancements deliver high linearity and excellent harmonics performance. It is an innovative feature of the UltraCMOS process, offering the performance of GaAs with the economy and integration of conventional CMOS. Figure 1. Functional Diagram Figure 2. Package Type
Table 1. Electrical Specifications @ +25°C, VDD = 2.3V to 5.5V
35 MHz–2 GHz
Note: * Input 0.1 dB compression point is a linearity figure of merit. Refer to Table 3 for operating RF input power (50Ω).
Table 1A. Electrical Specifications @ +105°C, VDD = 2.3V to 5.5V Parameter Condition Min Typ Max Unit Frequency range 35 6000 MHz Attenuation range 6 dB and 12 dB steps 0–18 dB Insertion loss 2–3 GHz 3–4 GHz 4–5 GHz 5–6 GHz 0.60 0.65 0.80 0.95 1.15 0.70 0.80 0.90 1.20 1.45 dB dB dB dB dB Attenuation error 0 dB–18 dB attenuation settings
2–3 GHz >3–4 GHz >4–5 GHz >5–6 GHz –0.35 –0.45 –0.45 –0.35 –0.45 –0.03 –0.10 –0.15 0.25 0.40 0.25 0.30 0.65 0.85 1.15 dB dB dB dB dB Return loss
2–3 GHz 3–4 GHz 4–5 GHz 5–6 GHz 9.5 dB dB dB dB dB Relative phase All states 2–3 GHz 3–4 GHz 4–5 GHz 5–6 GHz deg deg deg deg deg Input 0.1dB compression point * 200 MHz–6 GHz 30 dBm IIP3 1950 MHz 63 dBm Switching time 50% DC CTRL to 90% or 10% RF 31 ns Note: * Input 0.1 dB compression point is a linearity figure of merit. Refer to Table 3 for operating RF input power (50Ω).
Table 2. Pin Descriptions Figure 3. Pin Configuration (Top View)
1 GND Ground
2 RF1 2 RF1 port
3 NC 1 No connect
4 NC 1 No connect
5 NC 1 No connect
6 NC 1 No connect
7 NC 1 No connect
8 RF2 2 RF2 port
9 GND Ground
10 C2 Attenuation control bit, 12 dB
11 C1 Attenuation control bit, 6 dB
Table 3. Operating Ranges Table 4. Absolute Maximum Ratings periods may reduce reliability.
35 MHz–4 GHz
are not connected to ground internal to the package.
- RF pins 2 and 8 must be at 0 VDC. The RF pins do not
- Machine Model (JEDEC JESD22-A115)
- Charged Device Model (JEDEC JESD22-C101)
exceeding the specified rating. devices are immune to latch-up. Table 5. Attenuation Word Truth Table reaches within 10% or 90% of its target value. Figure 4. Power De-Rating Curve for 35 MHz–4 GHz
header pin and Ground to the GND header pin.
- The mechanical switches in conjunction with the
- The CTL1 and CTL2 pins on the header can be
determined by the voltages on the two control pins. Figure 13. Evaluation Board Layout
Figure 14. Evaluation Board Schematic Notes: 1. Use PCB part number PRT-53374.
- CAUTION: Contains parts and assemblies suscept ible to damage by electrostatic discharge (ESD).
0.10 C A B
Figure 15. Package Drawing Note: Pin 1 identification tab is electrically connected to the exposed ground paddle. Figure 16. Top Marking Specifications
Figure 7. Tape and Reel Drawing specifications for product development. Specifications and features may change in any manner without notice. of this information. Use shall be entirely at the user’s own risk. No patent rights or licenses to any circuits described in this datasheet are implied or granted to any third party. For sales and contact information please visit www.psemi.com. Table 6. Ordering Information