PE42422MLAA-Z PSEMI | Alldatasheet

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©2012-2016 Peregrine Semiconductor Corp. All rights reserved. Table 1. Electrical Specifications @ +25 °C1, VDD = 2.3–5.5V (ZS = ZL = 50Ω), unless otherwise specified

©2012-2016 Peregrine Semiconductor Corp. All rights reserved. Notes: 1. Typical performance over temperature and V DD shown in Figure 5 through Figure 21.

  1. High frequency performance can be improved by external matching (see Figure 22 through Figure 27 and Figure 30).
  2. The input P0.1dB compression point is a linearity figure of merit. Refer to Table 4 for the operating RF input power.

5 MHz

17 MHz

©2012-2016 Peregrine Semiconductor Corp. All rights reserved. Table 5. Absolute Maximum Ratings Notes: 1. V DD within operating range specified in Table 4. 2 . Human Body Model (MIL_STD 883 Method 3015.7).

  1. Machine Model ( JEDEC JESD22-A115-A).

Table 4. Operating Ranges Figure 3. Pin Configuration (Top View) Table 2. Pin Descriptions

1 GND Ground

2 RF21 RF port 2

3 GND Ground

4 GND/NC2 Ground or no connect

5 RFC1 RF common

6 GND Ground

7 GND Ground

8 RF11 RF port 1

9 DGND Digital Ground

10 V1 Switch control input, CMOS logic level

11 LS Logic Select, CMOS logic level

12 VDD Supply

blocking capacitors for proper operation if the 0 VDC requirement is met.

  1. Pin 4 can be grounded or left unconnected externally.

Table 3. Truth Table devices are immune to latch-up. exceeding the specified rating. to the limits in the Operating Ranges table.

©2012-2016 Peregrine Semiconductor Corp. All rights reserved. Figure 4. Power De-rating Curve for 5–6000 MHz

©2012-2016 Peregrine Semiconductor Corp. All rights reserved. Figure 28. Evaluation Board Layout Evaluation Board provides DC and digital inputs to the device.

©2012-2016 Peregrine Semiconductor Corp. All rights reserved. Figure 29. Evaluation Board Schematic

©2012-2016 Peregrine Semiconductor Corp. All rights reserved. Figure 30. Evaluation Board Schematic with Matching

©2012-2016 Peregrine Semiconductor Corp. All rights reserved.

0.60 MAX

Figure 31. Package Drawing

©2012-2016 Peregrine Semiconductor Corp. All rights reserved. Figure 32. Top Marking Specifications

©2012-2016 Peregrine Semiconductor Corp. All rights reserved. Figure 33. Tape and Reel Specifications Table 6. Ordering Information specifications for product development. Specifications and features may change in any manner without notice. of this information. Use shall be entirely at the user’s own risk. No patent rights or licenses to any circuits described in this datasheet are implied or granted to any third party. are trademarks of Peregrine Semiconductor Corp. For sales and contact information please visit www.psemi.com.