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PDTA113Z_SER NEXPERIA | Alldatasheet

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Dear Customer, On 7 February 2017 the former NXP Standard Product business became a new company with the tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS semiconductors with its focus on the automotive, industrial, computing, consumer and wearable application markets In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below. use http://www.nexperia.com salesaddresses@nexperia.com (email) Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on the version, as shown below: reserved Should be replaced with: - © Nexperia B.V. (year). All rights reserved. If you have any questions related to the data sheet, please contact our nearest sales office via e -mail or telephone (details via salesaddresses@nexperia.com). Thank you for your cooperation and understanding, Kind regards, Team Nexperia

1.1 General description

PNP resistor-equipped transistors. [1] Also available in SOT54A and SOT54 variant packages (seeSection2).

1.2 Features

1.3 Applications

1.4 Quick reference data

Table 1. Product overview Table 2. Quick reference data

3 GND (emitter)

2 GND (emitter)

PDTA113Z_SER_4 © NXP B.V. 2009. All rights reserved. [1] Refer to standard mounting conditions. [2] Reﬂow soldering is the only recommended soldering method. [3] Refer to SOT883 standard mounting conditions; FR4 printed-circuit board with 60µm copper strip line. [1] Refer to standard mounting conditions. [2] Reﬂow soldering is the only recommended soldering method. [3] Refer to SOT883 standard mounting conditions; FR4 printed-circuit board with 60µm copper strip line. Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Table 7. Thermal characteristics

PDTA113Z_SER_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 2 September 2009 6 of 18 NXP Semiconductors PDTA113Z series PNP resistor-equipped transistors; R1 = 1 kΩ , R2 = 10 kΩ VCE =−5 V (1) Tamb = 100°C (2) Tamb = 25°C (3) Tamb =−40 °C IC /IB = 20 (1) Tamb = 100°C (2) Tamb = 25°C (3) Tamb =−40 °C Fig 1. DC current gain as a function of collector current; typical values Fig 2. Collector-emitter saturation voltage as a function of collector current; typical values VCE =−0.3 V (1) Tamb =−40 °C (2) Tamb = 25°C (3) Tamb = 100°C VCE =−5 V (1) Tamb =−40 °C (2) Tamb = 25°C (3) Tamb = 100°C Fig 3. On-state input voltage as a function of collector current; typical values Fig 4. Off-state input voltage as a function of collector current; typical values IC (mA) -10-1 -102-10-1 006aaa107 102 103 hFE (1)(2) (3) IC (mA) -1 -102-10 006aaa108 -10-1 VCEsat (V) -10-2 (1) (3) (2) 006aaa109 IC (mA) −10 VI(on) (V) −10−1 (1) (2) (3) IC (mA) −10−1 −10−1 006aaa110 −10 VI(off) (V) −10−1 (1) (3) (2)

PDTA113Z_SER_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 2 September 2009 7 of 18 NXP Semiconductors PDTA113Z series PNP resistor-equipped transistors; R1 = 1 kΩ , R2 = 10 kΩ 8. Package outline Fig 5. Package outline SOT416 (SC-75) UNIT A 1 max bp cD E e1 H E Lp Qw REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 0.1 0.30 0.15 0.25 0.10 1.8 1.4 0.9 0.7 0.5 e 1 1.75 1.45 0.2 v 0.2 DIMENSIONS (mm are the original dimensions) 0.45 0.15 0.23 0.13 SOT416 SC-75 w Mbp D e A Lp Q detail X H E E AB B v M A 0 0.5 1 mm scale A 0.95 0.60 c X Plastic surface-mounted package; 3 leads SOT416 04-11-04 06-03-16

PDTA113Z_SER_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 2 September 2009 8 of 18 NXP Semiconductors PDTA113Z series PNP resistor-equipped transistors; R1 = 1 kΩ , R2 = 10 kΩ Fig 6. Package outline SOT346 (SC-59/TO-236) UNIT A 1 bp cD E e1 H E Lp Qw v REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 0.50 0.35 0.26 0.10 3.1 2.7 1.7 1.3 0.95 e 1.9 3.0 2.5 0.33 0.23 0.20.2 DIMENSIONS (mm are the original dimensions) 0.6 0.2 SOT346 TO-236 SC-59A bp D e A Lp Q detail X H E E w M v M A B A B 0 1 2 mm scale A 1.3 1.0 0.1 0.013 c X Plastic surface-mounted package; 3 leads SOT346 04-11-11 06-03-16

PDTA113Z_SER_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 2 September 2009 9 of 18 NXP Semiconductors PDTA113Z series PNP resistor-equipped transistors; R1 = 1 kΩ , R2 = 10 kΩ Fig 7. Package outline SOT883 (SC-101) UNIT A 1 max.A (1) bb 1 e1eL L 1 REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 0.50 0.46 0.20 0.12 0.55 0.470.03 0.62 0.55 0.35 0.65 DIMENSIONS (mm are the original dimensions) Note 1. Including plating thickness 0.30 0.22 0.30 0.22 SOT883 SC-101 03-02-05 03-04-03 DE 1.02 0.95 L E b A D 0 0.5 1 mm scale Leadless ultra small plastic package; 3 solder lands; body 1.0 x 0.6 x 0.5 mm SOT883 e

PDTA113Z_SER_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 2 September 2009 10 of 18 NXP Semiconductors PDTA113Z series PNP resistor-equipped transistors; R1 = 1 kΩ , R2 = 10 kΩ Fig 8. Package outline SOT54 (SC-43A/TO-92) UNIT A REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 5.2 5.0 b 0.48 0.40 c 0.45 0.38 D 4.8 4.4 d 1.7 1.4 E 4.2 3.6 L 14.5 12.7 e 2.54 1.27 L1(1) max. 2.5 0.66 0.55 DIMENSIONS (mm are the original dimensions) Note 1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities. SOT54 TO-92 SC-43A 04-06-28 04-11-16 A L 0 2.5 5 mm scale b c D b1 L1 d E Plastic single-ended leaded (through hole) package; 3 leads SOT54 e

PDTA113Z_SER_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 2 September 2009 11 of 18 NXP Semiconductors PDTA113Z series PNP resistor-equipped transistors; R1 = 1 kΩ , R2 = 10 kΩ Fig 9. Package outline SOT54A UNIT A REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 5.2 5.0 b 0.48 0.40 c 0.45 0.38 D 4.8 4.4 d 1.7 1.4 E 4.2 3.6 L 14.5 12.7 e 5.08 e1 L2 2.54 (1) max. 0.66 0.55 DIMENSIONS (mm are the original dimensions) Note 1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities. SOT54A 97-05-13 04-06-28 A L 0 2.5 5 mm scale b c D L2d E Plastic single-ended leaded (through hole) package; 3 leads (wide pitch) SOT54A e

PDTA113Z_SER_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 2 September 2009 12 of 18 NXP Semiconductors PDTA113Z series PNP resistor-equipped transistors; R1 = 1 kΩ , R2 = 10 kΩ Fig 10. Package outline SOT54 variant UNIT A REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 5.2 5.0 b 0.48 0.40 c 0.45 0.38 D 4.8 4.4 d 1.7 1.4 E 4.2 3.6 L 14.5 12.7 e 2.54 1.27 L1(1) max max 2.5 2.5 0.66 0.55 DIMENSIONS (mm are the original dimensions) Note 1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities. SOT54 variant A L 0 2.5 5 mm scale b c D b1 L1 d E Plastic single-ended leaded (through hole) package; 3 leads (on-circle) SOT54 variant e 04-06-28 05-01-10

PDTA113Z_SER_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 2 September 2009 13 of 18 NXP Semiconductors PDTA113Z series PNP resistor-equipped transistors; R1 = 1 kΩ , R2 = 10 kΩ Fig 11. Package outline SOT23 (TO-236AB) UNIT A 1 max. bp cD E e1 H E Lp Qw v REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE 04-11-04 06-03-16 IEC JEDEC JEITA mm 0.1 0.48 0.38 0.15 0.09 3.0 2.8 1.4 1.2 0.95 e 1.9 2.5 2.1 0.55 0.45 0.10.2 DIMENSIONS (mm are the original dimensions) 0.45 0.15 SOT23 TO-236AB bp D e A Lp Q detail X H E E w M v M A B AB 0 1 2 mm scale A 1.1 0.9 c X Plastic surface-mounted package; 3 leads SOT23

PDTA113Z_SER_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 2 September 2009 14 of 18 NXP Semiconductors PDTA113Z series PNP resistor-equipped transistors; R1 = 1 kΩ , R2 = 10 kΩ Fig 12. Package outline SOT323 (SC-70) UNIT A 1 max bp cD E e1 H E Lp Qw v REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 0.11.1 0.8 0.4 0.3 0.25 0.10 2.2 1.8 1.35 1.15 0.65 e 1.3 2.2 2.0 0.23 0.13 0.20.2 DIMENSIONS (mm are the original dimensions) 0.45 0.15 SOT323 SC-70 w Mbp D e A B Lp Q detail X c H E E v M A AB y 0 1 2 mm scale A X Plastic surface-mounted package; 3 leads SOT323 04-11-04 06-03-16

This data sheet was changed to reﬂect the new company name NXP Semiconductors, including new legal deﬁnitions and disclaimers. No changes were made to the technical content.
Figure 5 “Package outline SOT416 (SC-75)”: updated
Figure 6 “Package outline SOT346 (SC-59/TO-236)”: updated
Figure 11 “Package outline SOT23 (TO-236AB)”. updated
Figure 12 “Package outline SOT323 (SC-70)”: updated PDTA113Z_SER_3 20050407 Product data sheet - PDTA113ZT_2 PDTA113ZT_2 20040518 Objective data sheet - PDTA113ZT_1 PDTA113ZT_1 20040325 Objective data sheet - -

PDTA113Z_SER_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 2 September 2009 17 of 18 NXP Semiconductors PDTA113Z series PNP resistor-equipped transistors; R1 = 1 kΩ , R2 = 10 kΩ 11. Legal information

11.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Deﬁnitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.

11.2 Deﬁnitions

Draft —The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modiﬁcations or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet —A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales ofﬁce. In case of any inconsistency or conﬂict with the short data sheet, the full data sheet shall prevail.

11.3 Disclaimers

General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes —NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation speciﬁcations and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use —NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications —Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the speciﬁed use without further testing or modiﬁcation. Limiting values —Stress above one or more limiting values (as deﬁned in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale —NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/proﬁle/terms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conﬂict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license —Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control —This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. Quick reference data —The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding.

11.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 12. Contact information For more information, please visit:http://www.nxp.com For sales ofﬁce addresses, please send an email to:salesaddresses@nxp.com Document status[1][2] Product status[3] Deﬁnition Objective [short] data sheet Development This document contains data from the objective speciﬁcation for product development. Preliminary [short] data sheet Qualiﬁcation This document contains data from the preliminary speciﬁcation. Product [short] data sheet Production This document contains the product speciﬁcation.

NXP Semiconductors PDTA113Z series PNP resistor-equipped transistors; R1 = 1 kΩ , R2 = 10 kΩ © NXP B.V. 2009. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 2 September 2009 Document identifier: PDTA113Z_SER_4 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. 13. Contents

Product Information

PDTA113ZU specifications and overview.

Summary

PNP resistor-equipped transistors; R1 = 1 kW, R2 = 10 kW Rev. 04 - 2 September 2009

Description

PNP resistor-equipped transistors; R1 = 1 kW, R2 = 10 kW Rev. 04 - 2 September 2009

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