ACPL-7970 AVAGO | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 18

Technical content

Features

  • 10 MHz internal clock
  • 1-bit, second-order sigma-delta modulator
  • 16 bits resolution no missing codes (12 bits ENOB)
  • 78 dB SNR
  • 6 mV/°C maximum offset drift
  • ±1% maximum gain error
  • Internal reference voltage
  • ±200 mV linear range with single 5 V supply ( ±320 mV full scale)
  • 3 V to 5.5 V wide supply range for digital interface
  • -40° C to +105° C operating temperature range
  • 25 kV/ms common-mode transient immunity
  • Safety and regulatory approvals: – IEC/EN/DIN EN 60747-5-5: 891 Vpeak working insulation voltage – UL 1577: 5000 Vrms/1min isolation voltage – CSA: Component Acceptance Notice #5

Applications

  • Motor phase and rail current sensing
  • Power inverter current and voltage sensing
  • Industrial process control
  • Data acquisition systems
  • General purpose current and voltage sensing
  • Traditional current transducer replacements Functional Block Diagram Σ-∆ MODULATOR/ ENCODER VIN+ SHIELD VIN– BUF VREF LED DRIVER CLK DECODER GND1 VDD1 MDAT MCLK VDD2 GND2

Figure 1. Pin configuration. Table 1. Pin descriptions.

1 VDD1 Supply voltage for signal input side (analog side), relative to GND1

2 VIN+ Positive analog input, recommended input range ±200 mV

3 VIN– Negative analog input, recommended input range ±200 mV (normally connected to GND1)

4 GND1 Supply ground for signal input side

5 GND2 Supply ground for data/clock output side (digital side)

6 MDAT Modulator data output

7 MCLK Modulator clock output

8 VDD2 Supply voltage for data output side, relative to GND2

Table 2. Ordering Information ACPL-7970 is UL recognized with 5000 Vrms/1 minute rating per UL 1577. column to form an order entry. Safety Approval and RoHS compliance. Option datasheets are available. Contact your Avago sales representative or authorized distributor for information.

0.51 (0.020) MIN. 0.65 (0.025) MAX. 4.70 (0.185) MAX. 2.92 (0.115) MIN. Dimensions in millimeters and (inches). Note: Floating lead protrusion is 0.5 mm (20 mils) max. 5678 4321 5˚ TYP. 0.20 (0.008) 0.33 (0.013) 6.35 ± 0.25 (0.250 ± 0.010) 7.62 ± 0.25 (0.300 ± 0.010) 9.80 ± 0.25 (0.386 ± 0.010) 3.56 ± 0.13 (0.140 ± 0.005) 1.080 ± 0.320 (0.100 ± 0.010) Note: Initial or continued variation in the color of the white mold compound is normal and does not affect device performance or reliability. Figure 2.

Gull Wing Surface Mount Option 300 Dimensions in millimeters (inches). Tolerances (unless otherwise specified): xx.xx = 0.01 Lead coplanarity xx.xxx = 0.005 Maximum: 0.102 (0.004) Note: Foating lead protrusion is 0.5 mm (20 mils) max. 5678 4321 A 7970 YYWW 6.350 ± 0.25 (0.025 ± 0.010) 9.80 ± 0.25 1.27 (0.050) 10.9 (0.430) 2.0 (0.080) LAND PATTERN RECOMMENDATION 3.56 ± 0.13 (0.140 ± 0.005) 1.080 ± 0.320 (0.043 ± 0.013) 1.780 (0.070) MAX.1.19 (0.047) MAX. 2.54 (0.100) BSC 12° NOM. 0.20 (0.008) 0.33 (0.013) 0.635 ± 0.25 (0.025 ± 0.010) 7.62 ± 0.25 (0.300 ± 0.010) 9.65 ± 0.25 (0.380 ± 0.010) 0.635 ± 0.130 (0.025 ± 0.005) Figure 3. Regulatory Information The ACPL-7970 is approved by the following organizations: IEC/EN/DIN EN 60747-5-5 Approved with Maximum Working Insulation Voltage VIORM = 891 Vpeak. UL Approval under UL 1577, component recognition program up to VISO = 5000 Vrms/1min. File E55361. CSA Approval under CSA Component Acceptance Notice #5, File CA 88324. Recommended Pb-Free IR Profile Recommended reflow condition as per JEDEC Standard, J-STD-020 (latest revision). Non-Halide Flux should be used.

Table 3. IEC/EN/DIN EN 60747-5-5 Insulation Characteristics [1]

  1. Insulation characteristics are guaranteed only within the safety maximum ratings, which must be ensured by protective circuits within the
  2. Safety-limiting parameters are dependent on ambient temperature. The Input Current, IS,INPUT, derates linearly above 25° C free-air temperature at

a rate of 2.67 mA/°C; the Output Power, PS,OUTPUT, derates linearly above 25° C free-air temperature at a rate of 4 mW/°C. Table 4. Insulation and Safety Related Specifications

Table 5. Absolute Maximum Ratings

  1. DC voltage of up to -2 V on the inputs does not cause latch-up or damage to the device; tested at typical operating conditions.
  2. Transient voltage of 2 seconds up to -6 V on the inputs does not cause latch-up or damage to the device; tested at typical operating conditions.
  3. Absolute maximum DC current on the inputs = 100 mA, no latch-up or device damage occurs.

Table 6. Recommended Operating Conditions

  1. Full scale input range ±320 mV.

Table 7. Electrical Specifications VIN– = 0 V (single-ended connection); tested with Sinc3 filter, 256 decimation ratio. Parameter Symbol Min. Typ.[1] Max. Units Test Conditions/Notes Fig.

  1. All Typical values are at TA = 25° C, VDD1 = 5 V, VDD2 = 5 V.
  2. Beyond the full-scale input range the data output is either all zeroes or all ones.
  3. Because of the switched-capacitor nature of the isolated modulator, time averaged values are shown.
  4. V REF Drift vs. VDD1 can be expressed as –0.4%/V with reference to VREF.

Table 8. Timing Specifications Parameter Symbol Min. Typ. Max. Units Test Conditions/Notes Fig. Figure 4. Data timing. Table 9. Package Characteristics

  1. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 6000 Vrms for 1 second (leakage detection

5-5 Insulation Characteristic Table.

  1. The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous
  2. This is a two-terminal measurement: pins 1–4 are shorted together and pins 5–8 are shorted together.

Integral Nonlinearity (INL) INL is the maximum deviation of a transfer curve from a straight line passing through the endpoints of the ADC transfer function, with offset and gain errors adjusted out. Differential Nonlinearity (DNL) DNL is the deviation of an actual code width from the ideal value of 1 LSB between any two adjacent codes in the ADC transfer curve. DNL is a critical specification in closed-loop applications. A DNL error of less than ±1 LSB guarantees no missing codes and a monotonic transfer function. Offset Error Offset error is the deviation of the actual input voltage corresponding to the mid-scale code (32,768 for a 16-bit system with an unsigned decimation filter) from 0 V. Offset error can be corrected by software or hardware. Gain Error (Full-Scale Error) Gain error includes positive full-scale gain error and negative full-scale gain error. Positive full-scale gain error is the deviation of the actual input voltage correspond - ing to positive full-scale code (65,535 for a 16-bit system) from the ideal differential input voltage (V IN+ – V IN– = +320 mV), with offset error adjusted out. Negative full- scale gain error is the deviation of the actual input voltage corresponding to negative full-scale code (0 for a 16-bit system) from the ideal differential input voltage (V IN+ – VIN– = -320 mV), with offset error adjusted out. Gain error includes reference error. Gain error can be corrected by software or hardware. Signal-to-Noise Ratio (SNR) The SNR is the measured ratio of AC signal power to noise power below half of the sampling frequency. The noise power excludes harmonic signals and DC. Signal-to-(Noise + Distortion) Ratio (SNDR) The SNDR is the measured ratio of AC signal power to noise plus distortion power at the output of the ADC. The signal power is the rms amplitude of the fundamental input signal. Noise plus distortion power is the rms sum of all non-fundamental signals up to half the sampling frequency (excluding DC). Effective Number of Bits (ENOB) The ENOB determines the effective resolution of an ADC, expressed in bits, defined by ENOB = (SNDR − 1.76)/6.02 Isolation Transient Immunity (CMR) The isolation transient immunity (also known as Common- Mode Rejection or CMR) specifies the minimum rate-of- rise/fall of a common-mode signal applied across the isolation boundary beyond which the modulator clock or data is corrupted. Product Overview

Description

The ACPL-7970 isolated sigma-delta ( ∑-∆) modulator converts an analog input signal into a high-speed (10 MHz typical) single-bit data stream by means of a sigma- delta over-sampling modulator. The time average of the modulator data is directly proportional to the input signal voltage. The modulator uses internal clock of 10 MHz. The modulator data are encoded and transmitted across the isolation boundary where they are recovered and decoded into high-speed data stream of digital ones and zeros. The original signal information is represented by the density of ones in the data output. The other main function of the modulator (optocoupler) is to provide galvanic isolation between the analog signal input and the digital data output. It provides high noise margins and excellent immunity against isolation-mode transients that allows direct measurement of low-level signals in highly noisy environments, for example mea - surement of motor phase currents in power inverters. With 0.5 mm minimum DTI, the ACPL-7970 provides reliable double protection and high working insulation voltage, which is suitable for fail-safe designs. This out - standing isolation performance is superior to alternatives including devices based on capacitive- or magnetic- coupling with DTI in micro-meter range. Offered in an DIP-8 package, the isolated ADC delivers the reliability, small size, superior isolation and over-temperature perfor- mance motor drive designers need to accurately measure current at much lower price compared to traditional current transducers.

range, for purpose of over-current or overload detection. only common mode noise which is rejected by the device. signal source that is subject to frequent transient noise. such as motor drive and other power inverter systems. inputs with no latch-up or damage to the device. input of -320 mV or lower will result in all zeros ideally. Table 5 shows this relationship. Figure 14. Analog input equivalent circuit. Figure 15. Simplified differential input connection diagram.

0 V (ANALOG INPUT)

Figure 16. Modulator output vs. analog input.

Table 10. Input voltage with ideal corresponding density of 1s at modulator data output, and ADC code.

  1. With bipolar offset binary coding scheme, the digital code begins with digital 0 at –FS input and increases proportionally to the analog input until

the full-scale code is reached at the +FS input. The zero crossing occurs at the mid-scale input.

  1. Ideal density of 1s at modulator data output can be calculated with VIN/640 mV + 50%; similarly, the ADC code can be calculated with (VIN/640 mV)

× 65,536 + 32,768, assuming a 16-bit unsigned decimation filter. and between pins VDD2 and GND2 of the ACPL-7970. Figure 17. Typical application circuit with a Sinc3 filter. responding input voltages are shown in Table 5.

5 V using a simple zener diode (D1); the value of resistor

former or a high-frequency DC-DC converter. frequencies and interfering with the input signal. than the body of the isolated modulator. minimizing power dissipation and maximizing accuracy. by utilizing the full input range of the isolated modulator. resistance in this case would be about 10 mΩ. which is about 1 W in the previous example. Figure 20. Motor Output Horsepower vs. Motor Phase Current and Supply.

ticular requirements of a specific design. away more heat, or by using a heat sink. have no impact on the measured voltage. the increased power dissipation at higher currents. magnetic fields from interfering with the measured signal. can accomplish the same thing. Table 11. Isotek (Isabellenhütte) four-terminal shunt summary.

120 Vac – 440 Vac

Note: Values in brackets are a heatsink for the shunt.

being measured across the current shunt. drive circuit should be the positive power supply line. connected this way, both input pins should be bypassed. spaced traces on a PC board. Figure 21. Schematic for three conductor shunt connection.

For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright © 2005-2012 Avago Technologies. All rights reserved. AV02-2856EN - November 29, 2012 Voltage Sensing The ACPL-7970 can also be used to isolate signals with amplitudes larger than its recommended input range with the use of a resistive voltage divider at its input. The only restrictions are that the impedance of the divider be relatively small (less than 1 kΩ) so that the input resistance (24 kΩ) and input bias current (0.3 mA) do not affect the accuracy of the measurement. An input bypass capacitor is still required, although the damping resistor is not (the resistance of the voltage divider provides the same function). The low-pass filter formed by the divider resis - tance and the input bypass capacitor may limit the achiev- able bandwidth. To obtain higher bandwidth, the input bypass capacitor (C2) can be reduced, but it should not be reduced much below 1000 pF to maintain adequate input bypassing of the isolated modulator.