N04M1618L1A NANOAMP | Alldatasheet

Document overview

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Technical content

Features

  • Dual Power Supply for lowest power 1.4 to 2.3 Volts - VCC 1.4 to 3.6 Volts - VCCQ
  • Very low standby current 400nA at 2.0V and 37 deg C Maximum
  • Very low operating current 0.7mA at 1.8V and 1µs (Typical)
  • Low Page Mode operating current 0.5mA at 1.8V and 1µs (Typical)
  • Simple memory control Dual Chip Enables (CE1 and CE2) Byte control for independent byte operation Output Enable (OE ) for memory expansion
  • Low voltage data retention Vcc = 1.2V
  • Automatic power down to standby mode
  • Special Processing to reduce Soft Error Rate (SER)
  • Space saving BGA package available Pin Configuration Product Family Part Number Package Type Operating Temperature Power Supply (Vcc)/(VccQ) Speed Standby Current (ISB), Max Operating Current (Icc), Max N04M1618L1AB 48 - BGA -40oC to +85oC 1.4V - 2.3V 1.4V - 3.6V 85ns @ 1.7V 150ns @ 1.4V 10 µA3 m A @ 1 M H zN04M1618L1AT 44 - TSOP II N04M1618L1AD Known Good Die PIN ONE N04M1618L2AT TSOP LB# OE# A 0 A 1 A2 CE2 I/O8 UB# A 3 A 4 CE1# I/O 0 I/O9 I/O 10 A 5 A 6 I/O 1 I/O 2 VSS I/O11 A 17 A7 I/O3 VCCQ VCC I/O12 NC A 16 I/O4 VSS I/O14 I/O13 A14 A15 I/O5 I/O6 I/O15 NC A 12 A13 WE# I/O 7 NC A 8 A9 A10 A11 NC

48 Pin BGA (top)

A B C D E F G H 1 2 3 4 5 6 6 x 8 mm CE1# I/O0 I/O1 I/O2 I/O3 VCC VSS I/O15 I/O14 I/O13 I/O12 WE# A16 A15 A14 A13 A12 OE# UB# LB# I/O I/O5 I/O6 I/O7 VSS VCCQ I/O11 I/O10 I/O9 I/O8 CE2 A10 A11 A17 Pin Descriptions Pin Name Pin Function A0-A17 Address Inputs WE Write Enable Input CE1, CE2 Chip Enable Input OE Output Enable Input LB Lower Byte Enable Input UB Upper Byte Enable Input I/O0-I/O15 Data Inputs/Outputs VCC Power VCCQ Input/Output Power VSS Ground NC Not Connected

Stock No. 23209-01 11/01/02 2 The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. NanoAmp Solutions, Inc. N04M1618L1A Functional Block Diagram Functional Description CE1 CE2 WE OE I/O0 - I/O7 MODE POWER H X X X High Z Standby1 1. When the device is in standby mode, control inputs (WE and OE), address inputs and data input/outputs are internally isolated from any external influence and disabled from exerting any influence externally. Standby X L X X High Z Standby1 Standby LHL X2 2. When WE is invoked, the OE input is internally disabled and has no effect on the circuit. Data In Write2 Active LHHL D a t a O u t Read Active L H H H High Z Active Active Capacitance1 1. These parameters are verified in device characterization and are not 100% tested Item Symbol Test Condition Min Max Unit Input Capacitance CIN VIN = 0V, f = 1 MHz, TA = 25oC 8p F I/O Capacitance CI/O VIN = 0V, f = 1 MHz, TA = 25oC 8p F Control Logic Decode Logic Address Inputs A0 - A17 WE OE Input/ Output Mux and Buffers I/O0 - I/O7 UB LB I/O8 - I/O15 Address CE1 256K x 16 Memory Array

Stock No. 23209-01 11/01/02 3 The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. NanoAmp Solutions, Inc. N04M1618L1A Absolute Maximum Ratings1 1. Stresses greater than those listed above may cause permanent dam age to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Item Symbol Rating Unit Voltage on any pin relative to VSS VIN,OUT –0.3 to VCC+0.3 V Voltage on VCC Supply Relative to VSS VCC –0.3 to 4.5 V Power Dissipation PD 500 mW Storage Temperature TSTG –40 to 125 oC Operating Temperature TA -40 to +85 oC Soldering Temperature and Time TSOLDER 240oC, 10sec(Lead only) oC Operating Characteristics (Over Specified Temperature Range) Item Symbol Test Conditions Min. Typ1 1. Typical values are measured at Vcc=Vcc Typ., T A=25°C and not 100% tested. Max Unit Core Supply Voltage VCC 1.4 1.8 2.3 V I/O Supply Voltage VCCQ VCCQ > or = VCC 1.4 1.8 3.6 V Data Retention Voltage VDR Chip Disabled3 1.2 V Input High Voltage VIH VCCQ-0.6 V CCQ+0.3 V Input Low Voltage VIL –0.3 0.6 V Output High Voltage VOH IOH = 0.2mA V CCQ–0.2 V Output Low Voltage VOL IOL = -0.2mA 0.2 V Input Leakage Current ILI VIN = 0 to VCC 0.1 µA Output Leakage Current ILO OE = VIH or Chip Disabled 0.1 µA Read/Write Operating Supply Current @ 1 µs Cycle Time2 2. This parameter is specified with the out puts disabled to avoid external loading effects. The user must add current required to drive output capacitance expected in the actual system. ICC1 VCC=2.3 V, VIN=VIH or VIL Chip Enabled, IOUT = 0 1.5 2.5 mA Read/Write Operating Supply Current @ 85 ns Cycle Time2 ICC2 VCC=2.3 V, VIN=VIH or VIL Chip Enabled, IOUT = 0 10.0 13.0 mA Page Mode Operating Supply Current @ 85 ns Cycle Time2 (Refer to Power Savings with Page Mode Operation diagram) ICC3 VCC=2.3 V, VIN=VIH or VIL Chip Enabled, IOUT = 0 3.5 mA Read/Write Quiescent Operating Sup- ply Current3 3. This device assumes a standby m ode if the chip is disabled (CE1 high or CE2 low). In order to achieve low standby current all inputs must be within 0.2 volts of either VCC or VSS. ICC4 VCC=2.3 V, VIN=VIH or VIL Chip Enabled, IOUT = 0, f = 0 0.2 µA Standby Current3 ISB1 VIN = VCC or 0V Chip Disabled tA= 85oC, VCC = 2.3 V 0.2 20.0 µA Data Retention Current3 IDR VCC = 1.8V, VIN = VCC or 0 Chip Disabled, tA= 85oC 0.1 1.0 µA

Stock No. 23209-01 11/01/02 4 The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. NanoAmp Solutions, Inc. N04M1618L1A Power Savings with Page Mode Operation (WE = VIH) Note: Page mode operation is a method of addressing the SRAM to save operating current. The internal organization of the SRAM is optimized to allow this unique operating mode to be used as a valuable power saving feature. The only thing that needs to be done is to address the SRAM in a manner that the internal page is left open and 8-bit words of data are read from the open page. By treating addresses A0-A3 as the least significant bits and addressing the 16 words within the open page, power is reduced to the page mode value which is considerably lower than standard operating currents for low power SRAMs. Page Address (A4 - A17) OE CE1 CE2 Word Address (A0 - A3) Open page Word 1 Word 2 Word 16...

Stock No. 23209-01 11/01/02 5 The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. NanoAmp Solutions, Inc. N04M1618L1A Timing Test Conditions Item Input Pulse Level 0.1VCC to 0.9 VCC Input Rise and Fall Time 5ns Input and Output Timing Reference Levels 0.5 VCC Output Load CL = 30pF Operating Temperature -40 to +85 oC Timing VCCQ > or = VCC Item Symbol VCC = 1.4 - 2.3 V VCC = 1.7 - 2.3 V Units Min. Max. Min. Max. Read Cycle Time tRC 150 85 ns Address Access Time tAA 150 85 ns Chip Enable to Valid Output tCO 150 85 ns Output Enable to Valid Output tOE 50 40 ns Chip Enable to Low-Z output tLZ 20 10 ns Output Enable to Low-Z Output tOLZ 20 5 ns Chip Disable to High-Z Output tHZ 03 001 5 n s Output Disable to High-Z Output tOHZ 03 001 5 n s Output Hold from Address Change tOH 20 10 ns Write Cycle Time tWC 150 85 ns Chip Enable to End of Write tCW 75 50 ns Address Valid to End of Write tAW 75 50 ns Write Pulse Width tWP 50 40 ns Address Setup Time tAS 00 n s Write Recovery Time tWR 00 n s Write to High-Z Output tWHZ 30 15 ns Data to Write Time Overlap tDW 50 40 ns Data Hold from Write Time tDH 00 ns End Write to Low-Z Output tOW 10 5 ns

Stock No. 23209-01 11/01/02 6 The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. NanoAmp Solutions, Inc. N04M1618L1A Timing of Read Cycle (CE1 = OE = VIL, WE = CE2 = VIH) Timing Waveform of Read Cycle (WE=VIH) Address Data Out tRC tAA tOH Data ValidPrevious Data Valid Address LB#, UB# OE# Data Valid tRC tAA tCO tHZ(1,2) tOHZ(1) tLBHZ, tUBHZ tOLZ tOE tLZ(2) High-Z Data Out tLB, tUB tLBLZ, tUBLZ CE1# CE2

Stock No. 23209-01 11/01/02 7 The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. NanoAmp Solutions, Inc. N04M1618L1A Timing Waveform of Write Cycle (WE control) Timing Waveform of Write Cycle (CE1 Control) Address Data In CE1# CE2 LB#, UB# Data Valid tWC tAW tCW tWR tWHZ tDH High-Z WE# Data Out High-Z tOW tAS tWP tDW tLBW, tUBW Address WE# Data Valid tWC tAW tCW tWR tDH LB#, UB# Data In High-Z tAS tWP tLZ tDW tLBW, tUBW Data Out tWHZ CE1# (for CE2 Control, use inverted signal)

Stock No. 23209-01 11/01/02 8 The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. NanoAmp Solutions, Inc. N04M1618L1A Ball Grid Array Package 32-Lead STSOP-I Package (N32)44-Lead TSOP II Package (T44)

Ordering Information

0.75 mm 0.75 mm BOTTOM VIEW 18.41mm 10.16mm 0.80mm REF N04M1618L1AX-XX X I = Industrial, -40°C to 85°C 85 = 85ns @ 1.7V T = 44-pin TSOP II B = 48-ball BGA D = Known Good Die Temperature Performance Package Type

Stock No. 23209-01 11/01/02 9 The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com. NanoAmp Solutions, Inc. N04M1618L1A © 2001 - 2002 Nanoamp Solutions, Inc. All rights reserved. NanoAmp Solutions, Inc. ("NanoAmp") reserves the right to change or modify the information contained in this data sheet and the products described therein, without prior notice. NanoAmp does not convey any license under its patent rights nor the rights of others. Charts, drawings and schedules contained in this data sheet are provided for illustration pur- poses only and they vary depending upon specific applications. NanoAmp makes no warranty or guarantee regarding suitability of these products for any particular purpose, nor does NanoAmp assume any liability arising out of the application or use of any product or circuit described herein. NanoAmp does not authorize use of its products as critical components in any application in which the failure of the NanoAmp product may be expected to result in significant injury or death, including life support systems and critical medical instruments.

Revision History

Revision # Date Change Description 01 11/01/02 Initial Release