MSK801

MSK801 MSK | Alldatasheet

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4707 Dey Road Liverpool, N.Y. 13088 M.S.KENNEDY CORP. (315) 701-6751 FEATURES: 801 ISO-9001 CERTIFIED BY DSCC FET INPUT DIFFERENTIAL 10 MHz full power bandwidth min. 650 Volts/µs slew rate min. 75 ns settling time to 0.1% max. ±100 mA output current min. Replaces H0S-50 Fet Input Available to DSCC SMD 5962-91574 MIL-PRF-38534 QUALIFIED DESCRIPTION: The MSK 801 is a high speed, FET input, differential amplifier that exhibits very good DC characteristics. The FET input of the MSK 801 produces low input bias current, input offset voltage and input offset drift specifications. Wide bandwidth, high input impedance, and high output current make it an ideal choice for many high speed/high frequency applications. In addition, the MSK 801 offers the user external compensation, offset null and short circuit protection. EQUIVALENT SCHEMATIC TYPICAL APPLICATIONS TYPICAL APPLICATIONS PIN-OUT INFORMATION D/A Converters Buffer Amplifiers High Speed Integrators Sample and Hold Circuits Video Drivers +VCC Output Comp. Comp./Bal. Comp./Bal. Inverting Input Non-Inverting Input +VC Output -VC -VCC Case NC Rev. C 8/05 EQUIVALENT SCHEMATIC OPERATIONAL AMPLIFIER

Input Offset Voltage Drift Output Current Output Voltage Swing Full Power Bandwidth Bandwidth (Small Signal) Slew Rate Limit (Pulsed) Large Signal Voltage Gain Settling Time to 1% Settling Time to 0.1% Settling Time to 0.01% Power Supply Rejection Ratio Common Mode Rejection Ratio Input Noise Voltage Equivalent Input Noise Gain Bandwidth Product Slew Rate (Sine Wave) Thermal Resistance Supply Voltage Input Voltage Differential Input Voltage Case Operating Temperature Range (MSK 801) (MSK801B/E) Storage Temperature Range -65°C to +150°C Lead Temperature Range 300°C (10 Seconds Soldering) Power Dissipation See Curve Peak Output Current ±200mA Group A Subgroup 2,3 2,3 2,3 2,3 mA mA mV µV/°C pA nA pA nA mA V MHz MHz V/µS dB nS nS nS dB dB µVRMS nV/√Hz MHz V/µS °C/W VIN=0V VIN=0V RL=100Ω VOUT=±10V RL=100Ω f ≤ 10MHz RL=100Ω VO=±10V RL=510Ω RL=100Ω VO=±10V RL=1KΩ VO±10V RL=100Ω VIN=10V RL=100Ω VIN=10V RL=100Ω VIN=10V ∆VCC=±5V ∆VIN=±10V f=10Hz to 1KHz f=1KHz RL=510Ω AV=-20 RL=100Ω VO=±10V Junction to Case @ 125°C +18V ±VCC ±30V -40°C to +125°C -55°C to +125°C ±VCC VIN TC Parameter TST TLD PD IOUT ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS Test Conditions NOTES: AV= -1, measured in false summing junction circuit. Guaranteed by design but not tested. Typical parameters are representative of actual device performance but are for reference only. Industrial grade and "E" suffix devices shall be tested to subgroups 1 and 4 unless otherwise specified. Military grade devices ("B" suffix) shall be 100% tested to subgroups 1,2,3 and 4. Subgroups 5 and 6 testing available upon request. Subgroup 1,4 Subgroup 2 Subgroup 3 Consult DSCC SMD 5962-91574 for electrical specifications for devices purchased as such. Continuous operation at or above absolute maximum ratings may adversely effect the device performance and/or life cycle. TA=TC=+25°C TA=TC=+125°C TA=TC=-55°C MSK 801B/E Min. ±100 ±10 100 650 200 Typ. ±25 ±27 ±0.5 ±10 ±50 ±0.2 0.1 ±120 ±11.5 125 750 200 1.5 250 700 Max. ±30 ±32 ±50 ±500 ±10 500 Typ. ±25 ±0.5 ±10 ±50 ±120 ±11.5 125 750 200 1.5 250 700 MSK 801 Min. ±100 ±10 550 200 Max. ±35 ±10 ±750 750 Units Rev. C 8/05 ±Vcc=±15V Unless Otherwise Specified Quiescent Current Input Bias Current Input Offset Current VIN=0V

To determine if a heat sink is necessary for your applica- tion and if so, what type, refer to the thermal model and governing equation below. Governing Equation: Example: This example demonstrates a worst case analysis for the op-amp output stage. This occurs when the output volt- age is 1/2 the power supply voltage. Under this condition, maximum power transfer occurs and the output is under maximum stress. Conditions: VCC=±16VDC VO=±8Vp Sine Wave, Freq.=1KHz RL=100Ω For a worst case analysis we will treat the +8Vp sine wave as an 8VDC output voltage. 1.) Find Driver Power Dissapation PD=(VCC-VO) (VO/RL) =0.64W 2.) For conservative design, set TJ=+125°C 3.) For this example, worst case TA=+50°C 4.) RθJC=65°C/W from MSK 801 Data Sheet 5.) RθCS=0.15°C/W for most thermal greases 6.) Rearrange governing equation to solve for RθSA Rev. C 8/05 TJ=PD x (RθJC + RθCS + RθJC) + TA Where TJ=Junction Temperature PD=Total Power Dissipation RθJC=Junction to Case Thermal Resistance RθCS=Case to Heat Sink Thermal Resistance RθSA=Heat Sink to Ambient Thermal Resistance TC=Case Temperature TA=Ambient Temperature TS=Sink Temperature Thermal Model: APPROXIMATE DESIRED GAIN RI(+) RI(-) Rf R1 C1 1 -1 500Ω 1KΩ 1KΩ 43Ω 0.01µf +1 1KΩ 0Ω 0Ω 43Ω 0.01µf +5 0Ω 910Ω 3.6KΩ 120Ω 0.01µf 1 910Ω 1KΩ 10KΩ 150Ω 0.01µf +10 -10 0Ω 1KΩ 9.1KΩ 150Ω 0.01µf Recommended External Component Selection Guide Using External Rf 1 -5 820Ω 1KΩ 4.99KΩ 120Ω 0.01µf

1 The positive input resistor is selected to minimize offset

currents. The positve input can be grounded without a resistor if desired.

2 This feedback capacitor will help compensate for stray

input capacitance. The value of this capacitor can be dependent on individual applications. A 2 to 9 pf capacitor is usually optimum for most applications. Load Considerations When determining the load an amplifier will see, the capacative portion must be taken into consideration. For an amplifier that slews at 1000V/µS, each pf will require 1 mA of output current. To minimize ringing with highly capacitive loads, reduce the load time constant by adding shunt resistance. Case Connection The MSK 801 has pin 8 internally connected to the case. The case is not electrically connected to the internal circuit. Pin 8 should be tied to a ground plane for shielding. For special applications, consult factory. RθSA=((TJ-TA)/PD) - (RθJC) - (RθCS) =117.2 - 65.15 =52.0°C/W Stability and Layout Considerations As with all wideband devices, proper decoupling of the power lines is extremely important. The power supplies should be bypassed as near to pins 10 and 12 as possible with a parallel grouping of a 0.01µf ceramic disc and a 4.7µf tantalum capacitor. Wideband devices are also sensitive to printed circuit board layout. Be sure to keep all runs as short as possible, especially those associated with the sum- ming junction, power lines and compensation pins.

APPLICATION NOTES CON'T 4 Rev. C 8/05 Definition of Settling Time The time required for the output to come within a prede- termined error band after application of a full scale step input. This includes the time of delay, slew time and the small signal settling of the amplifier. Measuring Settling Time The only accurate method of measuring settling time is by the creation of a false summing junction and observing the error band at that point. The reasons for not using other methods are as follows: Observation of settling at the actual summing junction adds probe capacitance to the input and changes the entire re- sponse of the system. (Probe capacitance almost doubles the capacitance at the summing point.) Observing the out- put is extremely difficult, as the 3% linearity of oscillo- scopes, and reading inaccuracies, lead to a possible 5% error. The false summing junction approach works well bcause the amplifier is subtracting the output from the in- put, and only 1/2 the actual error appears there. False Summing Junction Circuit Problems: Because the amplifier is to be overdriven, 1/2 the input voltage can be expected to appear at the false summing junction. Therefore, it is necessary to clamp that point with diodes to limit the voltage excursion to avoid overdriving the oscilloscope with the consequent recovery time of the scope itself. The scope probe has capacitance which significantly affects the settling time measurement. Keep the associated resistors as low as possible to mini- mize the RC time constants, and take into account the added time created by the false summing junction. On the ranges used for settling time measurement even the best real-time scopes suffer from reduced bandwidth and relatively slow settling; a sampling scope is convenient for these measure- ments. Offset Null Typically the MSK 801 has an input offset voltage of less than ±1 mV. If it is desirable to "null" the offset volt- age, the circuit below is recommended. RP=10KΩ Output Short Circuit Protection The collectors of the output devices have been brought out to pins 10 and 12 for short circuit protection, if desired. A resistor can be inserted between +VC and +VCC pins, and -VC and -VCC respectively. Resistor values can be se- lected as follows: RSC ≅ (+)VCC = (-)VCC (+)ISC (-)ISC The addition of the these resistors reduces output volt- age swing. Decoupling at ±VC can help to retain full swing for transient pulses. For normal operation and best overall response, short +VCC and +VC and short -VCC and -VC together. Slew Rate vs. Slew Rate Limit SLEW RATE: S=2πfVp; Slew rate is based upon the sinusoidal linear response of the amplifier and is calculated from the full power bandwidth frequency. SLEW RATE LIMIT dv/dt; The slew rate limit is based upon the amplifier's response to a step input and is measured between 10% and 90%. MSK measures Tr or Tf, whichever is greater at ±10VOUT, RL=100Ω.

TYPICAL PERFORMANCE CURVES Rev. C 8/05

The information contained herein is believed to be accurate at the time of printing. MSK reserves the right to make changes to its products or specifications without notice, however, and assumes no liability for the use of its products. Please visit our website for the most recent revision of this datasheet. MECHANICAL SPECIFICATIONS M.S. Kennedy Corp.

4707 Dey Road, Liverpool, New York 13088

Phone (315) 701-6751 FAX (315) 701-6752 www.mskennedy.com NOTE: ALL DIMENSIONS ARE ±0.010 INCHES UNLESS OTHERWISE LABELED.

ORDERING INFORMATION

Rev. C 8/05 NOTE:Standard cover height is 0.200 Max. Alternate lid heights available Screening Level Part Number MSK801 MSK801E MSK801B 5962-91574 Industrial Extended Reliability MIL-PRF-38534 Class H DSCC-SMD