MSA-0600 AVAGO | Alldatasheet

Document overview

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Technical content

Features

  • Cascadable 50 Ω Gain Block
  • Low Operating Voltage (3.5 V typical V d)
  • 3 dB Bandwidth: DC to 1.0 GHz
  • High Gain: 19.5 dB Typical at 0.5 GHz
  • Low Noise Figure: 2.8 dB Typical at 0.5 GHz Chip Outline [1]

Description

The MSA-0600 is a high performance silicon bipolar Monolithic Microwave Integrated Circuit (MMIC) chip. This MMIC is designed for use as a general purpose 50 W gain block. Typical applications include narrow and broad band IF and RF amplifiers in commercial, industrial and military applications. The MSA-series is fabricated using HP’s 10 GHz fT, 25 GHz fMAX, silicon bipolar MMIC process which uses nitride self- alignment, ion implantation, and gold metallization to achieve excellent performance, uniformity and reliability. The use of an external bias resistor for temperature and current stability also allows bias flexibility. The recommended assembly procedure is gold-eutectic die attach at 400°C and either wedge or ball bonding using 0.7 mil gold wire. [1] See APPLICATIONS section, “Chip Use” . Typical Biasing Configuration C block C block R bias VCC > 5 V Vd = 3.5 V RFC (Optional) IN OUTMSA

Notes: 1. The recommended operating current range for this device is 12 to 30 mA. Typical performance as a function of current is on the following page. 2. RF performance of the chip is determined by packaging and testing 10 devices per wafer in a dual ground configuration. Part Number Ordering Information Notes: 1. Permanent damage may occur if any of these limits are exceeded. 2. TMounting Surface (T MS) = 25°C. 3. Derate at 20 mW/°C for TMountingÊ Surface > 190°C. 4. The small spot size of this technique results in a higher, though more accurate determination of θjc than do alternate methods. See MEASUREMENTS section “Thermal Resistance” for more information. Electrical Specifications [1], TA = 25°C Parameter Absolute Maximum [1] Device Current 50 mA Power Dissipation [2,3] 200 mW RF Input Power +13 dBm Junction Temperature 200 ˚C Storage Temperature -65 to 200 ˚C Thermal Resistance [2,4] : θjc = 50˚C/W G P Power Gain (|S 21 |2) f = 0.1 GHz dB 20.5 ∆G P Gain Flatness f = 0.1 to 0.6 GHz dB ± 0 . 7 f3 dB 3 dB Bandwidth G Hz 1.0 Input VSWR f = 0.1 to 1.5 GHz 1.9:1 Output VSWR f = 0.1 to 1.5 GHz 1.8:1 NF 50 Ω Noise Figure f = 0.5 GHz dB 2.8 P1 dB Output Power at 1 dB Gain Compression f = 0.5 GHz dB m 2.0 IP 3 Third Order Intercept Point f = 0.5 GHz dB m 14.5 tD Group Delay f = 0.5 GHz psec 200 Vd Device Voltage V 3 .1 3.5 3 .9 dV/dT Device Voltage Temperature Coefficient m V/ ˚C -8.0 Symbol Parameters and Test Conditions [2] : I d = 16 mA, Z O = 50 Ω Units Min. Typ. Max. VSWR Part Number Devices Per Tray MSA-0600-GP4 100

Figure 1. Typical Power Gain vs. Frequency, TA = Figure 2. Power Gain vs. Current. Figure 3. Output Power at 1 dB Gain Compression, perature, f = 0.5 GHz, Id = 16 mA. Figure 4. Output Power at 1 dB Gain Compres- Figure 5. Noise Figure vs. Frequency.

  1. S-parameters are de-embedded from 70 mil package measured data using the package model found in the DEVICE MODELS section.

0.1 GHz

0.5 GHz

1.0 GHz

2.0 GHz

For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Pte. in the United States and other countries. Data subject to change. Copyright © 2006 Avago Technologies Pte. All rights reserved. AV01-0025EN - November 2, 2007 MSA-0600 Chip Dimensions GROUND INPUT 300 µm 12.8 mil 300 µm 12.8 mil