MFS8610BMDA0ES | DigiCamel IC Datasheet

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FS8600_SDS_V01 NXP | Alldatasheet

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PDF pages: 16

Technical content

Datasheet sections

1 General description
2 Features and benefits
3 Applications
4 Simplified Application Diagram
5 Ordering information
5.1 Device family
5.2 Part numbering
6 Internal block diagram
7 Pinout information
7.1 Pinout
7.2 Pin description
8 Maximum ratings
9 Electrostatic discharge
9.1 Human body model (JESD22/A114)
9.2 Charged device model
9.3 Discharged contact test
10 Thermal ratings
11 Revision History
12 Legal information

FS8600_SDS Fail-safe system basis chip with multiple SMPSs and LDOs Rev. 2.0 — 7 December 2022 Product short data sheet

1 General description

The FS86 device family, which is SW compatible with the FS84/85 family, expands the power capability, the safety integration and the system scalability of domain controller applications to address the multiple MCU requirements present in ADAS, radar and electrification applications. The FS86 includes multiple switch mode and linear voltage regulators, and enhanced safety features with fail-safe outputs. The latest NXP HV buck architecture features a 15 A capability with e-fuse protection to shut down the system power, to prevent any damage in case of a harmful event. The ability to monitor ten voltages with +/-1% accuracy extends the system safety concept by allowing QM rails from others components to be monitored. With its innovative synchronization feature, the FS86 is part of the BYLink system power platform, enabling a new smart approach to designing safe system power management. It provides power, safety and system scalability to ease platform development strategies. Cascaded system SBC/PMICs behave as ONE with safety and sequencing synchronization. The FS86 is part of a complete family of devices that offer scalability in power and safety, and provide pin-to-pin and software compatibility. It is developed in compliance with the ISO 26262 standard and is qualified according to AEC-Q100 requirements.

NXP Semiconductors FS8600_SDS Fail-safe system basis chip with multiple SMPSs and LDOs

2 Features and benefits

60 V DC maximum input voltage for 24 V battery network applications
36 V DC maximum input voltage for 12 V battery network applications
Support operating voltage range down to 4.5 V battery voltage with VPRE = 3.3 V
Low power OFF mode with low sleep current (10 µA typ.) Power Supplies
VPRE: Synchronous high voltage buck controller with external FETs – Configurable output voltage from 3.3 V to 5.0 V and current capability up to 15 A DC – Selectable switching frequency in force PWM with APS
BOOST: Low voltage boost converter with integrated low-side FET – Configurable output voltage from 5 V to 6 V and current capability up to 1 A DC
BUCK: Low voltage integrated synchronous BUCK converter – Configurable output voltage from 1.0 V to 3.3 V and current capability up to 2.5 A DC
LDO1: Low voltage LDO regulator for MCU I/O and system peripheral support with load switch capability – Configurable output voltage from 1.5 V to 5.0 V and current capability up to 400 mA DC
LDO2: Medium voltage LDO regulator for MCU I/O and system peripheral support – Configurable output voltage from 1.1 V to 5.0 V and current capability up to 400 mA DC System support
2x input pins for wake-up detection, 3.3 V compatible and battery voltage sensing capability
Analog multiplexer with full system voltages monitoring
Enhanced leader/follower power up sequencing management through XFAILB pin
10 ms optional RSTB release delay during power up for certain MCU compliancy
Device control via 32 bit I2C interface with 8-bit CRC Compliancy
EMC optimization features on switching regulators including spread spectrum, slew rate control and manual frequency tuning
EMI robustness supporting various automotive EMI Test standards
Conducted Emission: IEC 61967-4
Conducted Immunity: IEC 62132-4
Radiated emission: FMC1278 rev. 3 from 2018
Radiated immunity: FMC1278 from 2018 and ISO11452-4 Functional Safety
Scalable portfolio to fit for ASIL B to ASIL D automotive safety systems
Independent voltage monitoring circuitry
Up to 10 voltage monitoring input for FS86 and external PMIC voltage rails with 1 % target accuracy
Dedicated interface for MCU monitoring with simple or challenger watchdog monitoring
MCU hardware failure monitoring with PWM monitoring capability (FCCU)
External IC failure monitoring (ERRMON) FS8600_SDS All information provided in this document is subject to legal disclaimers. © 2022 NXP B.V. All rights reserved. Product short data sheet Rev. 2.0 — 7 December 2022

Logical and analog built-in self-test (LBIST, ABIST)
Safety outputs with latent fault detection mechanism (PGOOD, RSTB, FS0B) Configuration and Enablement
QFN 48 pins with exposed pad for optimized thermal management
OTP programming for device customization

3 Applications

Domain controller (ADAS, electrification, infotainment, etc.)
Radar (radar, imaging radar)
Vision (mono camera, stereo camera, night vision, etc.)
24 V battery network (60 V maximum): Truck, bus, transportation
12 V battery network (36 V maximum): Automotive

4 Simplified Application Diagram

5 Ordering information

5.1 Device family

part numbering and OTP configuration.

24 V battery

60 V Yes Yes Yes 2 10[1] Yes Yes No[3]

12 V battery

36 V Yes Yes Yes 2 10[1]

Table 1. Device options [1] Maximum number allowed. Any VMONx can be enabled up to this limit. [2] ASIL B: watchdog simple. ASIL D: watchdog challenger.

5.2 Part numbering

12 V or 24 V

Table 2. Ordering information...continued [1] To order parts in tape and reel, add the R2 suffix to the part number. [2] Production part number available only after product qualification (A1 silicon pass). [3] Superset part number that can cover all features for prototype ordering (A0 silicon pass/obsolete). [4] Superset part number that can cover all features for prototype ordering (A1 silicon pass). custom OTP configuration, contact your local NXP sales representative. FS8600_SDS All information provided in this document is subject to legal disclaimers. © 2022 NXP B.V. All rights reserved.

6 Internal block diagram

7 Pinout information

7.1 Pinout

48 DBG

Figure 3. Pin configuration

7.2 Pin description

1 N/C N/C Not connected pin

2 LDO1_IN Analog input Linear regulator #1 input voltage

3 LDO1 Analog output Linear regulator #1 output voltage

4 FCCU2 Digital input MCU Error Monitoring input 2

5 FCCU1 Digital input MCU Error Monitoring input 1

6 BOOST_LS Analog input BOOST Low Side Drain of internal MOSFET

7 BUCK_SW Analog output Low voltage buck switching node

8 BUCK_IN Analog input Low voltage buck input voltage

9 BAT_SW Digital output Battery switch control output. Active low. Open drain structure.

10 VMON6_RES Analog input External resistor bridge voltage monitoring input #6

11 BUCK_FB Analog input Low voltage buck voltage feedback.

12 VMON7_RES Analog input External resistor bridge voltage monitoring input #7

13 FS0B Digital output Fail-safe output 0. Active low. Open drain structure.

14 VMON8_RES Analog input External resistor bridge voltage monitoring input #8

15 VMON1_DAC Analog input DAC voltage monitoring input #1

16 PGOOD Digital output Power good output

17 RSTB Digital input/output Reset output. Active low. The main function is to reset the MCU.

18 VMON2_DAC Analog input DAC voltage monitoring input #2

19 VMON3_DAC Analog input DAC voltage monitoring input #3

21 GNDFS Ground Fail-safe ground

22 GND Ground Main ground

23 XFAILB Digital input/output Power synchronization input/output with NXP low voltage PMIC

24 AMUX Analog output Multiplexed output to be connected to an MCU ADC with selection

of the analog parameter thru I2C.

25 FOUT Digital output Frequency synchronization output or digital output (OTP)

26 VMON0_I2C Analog input Input voltage for FIN, AMUX, I2C, INTB, FCCU, ERRMON.

29 INTB Digital output Interrupt output

30 PRE_COMP Analog input VPRE compensation network and negative current sense input

31 VMON5_RES Analog input External resistor bridge voltage monitoring input #5

32 PRE_BOOT Analog input/output VPRE bootstrap capacitor

33 PRE_GHS Analog output VPRE high side gate driver for external MOSFET

34 PRE_SW Analog output VPRE switching node

35 PRE_GLS Analog output VPRE low side gate driver for external MOSFET

36 ERRMON Digital input External IC error monitoring input

37 PRE_CSN Analog input VPRE negative current sense input

38 PRE_CSP Analog input VPRE positive current sense input

39 PRE_FB Analog input VPRE voltage feedback.

40 VBOS Analog output Best of supply output voltage

42 VSUP1 Power Analog Input Power supply of the device #1. 43 VSUP2 Power Analog Input Power supply of the device #2.

45 VBOOST Analog output Boost output voltage

46 LDO2 Analog output Linear regulator #2 output voltage

47 VMON4_RINT Analog input Internal resistor bridge voltage monitoring input #4

48 DBG Analog input DEBUG Mode entry and OTP input supply

8 Maximum ratings

9 Electrostatic discharge

9.1 Human body model (JESD22/A114)

100 pF and 1.5 kΩ. This protection is ensured at all pins.

9.2 Charged device model

according to the AEC Q100 - 011 charged device model standard.

9.3 Discharged contact test

The device is protected up to ±8 kV, according to the following discharged contact tests.

Discharged contact test (IEC61000-4-2) at 150 pF and 330 Ω
Discharged contact test (ISO10605.2008) at 150 pF and 2 kΩ
Discharged contact test (ISO10605.2008) at 330 pF and 2 kΩ This protection is ensured at VSUP1, VSUP2, WAKE1, WAKE2, FS0B pins.

10 Thermal ratings

20221207 Product 202212001

Modifications • Updated Section 1.

Updated Section 2.
Updated Figure 1.
In Section 6, updated Figure 2.
Updated footnotes in Section 5.1, Table 1.
In Table 4, in the VMONx row, changed VMON_RES to VMONy_RES. FS8600_SDS v.1.1

20211123 Product — —

NXP Semiconductors FS8600_SDS Fail-safe system basis chip with multiple SMPSs and LDOs

12 Legal information

12.1 Data sheet status

Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.

12.2 Definitions

Draft — A draft status on a document indicates that the content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included in a draft version of a document and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.

12.3 Disclaimers

Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. FS8600_SDS All information provided in this document is subject to legal disclaimers. © 2022 NXP B.V. All rights reserved. Product short data sheet Rev. 2.0 — 7 December 2022

NXP Semiconductors FS8600_SDS Fail-safe system basis chip with multiple SMPSs and LDOs Translations — A non-English (translated) version of a document, including the legal information in that document, is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Security — Customer understands that all NXP products may be subject to unidentified vulnerabilities or may support established security standards or specifications with known limitations. Customer is responsible for the design and operation of its applications and products throughout their lifecycles to reduce the effect of these vulnerabilities on customer’s applications and products. Customer’s responsibility also extends to other open and/or proprietary technologies supported by NXP products for use in customer’s applications. NXP accepts no liability for any vulnerability. Customer should regularly check security updates from NXP and follow up appropriately. Customer shall select products with security features that best meet rules, regulations, and standards of the intended application and make the ultimate design decisions regarding its products and is solely responsible for compliance with all legal, regulatory, and security related requirements concerning its products, regardless of any information or support that may be provided by NXP. NXP has a Product Security Incident Response Team (PSIRT) (reachable at PSIRT@nxp.com) that manages the investigation, reporting, and solution release to security vulnerabilities of NXP products. Suitability for use in automotive applications (functional safety) — This NXP product has been qualified for use in automotive applications. It has been developed in accordance with ISO 26262, and has been ASIL classified accordingly. If this product is used by customer in the development of, or for incorporation into, products or services (a) used in safety critical applications or (b) in which failure could lead to death, personal injury, or severe physical or environmental damage (such products and services hereinafter referred to as “Critical Applications”), then customer makes the ultimate design decisions regarding its products and is solely responsible for compliance with all legal, regulatory, safety, and security related requirements concerning its products, regardless of any information or support that may be provided by NXP. As such, customer assumes all risk related to use of any products in Critical Applications and NXP and its suppliers shall not be liable for any such use by customer. Accordingly, customer will indemnify and hold NXP harmless from any claims, liabilities, damages and associated costs and expenses (including attorneys’ fees) that NXP may incur related to customer’s incorporation of any product in a Critical Application.

12.4 Trademarks

Notice: All referenced brands, product names, service names, and trademarks are the property of their respective owners. NXP — wordmark and logo are trademarks of NXP B.V. FS8600_SDS All information provided in this document is subject to legal disclaimers. © 2022 NXP B.V. All rights reserved. Product short data sheet Rev. 2.0 — 7 December 2022

NXP Semiconductors FS8600_SDS Fail-safe system basis chip with multiple SMPSs and LDOs Tables Figures FS8600_SDS All information provided in this document is subject to legal disclaimers. © 2022 NXP B.V. All rights reserved. Product short data sheet Rev. 2.0 — 7 December 2022

Product Information

MFS8610BMDA0ES specifications and overview.

Summary

Fail-safe system basis chip with multiple SMPSs and LDOs Rev. 2.0 - 7 December 2022

Description

Fail-safe system basis chip with multiple SMPSs and LDOs Rev. 2.0 - 7 December 2022

Source title MFS8610BMDA0ES Datasheet(PDF) - NXP Semiconductors

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