FS8600-SDS NXP | Alldatasheet
Document overview
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- PDF pages: 15
Technical content
Datasheet sections
- 1 General description
- 2 Features and benefits
- 3 Applications
- 4 Simplified Application Diagram
- 5 Ordering information
- 5.1 Device family
- 5.2 Part numbering
- 6 Internal block diagram
- 7 Pinout information
- 7.1 Pinout
- 7.2 Pin description
- 8 Maximum ratings
- 9 Electrostatic discharge
- 9.1 Human body model (JESD22/A114)
- 9.2 Charged device model
- 9.3 Discharged contact test
- 10 Thermal ratings
- 11 Revision History
- 12 Legal information
FS8600_SDS Fail-safe system basis chip with multiple SMPSs and LDOs Rev. 1.1 — 23 November 2021 Product short data sheet
1 General description
The FS86 device family, SW compatible with FS84/85 family, expands the power capability, the safety integration and system scalability of domain controller applications to address the multiple MCU requirements present in ADAS and Electrification. The FS86 includes multiple switch mode and linear voltage regulators and enhanced safety features with Fail-Safe outputs. The latest NXP HV Buck architecture features a 15 A capability with e-fuse protection to shut down the system power to prevent any damage in case of a harmful event. The ability to monitor ten voltages with +/-1% accuracy extends the system safety concept by allowing QM rails from others components to be monitored. With its innovative synchronization feature, the FS86 is part of the BYLink System Power Platform, enabling a new smart approach to designing Safe System Power Management. It provides power, safety and system scalability to ease platform development strategies. Cascaded system SBC/PMICs behave as ONE with safety and sequencing synchronization. The FS86 is part of a complete family of devices that offer scalability in power and safety, and provide pin-to-pin and software compatibility. It is developed in compliance with the ISO 26262 standard and is qualified according to AEC-Q100 requirements.
2 Features and benefits
- 60 V DC maximum input voltage for 24 V battery network applications
- 36 V DC maximum input voltage for 12 V battery network applications
- Support operating voltage range down to 4.5 V battery voltage with VPRE = 3.3 V
- Low Power OFF mode with low sleep current (10 µA typ.) Power Supplies
- VPRE: Synchronous high voltage buck controller with external FETs – Configurable output voltage from 3.3 V to 5.0 V and current capability up to 15 A DC – Selectable switching frequency in force PWM with APS
- BOOST: Low voltage boost converter with integrated low-side FET – Configurable output voltage from 5 V to 6 V and current capability up to 1 A DC
- BUCK: Low voltage integrated synchronous BUCK converter – Configurable output voltage from 1.0 V to 3.3 V and current capability up to 2.5 A DC
- LDO1: Low voltage LDO regulator for MCU I/O and system peripheral support with load switch capability – Configurable output voltage from 1.5 V to 5.0 V and current capability up to 400 mA DC
NXP Semiconductors FS8600_SDS Fail-safe system basis chip with multiple SMPSs and LDOs
- LDO2: Medium voltage LDO regulator for MCU I/O and system peripheral support – Configurable output voltage from 1.1 V to 5.0 V and current capability up to 400 mA DC System support
- 2x input pins for wake-up detection, 3.3 V compatible and battery voltage sensing capability
- Analog Multiplexer with full System Voltages monitoring
- Enhanced leader/follower power up sequencing management thru XFAILB pin
- 10 ms optional RSTB release delay during power up for certain MCU compliancy
- Device control via 32 bits I2C interface with 8-bit CRC Compliancy
- EMC optimization techniques on switching regulators including spread spectrum, slew rate control and manual frequency tuning
- EMI robustness supporting various automotive EMI Test standards
- Conducted Emission: IEC 61967-4
- Conducted Immunity: IEC 62132-4
- Radiated emission: FMC1278 rev. 3 from 2018
- Radiated immunity: FMC1278 from 2018 and ISO11452-4 Functional Safety
- Scalable portfolio to fit for ASIL B to ASIL D Automotive Safety Systems
- Independent voltage Monitoring Circuitry
- Up to 10 voltage monitoring input for FS86 and external PMIC voltage rails with 1 % target accuracy
- Dedicated interface for MCU monitoring with simple or challenger watchdog monitoring
- MCU hardware failure monitoring with PWM monitoring capability
- External IC failure monitoring
- Logical and Analog Built-in Self-Test
- Safety Outputs with latent fault detection mechanism (PGOOD, RSTB, FS0B) Configuration and Enablement
- QFN 48 pins with exposed pad for optimized thermal management
- OTP programming for device customization
3 Applications
- Domain controller (ADAS, electrification, Infotainment, etc.)
- Radar (radar, imaging radar)
- Vision (mono camera, stereo camera, night vision, etc.)
- 24 V battery network (60 V maximum): Truck, bus, transportation
- 12 V battery network (36 V maximum): Automotive Product short data sheet Rev. 1.1 — 23 November 2021
4 Simplified Application Diagram
Figure 1. Simplified application diagram
5 Ordering information
5.1 Device family
numbering and OTP configuration.
60 V Yes Yes Yes 2 10 Yes Yes No[2]
36 V Yes Yes Yes 2 10
Table 1. Device options [1] ASIL B: Watchdog Simple. ASIL D: Watchdog Challenger.
5.2 Part numbering
24 V battery
Table 2. Ordering information
12 V battery
12 V or 24 V
Table 2. Ordering information...continued [1] To order parts in tape and reel, add the R2 suffix to the part number. [2] Production part number available only after product qualification (A1 silicon pass). [3] Superset part number that can cover all features for prototype ordering (A0 silicon pass/obsolete).. [4] Superset part number that can cover all features for prototype ordering (A1 silicon pass). custom OTP configuration, please contact your local NXP sales representative.
6 Internal block diagram
Figure 2. Block diagram
7 Pinout information
7.1 Pinout
48 DBG
Figure 3. Pin configuration
7.2 Pin description
1 N/C N/C Not connected pin
2 LDO1_IN Analog input Linear regulator #1 input voltage
3 LDO1 Analog output Linear regulator #1 output voltage
4 FCCU2 Digital input MCU Error Monitoring input 2
5 FCCU1 Digital input MCU Error Monitoring input 1
6 BOOST_LS Analog input BOOST Low Side Drain of internal MOSFET
7 BUCK_SW Analog output Low Voltage Buck switching node
8 BUCK_IN Analog input Low Voltage Buck input voltage
9 BAT_SW Digital output Battery switch control output. Active Low. Open drain structure.
10 VMON6_RES Analog input External resistor bridge voltage monitoring input #6
Table 3. Pin description
11 BUCK_FB Analog input Low Voltage Buck voltage feedback.
12 VMON7_RES Analog input External resistor bridge voltage monitoring input #7
13 FS0B Digital output Fail Safe Output 0. Active Low. Open drain structure.
14 VMON8_RES Analog input External resistor bridge voltage monitoring input #8
15 VMON1_DAC Analog input DAC voltage monitoring input #1
16 PGOOD Digital output Power good output
17 RSTB Digital input/output Reset output. Active Low. The main function is to reset the MCU.
18 VMON2_DAC Analog input DAC voltage monitoring input #2
19 VMON3_DAC Analog input DAC voltage monitoring input #3
21 GNDFS Ground Fail Safe ground
22 GND Ground Main ground
23 XFAILB Digital input/output Power Synchronization input/output with NXP low voltage PMIC
24 AMUX Analog output Multiplexed output to be connected to an MCU ADC with selection
of the analog parameter thru I2C.
25 FOUT Digital output Frequency synchronization output or digital output (OTP)
26 VMON0_I2C Analog input Input voltage for FIN, AMUX, I2C, INTB, FCCU, ERRMON.
29 INTB Digital output Interrupt output
30 PRE_COMP Analog input VPRE compensation network and negative current sense input
31 VMON5_RES Analog input External resistor bridge voltage monitoring input #5
32 PRE_BOOT Analog input/output VPRE bootstrap capacitor
33 PRE_GHS Analog output VPRE High Side gate driver for external MOSFET
34 PRE_SW Analog output VPRE switching node
35 PRE_GLS Analog output VPRE Low Side gate driver for external MOSFET
36 ERRMON Digital input External IC error monitoring input
37 PRE_CSN Analog input VPRE negative current sense input
38 PRE_CSP Analog input VPRE positive current sense input
39 PRE_FB Analog input VPRE voltage feedback.
40 VBOS Analog output Best of supply output voltage
Table 3. Pin description...continued
42 VSUP1 Power Analog Input Power supply of the device #1. 43 VSUP2 Power Analog Input Power supply of the device #2.
45 VBOOST Analog output Boost output voltage
46 LDO2 Analog output Linear regulator #2 output voltage
47 VMON4_RINT Analog input Internal resistor bridge voltage monitoring input #4
48 DBG Analog input DEBUG Mode entry and OTP input supply
8 Maximum ratings
permanent damage to the device. Table 4. Maximum ratings
9 Electrostatic discharge
9.1 Human body model (JESD22/A114)
100 pF and 1.5 kΩ. This protection is ensured at all pins.
9.2 Charged device model
according to the AEC Q100 - 011 charged device model standard.
9.3 Discharged contact test
The device is protected up to ±8 kV, according to the following discharged contact tests.
- Discharged contact test (IEC61000-4-2) at 150 pF and 330 Ω
- Discharged contact test (ISO10605.2008) at 150 pF and 2 kΩ
- Discharged contact test (ISO10605.2008) at 330 pF and 2 kΩ This protection is ensured at VSUP1, VSUP2, WAKE1, WAKE2, FS0B pins.
10 Thermal ratings
Table 5. Thermal ratings Table 6. Revision history
NXP Semiconductors FS8600_SDS Fail-safe system basis chip with multiple SMPSs and LDOs
12 Legal information
12.1 Data sheet status
Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
12.2 Definitions
Draft — A draft status on a document indicates that the content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included in a draft version of a document and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.
12.3 Disclaimers
Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. Product short data sheet Rev. 1.1 — 23 November 2021
NXP Semiconductors FS8600_SDS Fail-safe system basis chip with multiple SMPSs and LDOs No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Security — Customer understands that all NXP products may be subject to unidentified or documented vulnerabilities. Customer is responsible for the design and operation of its applications and products throughout their lifecycles to reduce the effect of these vulnerabilities on customer’s applications and products. Customer’s responsibility also extends to other open and/or proprietary technologies supported by NXP products for use in customer’s applications. NXP accepts no liability for any vulnerability. Customer should regularly check security updates from NXP and follow up appropriately. Customer shall select products with security features that best meet rules, regulations, and standards of the intended application and make the ultimate design decisions regarding its products and is solely responsible for compliance with all legal, regulatory, and security related requirements concerning its products, regardless of any information or support that may be provided by NXP. NXP has a Product Security Incident Response Team (PSIRT) (reachable at PSIRT@nxp.com) that manages the investigation, reporting, and solution release to security vulnerabilities of NXP products.
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. NXP — wordmark and logo are trademarks of NXP B.V. Product short data sheet Rev. 1.1 — 23 November 2021
NXP Semiconductors FS8600_SDS Fail-safe system basis chip with multiple SMPSs and LDOs Tables Figures Product short data sheet Rev. 1.1 — 23 November 2021