MC12040P

ML12040_05 LANSDALE | Alldatasheet

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Technical content

www.lansdale.comPage 1 of 5 Issue 0 ML12040 Phase–Frequency Detector Legacy Device: Motorola MC12040 The ML12040 is a phase–frequency detector intended for use in systems requiring zero phase and frequency difference at lock. In combination with a voltage controlled oscillator (such as the ML12149), it is useful in a broad range of phase–locked loop applications.

• Operating Frequency = 80 MHz T ypical
• Operating Temperature Range TA = 0° to 75°C PIN CONNECTIONS VCC2 N.C. VCC1 (Top View) N.C. U U N.C. R VEE D D N.C. V N.C. Pin Conversion Table

14 Pin DIP 1 2 3 4 5 6 7 8 9 10 11 12 13 14

20 Pin PLCC 2 3 4 6 8 9 10 12 13 14 16 18 19 20

R V X X X X U X X X X D X X X X U X X X X D Inputs Outputs LOGIC DIAGRAM R S Q S RQ R 6 V 9

4 U (fR>fV)

3 U (fR>fV)

12 D (fV>fR)

11 D (fV>fR)

VCC1 = Pin 1 VCC2 = Pin 14 VEE = Pin 7 TRUTH TABLE This is not strictly a functional truth table; i.e., it does not cover all possible modes of operation. However, it gives a sufficient number of tests to ensure that the device will function properly in all modes of operation. PLCC 20 = -4P PLASTIC PACKAGE CASE 775 P DIP 14 = CP PLASTIC PACKAGE CASE 646 CROSS REFERENCE/ORDERING INFORMATION MOTOROLA P DIP 14 MC12040P ML12040CP PLCC 20 MC12040FN ML12040-4P LANSDALEPACKAGE Note: Lansdale lead free ( Pb) product, as it becomes available, will be identified by a part number prefix change from ML to MLE.

LANSDALE Semiconductor, Inc.ML12040 www.lansdale.comPage 2 of 5 Issue 0 6 R D 12 D1 1 U 3 TEST VOLTAGE VALUES (Volts) @ Test Temperature V IHmax VILmin VIHAmin VILAmax VEE MC12040 TEST VOLTAGE APPLIED TO PINS BELOW Pin Under 0°C 25°C 75°C TEST VOLTAGE APPLIED TO PINS BELOW (VCC) Symbol Characteristics Under Test Min Max Min Max Min Max Unit VIHmax VILmin VIHAmin VILAmax VEE (VCC) Gnd IE Power Supply Drain 7 –120 –60 mAdc 7 1,14 IINH Input Current 6 350 350 µAdc 6 1,14 1,14 VOH1 Logic “1” Output Voltage Vdc 7 1,14 VOL1 Logic “0” Output Voltage Vdc 7 1,14 VOHA2 Logic “1” Input Voltage Vdc 6.9 7 1,14 VOLA2 Logic “0” Input Voltage Vdc 9 7 1,14 TEST VOLTAGE VALUES (Volts) @ Test Temperature V IHmax VILmin VIHAmin VILAmax VEE MC12040 TEST VOLTAGE APPLIED TO PINS BELOWPin Under 0°C 25°C 75°C TEST VOLTAGE APPLIED TO PINS BELOW (VCC) Symbol Characteristics Under Test Min Max Min Max Min Max Unit VIHmax VILmin VIHAmin VILAmax VEE (VCC) Gnd IE Power Supply Drain 7 –115 –60 mAdc 1,14 7 IINH Input Current 6 350 350 µAdc 6 1,14 1,14 VOH1 Logic “1” Output Voltage Vdc 1,14 7 VOL1 Logic “0” Output Voltage Vdc 1,14 7 VOHA2 Logic “1” Input Voltage 3.980 4.020 4.080 Vdc 6.9 1,14 7 VOLA2 Logic “0” Input Voltage 3.450 3.460 3.490 Vdc 9 1,14 7

ELECTRICAL CHARACTERISTICS

The ML12040 has been designed to meet the DC specifica- tions shown in the test table after thermal equilibrium has been established. Outputs are terminated through a 50 Ωresistor to 3.0 V for 5.0 V tests and through a 50 Ωresistor to –2.0 V for –5.2 V tests. NOTE: For more information on using an ECL device in a

5.0 V system, refer to Application Note AN1406/D,

“Designing with PECL (ECL at 5.0 V)”

Figure 1. AC Tests

1 All input and output cables to the scope are equal lengths of 50 Ω

2 Unused input and outputs are connected to a 50 Ω resistor to

3 The device under test must be preconditioned before performing

Pins 6 and 9 are interchanged. The same technique applies.

occur only once per cycle, the detector has a range of ±2πradians. and the D output (Pin 11 ) would simply remain low. circuit useful for this function is shown in Figure 3. uration is approximately 0.16 volts/radian. Figure 2. Timing Diagram Figure 3. Typical Filter and Summing Network

LANSDALE Semiconductor, Inc.ML12040 www.lansdale.comPage 5 of 5 Issue 0 P DIP 14 = CP PLASTIC PACKAGE (ML12040CP) CASE 646–06 ISSUE M 14 8 B A DIM MIN MAX MIN MAX MILLIMETERSINCHES A 0.715 0.770 18.16 18.80 B 0.240 0.260 6.10 6.60 C 0.145 0.185 3.69 4.69 D 0.015 0.021 0.38 0.53 F 0.040 0.070 1.02 1.78 G 0.100 BSC 2.54 BSC H 0.052 0.095 1.32 2.41 J 0.008 0.015 0.20 0.38 K 0.115 0.135 2.92 3.43 L N 0.015 0.039 0.38 1.01 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. F HG D K C SEATING PLANE N –T– 14 PL M0.13 (0.005) L M J 0.290 0.310 7.37 7.87 OUTLINE DIMENSIONS Lansdale Semiconductor reserves the right to make changes without further notice to any products herein to improve reliabili- ty, function or design. Lansdale does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. “Typical” parameters which may be provided in Lansdale data sheets and/or specifications can vary in different applications, and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by the customer’s technical experts. Lansdale Semiconductor is a registered trademark of Lansdale Semiconductor, Inc. PLCC 20 = -4P CASE 775-02 Plastic Package (ML12040-4P)