M81700FP

M81700FP MITSUBISHI | Alldatasheet

Document overview

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Technical content

Mar. 2002 PRELIMINARY N otice: This is not a final specification. Som e param etric lim its are subject to change. VDD 7 VB 8 HO 6 VS

3 VCC

2 LGND

S R R Q S S RQ RQ S HV LEVEL SHIFT 11 6LO NC 21 5LGND GND 31 4VCC LIN 41 3NC SD 51 2NC HIN 61 1VS VDD 71 0VB NC 89HO NC

APPLICATIONS

PDP. HID lamp. MOSFET and IGBT module inverter driver for refrigerator, air-conditioner, washing machine, servomotor and general purpose.

FEATURES

¡HALF BRIDGE DRIVER ¡SOP-16

DESCRIPTION

M81700FP is high voltage Power MOSFET and IGBT mod- ule driver for half bridge applications. BLOCK DIAGRAM PIN CONFIGURATION (TOP VIEW) PACKAGE TYPE 16P2N NC:NO CONNECTION MITSUBISHI SEMICONDUCTORS <HVIC> M81700FP HIGH VOLTAGE HALF BRIDGE DRIVER PRELIMINARY Notice: This is not a final specification. Some parametric limits are subject to change.

Mar. 2002 PRELIMINARY N otice: This is not a final specification. Som e param etric lim its are subject to change. V V V V V V V V V V V V/ns W mW/ °C °C/W V V V V V V V V VS+10 VS+20 500 VDD VDD ABSOLUTE MAXIMUM RATINGS High Side Floating Supply Absolute Voltage High Side Floating Supply Offset Voltage High Side Floating Supply Voltage Low Side Fixed Supply Voltage Logic Supply Voltage Logic Input Voltage Shut Down Input Voltage Low Side Return Offset Voltage Symbol UnitParameter Test Conditions Limits Min. Typ. Max. VBS = VB-VS HIN, LIN VB VS VBS VCC VDD VIN SD LGND –0.5 ~ 624 –0.5 ~ 600 –0.5 ~ 24 VS–0.5 ~ VB+0.5 –0.5 ~ 24 –0.5 ~ VCC+0.5 –0.5 ~ 24 –0.5 ~ VDD+0.5 –0.5 ~ VDD+0.5 –5 ~ VCC+0.5 ±50 0.88 –8.8 –20 ~ 125 –20 ~ 75 –40 ~ 125 VBS = VB-VS PW < 1µs HIN, LIN VCC-LGND < 24V Ta = 25°C, On Board Ta > 25°C, On Board High Side Floating Supply Absolute Voltage High Side Floating Supply Offset Voltage High Side Floating Supply Voltage Allowable Offset Supply Voltage minus serge High Side Output Voltage Low Side Fixed Supply Voltage Low Side Output Voltage Logic Supply Voltage Logic Input Voltage Shut Down Input Voltage Low Side Return Offset Voltage Allowable Offset Supply Voltage Transient Package Power Dissipation Linear Derating Factor Junction-Case Thermal Resistance Junction Temperature Operation Temperature Storage Temperature VB VS VBS –VS VHO VCC VLO VDD VIN SD LGND dVS/dt Pd K q Rth(j-c) Tj Topr Tstg Symbol Parameter Conditions Ratings Unit RECOMMENDED OPERATING CONDITIONS MITSUBISHI SEMICONDUCTORS <HVIC> M81700FP HIGH VOLTAGE HALF BRIDGE DRIVER PERFORMANCE CURVES Thermal Derating Factor Characteristics 2.0 1.5 1.0 0.5 0 1251007550250 Temperature [

Mar. 2002 PRELIMINARY N otice: This is not a final specification. Som e param etric lim its are subject to change. MITSUBISHI SEMICONDUCTORS <HVIC> M81700FP HIGH VOLTAGE HALF BRIDGE DRIVER µA mA mA µA V V V V V V V V V V µA µA V V µs V V µs A A Ω Ω ns ns ns ns ns ns ns ns ns ns ns 13.8 6.0 1.4 6.0 1.4 7.5 0.1 7.5 0.1 0.4 0.75 14.4 8.4 6.8 3.1 2.4 8.4 6.8 3.1 2.4 8.6 0.4 8.6 0.4 –2.5 2.5 2.5 0.7 1.5 0.1 9.5 4.1 9.5 4.1 150 1.0 9.7 0.7 9.7 0.7 350 330 350 330 350 Floating Supply Leakage Current VBS standby Current VCC standby Current VDD standby Current High Level Output Voltage Low Level Output Voltage High Level Input Threshold Voltage Low Level Input Threshold Voltage High Level Input Threshold Voltage Low Level Input Threshold Voltage Shutdown High Level Input Threshold Voltage Shutdown Low Level Input Threshold Voltage Shutdown High Level Input Threshold Voltage Shutdown Low Level Input Threshold Voltage High Level Input Bias Current Low Level Input Bias Current VBS Supply UV Reset Voltage VBS Supply UV Hysteresis Voltage VBS Supply UV Filter Time VCC Supply UV Reset Voltage VCC Supply UV Hysteresis Voltage VCC Supply UV Filter Time Output High Level Short Circuit Pulsed Current Output Low Level Short Circuit Pulsed Current Output High Level On resistance Output Low Level On resistance High Side Turn-On Propagation Delay High Side Turn-Off Propagation Delay High Side Turn-On Rise Time High Side Turn-Off Fall Time Low Side Turn-On Propagation Delay Low Side Turn-Off Propagation Delay Low Side Turn-On Rise Time Low Side Turn-Off Fall Time Delay Matching, High Side and Low Side Turn-On Delay Matching, High Side and Low Side Turn-Off Shutdown Propagation Delay Symbol UnitParameter Test conditions Limits Min. Typ. Max. VB=VS=600V IO=0A, LO, HO IO=0A, LO, HO HIN, LIN HIN, LIN HIN, LIN (VDD=5V) HIN, LIN (VDD=5V) SD SD SD (VDD=5V) SD (VDD=5V) VIN=15V VIN=0V VO=0V, VIN=15V, PW<10µs VO=15V, VIN=0V, PW<10µs IO=–200mA, ROH=(VOH-VO)/IO IO=200mA, ROL=VO/IO CL=1000pF between HO – VS CL=1000pF between HO – VS CL=1000pF between HO – VS CL=1000pF between HO – VS CL=1000pF between LO – GND CL=1000pF between LO – GND CL=1000pF between LO – GND CL=1000pF between LO – GND |tdLH(HO)-tdLH(LO)| |tdHL(HO)-tdHL(LO)| CL=1000pF between HO – VS CL=1000pF between LO – GND IFS IBS ICC IDD VOH VOL VIH15 VIL15 VIH5 VIL5 VISDH15 VISDL15 VISDH5 VISDL5 IIH IIL VBSuvr VBSuvh tVBSuv VCCuvr VCCuvh tVCCuv IOH IOL ROH ROL tdLH(HO) tdHL(HO) trH tfH tdLH(LO) tdHL(LO) trL tfL ∆tdLH ∆tdHL tSD ELECTRICAL CHARACTERISTICS (Ta=25°C, VCC=VBS (=VB–VS)=VDD=15V, LGND=0V unless otherwise specified)

Mar. 2002 PRELIMINARY N otice: This is not a final specification. Som e param etric lim its are subject to change. MITSUBISHI SEMICONDUCTORS <HVIC> M81700FP HIGH VOLTAGE HALF BRIDGE DRIVER TIMING DIAGRAM HIN LIN HO LO FUNCTION TABLE (X: H or L) LO = OFF, HO = OFF LO = ON, HO = OFF LO = OFF, HO = ON LO = OFF, HO = OFF, VBS UV tripped LO = ON, HO = OFF, VBS UV tripped LO = OFF, HO = OFF, VCC UV tripped LO = OFF, HO = OFF, VCC UV tripped LO = OFF, HO = OFF, SD = ON L L H H X X L H X HIN Behavioral state LIN VBS UV VCC UV HO LO L H L H L H X X X H H H H L L H H H H H H H H H L L H L L H L L L L L L H L L H L L L Note : “L” state of VBS UV and VCC UV means that UV trip voltage. * If both input signals are “H”, refer to TIMING DIAGRAM. SD L L L L L L L L H 1.Input/Output Timing Diagram When input signal (HIN or LIN) is “H”, then output signal (HO or LO) is “H”. In the case of both input signals (HIN and LIN) are “H”, first coming input signal (HIN or LIN) “H” is only accepted. Corresponding this signal, output signal (HO or LO) becomes “H”. Corresponding the other signal (LIN or HIN), output signal (LO or HO) keeps “L”. 2.Shutdown Input Timing Diagram When shutdown input signal (SD) is “H”, then output signals (HO and LO) are “L”. Output signals (HO and LO) keep “L” by shutdown input signal (SD) is “L” until next input signal (HIN or LIN) is “H”.

Mar. 2002 PRELIMINARY N otice: This is not a final specification. Som e param etric lim its are subject to change. MITSUBISHI SEMICONDUCTORS <HVIC> M81700FP HIGH VOLTAGE HALF BRIDGE DRIVER VCC (VBS) LO (HO) LIN (HIN) tVCCuv (tVBSuv) VCCuvr (VBSuvr) VCCuvh (VBSuvh) VCCuvt (VBSuvt) 3.VCC (VBS) Supply Under Voltage Lockout Timing Diagram 4.Allowable supply voltage transient Allowable high side floating supply voltage (VBS) transient or low side fixed supply voltage (VCC) transient are below 50V/ms. In case VBS or VCC are started more than 50V/ms, output signal (HO or LO) may be “H ”. PACKAGE OUTLINE 16 9 7.8±0.3 5.3±0.1 10.1±0.1 1.27

0.1 MAX

0.25 MAX

F

2.1 MAX

1.27 MIN

1.8 0.1±0.1 +0.10 –0.05 4°±4° 1.25 0.6±0.2 0.761.27 7.62 Detail FDetail G0.755 MAX 0.605 0.4 +0.05 –0.020.2 M G