M65824FP

M65824FP MITSUBISHI | Alldatasheet

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SIGNAL PROCESSOR FOR CD PLAYER WITH BUILT-IN D/A M65824FP MITSUBISHI SOUND PROCESSOR ICs ( / 8 )ELECTRIC MITSUBISHI M65824FP MITSUBISHI SOUND PROCESSOR ICs SIGNAL PROCESSOR FOR CD PLAYER WITH BUILT-IN D/A

DESCRIPTION

The M65824FP is a CMOS IC for playback of a compact disk (CD-DA). It is equipped with memory, non-adjustment PLL, 4fs digital filter and D-A converter. The M65824FP can configure a compact CD-DA system.

FEATURES

• Non-adjustment EFM-PLL with wide lock-range (built-in VCO)
• Jitter margin ± 8 frames
• Operatable CLV servo command
• Attenuation (-12 dB)
• Built-in 4fs digital filter
• Built-in digital de-emphasis circuit
• Built-in D-A converter
• Compact set by the adoption of a compact package
• Built-in analog LPF
• External D-A mode SYSTEM CONFIGURATION Outline 42P2R-A 0.8mm pitch 450mil SSOP (8.4mm x 17.5mm x 2.0mm) RECOMMENDED OPERATING CONDITIONS Supply voltage range (internal circuit, analog) Rated supply voltage (internal circuit, analog) PLL SLICER EMF DE-MODULATOR OPTICAL PICK-UP SUBCODE INTERFACE INTER POLATION DE- EMP 18KSRAM PLL CLK OSC CLK CLV DIGITAL SERVO MCU I/F ECC C1:2error C2:2error 4FS DIGITAL FILTER D/A Display L R RF-AMP PICK-UP SERVO AUTO ADJUST- MENT SYSTEM CONTROL MICROPROCESSOR MOTOR DRIVER M M65824FP

SIGNAL PROCESSOR FOR CD PLAYER WITH BUILT-IN D/A M65824FP MITSUBISHI SOUND PROCESSOR ICs ( / 8 )ELECTRIC MITSUBISHI BUILT-IN FUNCTIONS

• D/A converter
• Memory
• PLL block
• EFM demodulator
• Subcode modulator
• CIRC block
• Interpolation processing unit
• D-A interface
• Digital filter
• De-emphasis block
• CLV servo block
• Microcomputer I/F block PIN CONFIGURATION (TOP VIEW) RNEG/LRCK Outline 42P2R-A AV SS WDCK LOCK/DRD CKSEL ACLRB C423 C846 XI AV DD EXP2DV SS XO EXP1 MLAB SBCO SCCK MSD MCK SYCLK EFFK PWM2 PWM1 KILLB PWM EST1 SCAND EST2 CRCF HF SBQS TLC DSPS LPF DV DD21 TEST IREF
• 64fs 1 bit ∑ Δ D-A converter
• S/N:74dB (typ.)
• Built-in 18K SRAM
• Jitter margin ± 8 frames
• Built-in non-adjustment VCO (Bit clock reproduction)
• Non-adjustment slice level control
• EFM modulation
• Frame sync detection/protection and insertion
• Frame monitor output
• Modulation of subcodes P to W. serial output (conforming to EIJA CP-309)
• Subcode Q register
• CRC check
• Subcode sync signal output (S0/S1)
• Emphasis detection, built-in de- emphasis control
• C1: double correction, C2: double correction
• Unscramble
• De-interleave
• Error monitor output
• Average value interpolation and pre- value hold
• Mute control
• Quadruple over sampling I I R type filter
• Bi-primary I I R filter
• Emphasis detection/automatic operation
• PWM output
• Reduced disk rotation detection output
• CLV servo control command
• Mute control
• -12 dB attenuation
• Subcode Q register interface ROUT/DSCK LNEG/WDCK LOUT/DO AMPREF CGREF

SIGNAL PROCESSOR FOR CD PLAYER WITH BUILT-IN D/A M65824FP MITSUBISHI SOUND PROCESSOR ICs ( / 8 )ELECTRIC MITSUBISHI PIN DESCRIPTION Pin No. Function AV SS LOCK/DRD I/O Symbol CKSEL XI DVss SCCK Word clock output: f=88.2kHz OWDCK O ACLRB C846 O I XO Crystal oscillator input (built-in feedback resistance) CKSEL="L": 8.4672MHz/CKSEL="H": 16.9344MHz SBCO Digital system GND SYCLK Subcode serial output EFFK Subcode read clock input KILLB O EST1 O EST2 HF O TLC I/OLPF TEST IREF DV DD DSPS SBQS Playback signal input CRCF SCAND PWM PWM1 PWM2 MCK MSD MLAB EXP1 EXP2 CGREF Analog system GND Sync status/reduced disk rotation detection output System clock select input, "L": 8.4672 MHz/"H": 16.9344 MHz System reset input: reset="L" Crystal system 4.2336 MHz clock output Crystal system 8.4672 MHz clock output Crystal oscillator output Frame sync output: Lock="H" Digital silence output: Silence="L" open drain output Error status output 2: at C2 error detection="H" Error status output 1: at C1 error detection="H" Slice level control output PLL loop filter connection terminal Power supply to I/O block C423 AMPREF LOUT/DO LNEG/WDCK ROUT/DSCK RNEG/LRCK AV DD O O O O O I I/O I I O O O O Detection/PLL circuit reference current input Subcode Q register read interrupt signal: Read enable: "L" Power supply to internal logic circuit CRC result of subcode Q: CRC OK="H" Subcode sync signal output: Synchronization="H" Disk motor drive PWM output (both sides) Microcomputer I/F shift lock Disk motor drive PWM output 1 (acceleration side) Disk motor drive PWM output 2 (deceleration side) Microcomputer I/F serial data I/O Additional microcomputer input port 2 (built-in 4.7kΩ pull-up resistance) Microcomputer I/F latch clock (built-in 22kΩ pull-up resistance) Additional microcomputer input port 1 (built-in 4.7kΩ pull-up resistance) Operation amplifier reference voltage setting pin for LPF Current source reference current input pin for LPF L-ch audio signal output/serial data output (in external D-A mode) L-ch current source output/word clock output (in external D-A mode) Analog system power supply I O I O I O I O I Shipment test pin: For test="H" R-ch audio signal output/data shift clock output (in external D-A mode) R-ch current source output/L-R clock output (in external D/A mode) I I I O I O O PLL system frame clock output: duty=50% ..

SIGNAL PROCESSOR FOR CD PLAYER WITH BUILT-IN D/A M65824FP MITSUBISHI SOUND PROCESSOR ICs ( / 8 )ELECTRIC MITSUBISHI V V mW V V V ELECTRICAL CHARACTERISTICS (Ta=25°C, VDD =5V, unless otherwise noted) Symbol Test conditions Limits Unit Parameter mA Min. Typ. Max. ABSOLUTE MAXIMUM RATINGS (Ta=25°C, unless otherwise noted) Symbol Ratings Unit DSPS-DV SS Vo Supply voltage (I/O) Input voltage -0.3 to +6.5DV DD -DVSS Pd Topr Power dissipation -40 to +125 RECOMMENDED OPERATING CONDITIONS Symbol Limits UnitParameter Supply voltage (I/O) V V V DV DD Max.Typ.Min. 5.55.02.7 V V Test conditions 2 µA AV DD -AVSS Supply voltage (analog) Supply voltage (internal circuit) Output voltage Operating temperature VI Tstg Storage temperature -10 to +70 350 -0.3 to +3.6 -0.3 to +3.6 DV DD -0.3≤Vi≤DV DD +0.3 DV SS ≤Vo≤DV DD AV DD DSPS fvco Supply voltage (analog) Supply voltage (internal circuit) Input voltage ("H" level) Oscillation frequency 3.0 3.0 8.6436 2.7 2.7 DV DD •0.7 DV SS 8.4672 3.3 3.3 DV DD DV SS •0.3 V V MHz MHz IIL Circuit current Output voltage ("H" level) Input voltage ("L" level) IDD VOH VOL 4.5 IIH Oscillation frequency VIH fosc VOL Output voltage ("L" level) Input voltage ("H" level) 0.4 - µA POWER SUPPLY M65824FP DV DD 22 DSPS 23 VDD :2.7 to 3.3V M65824FP DV DD 22 VDD :3.6 to 5.5V VDD :2.7 to 3.3V Fig.1 3.0V system application example (supply voltage range of 2.7V to 3.3V) Fig.2 5.0V system application example (two power supplies are required) fosc=8.4672MHz fvco=8.6436MHz DV DD =5.0V IOH =-1.0mA DV DD =5.0V IOL =1.0mA VIH=4.5 VIL=0.5V Output voltage ("L" level) Parameter AV DD 42 DSPS 23 AV DD 42

SIGNAL PROCESSOR FOR CD PLAYER WITH BUILT-IN D/A M65824FP MITSUBISHI SOUND PROCESSOR ICs ( / 8 )ELECTRIC MITSUBISHI FUNCTION DESCRIPTION 1. MICROCOMPUTER INTERFACE (1) Pin assignments M65824FP CD-DA 30 SIGNAL PROCESSOR MSD MCK MLAB I/O O O (2) Description MLAB: Latch signal/data I/O switching signal (MLAB="H":Write from µP) (MLAB="L":Read from µP) MCK: Clock signal MSD: Serial data I/O (3) Operation description

• Microcomputer command read/write Data (MSD) is read at a rising edge of the clock pulse (MCK). When a command is determined at a falling edge of the latch line (MLAB), the data line (MSD) is concurrently switched to the output mode to output a status requested by data bits D3, D2, D1 and D0. When the latch line is set to "H", the data line is returned to the input mode again.
• Status request/interface command When requesting various types of the M65824FP status, a microcomputer writes data in D3, D2, D1 and D0 for indicating the requested status in advance. After this command is latched, the status is continuously output while the latch line (MLAB) is set to "L". MSD MCK MLAB D0 D1 D2 D3 D4 D5 D6 D7 Status t1 t2 t4t3 (4) Microcomputer I/F timing chart (5) M65824FP command list Symbol Parameter Min. Unit 200 100 100 100 Shift clock width Shift clock setup Shift clock hold Shift clock setup nsec nsec nsec nsec D7 D6 D5 D4 D3 D2 D1 D0 Status/interface commandAudio functionDisk motor Initial value after power is turned on: 00000000 µP

SIGNAL PROCESSOR FOR CD PLAYER WITH BUILT-IN D/A M65824FP MITSUBISHI SOUND PROCESSOR ICs ( / 8 )ELECTRIC MITSUBISHI Disk motor control D7 D6 Function 0 0 0 1 1 0 1 1 Disk motor off Accelerates the disk motor. Applies the maximum acceleration voltage to the motor. Decelerates the disk motor. Applies the maximum deceleration voltage to the motor. Disk motor CLV control Audio functions D5 D4 Function 0 0 0 1 1 0 1 1 Muting Muting release 12 dB attenuation Status/interface command D3 D2 Function 0 0 1 1 Detects reduced disk rotating speed. "L" when the disk rotating speed is 2/3 or more of the normal speed. PLL lock status. "L" at locked. Subcode read status. "L" when new subcode is received External D-A mode (In case of input after reset) Logical value of EXP2 (pin ) Reserved PLL loop open (= HFD: "H") 1 1 1 1 1 1 0 1 1 0 1 1 1 0 0 1 0 1 00 0 0 1 1 1 0 1 1 0 1 10 0 0 0 0 1 00 1 1 10 0 0 11 00 Data of subcode Q is stored in the internal 80-bit register and can be read using a microcomputer. Subcode ready status command is written to read subcode Q using a microcomputer. (MSD DATA 0100xxxx) (6) Detailed data (7) Subcode Q register interface When the subcode ready status is set to "L", a clock is sent with the latch line (MLAB) kept set to "L" to read the data of subcode Q from the internal register. Read all subcode Q data from the rising edge of SBQS until the next rising edge (for approximately 13.1 msec). SBQS MCK MSD MSD MLAB B1 B2 B3 B4 B5 B6 B7 B8 B9 BA Don't care Q2 Q3 Q4 Q5 Q6 Q7 Q8Status Q1 Q9 Q10 Q11 Q80Q12~Q79 typ.13.1msec t5: Mode setup time (min. 200 nsec)

• SBQS is set to "L" when both the following two conditions are satisfied at the same time. (a) CRC check OK (b) When the two subcode syncs (S0, S1) are normal
• A microcomputer can read information on subcode Q using the M65824FP only when SBQS is set to "L". PLL loop close (= HFD: "L") Logical value of EXP1 (pin )33 Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved

SIGNAL PROCESSOR FOR CD PLAYER WITH BUILT-IN D/A M65824FP MITSUBISHI SOUND PROCESSOR ICs ( / 8 )ELECTRIC MITSUBISHI PWM1 (ACCELERATION) 22.6757µsec Min : 0.2362µsec Max : 15.117µsec PWM2 (DECELERATION) 22.6757µsec Min.: 0.2362µsec Max.: 15.117µsec PWM (BOTH SIDES) 22.6757µsec Min.: 0.2362µsec Max.: 15.117µsec 22.6757µsec Min.: 0.2362µsec Max.: 15.117µsec (DECELERATION) (ACCELERATION) Hi-Z FREQUENCY (kHz) 0 20 40 60 100 -80 -60 -40 -20 -100 Rejection band (f≥24 kHz) Attenuation -36 dB -36 FREQUENCY (kHz) 0 20 40 60 100 -10 Passing band (f≤20 kHz) Ripple 0.6 dB -0.6 2. DISK MOTOR CONTROL PULSE (CLV mode) 3. DIGITAL FILTER

SIGNAL PROCESSOR FOR CD PLAYER WITH BUILT-IN D/A M65824FP MITSUBISHI SOUND PROCESSOR ICs ( / 8 )ELECTRIC MITSUBISHI APPLICATION EXAMPLE AV SS WDCK LOCK/DRD CKSEL ACLRB C423 C846 XI AV DD RNEG/LRCK ROUT/DSCK LNEG/WDCK AMPREF CGREF EXP2DV SS XO EXP1 MLAB SBCO SCCK MSD MCK SYCLK EFFK PWM2 PWM1 KILLB PWM EST1 SCAND EST2 CRCF HF SBQS TLC DSPS LPF DV DD21 TEST IREF LPF Audio R Audio L Micro- computer Disc Motor Driver SUBCODE I/F HF INPUT LOUT/DO LPF