M61506FP

M61506FP MITSUBISHI | Alldatasheet

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MITSUBISHI SOUND PROCESSORS M61506FP Peak hold IC for 5 band spectrum analyzer displays

DESCRIPTION

FEATURES

RECOMMENDED OPERATING CONDITIONS The M61506FP is a 5 band peak hold ICs that use microprocessor time division to produce serial output for spectrum analyzer displays. 5 band peak hold elements for spectrum analyzer displays. Discharge time constant circuit for each band is on the chip. Single 5V power supply. Supply voltage range SELECTORAudio signal 4.5 to 6.5V 1 13 MITSUBISHI ELECTRIC ( / ) SYSTEM BLOCK DIAGRAM Rated supply voltage 5.0 V Peak Hold output Peak Hold5 BPF5 Peak Hold5 BPF5 Peak Hold5 BPF5 Peak Hold5 BPF5 Peak Hold5 BPF5 µ-com interface ENB SELC SELB SELA

Units Resistance : Ω Capacitance: F MITSUBISHI ELECTRIC ( / ) (Notes)f1=105Hz,f2=340Hz,f3=1KHz,f4=3.4KHz,f5=10.5KHz I REF Gen. Vcc/2 Gen. V REF Gen. SELECTOR HOLD C RESET HOLD OUTPUTBPF IN <PEAK HOLD> (VccX0.3) Amp-A Amp- C Amp- D BPF 1 P.HOLD BPF 2 BPF 3 BPF 4 BPF 5 P.HOLD P.HOLD P.HOLD P.HOLD TEST Vcc/2 VREF AOUT COUT DIFOUT IREF CNF ANF PHOUT GND1 SELC ENB SELB Vcc GND2 SELA (The value is the design value)

(1)The audio signal amplified by Amp-A and Amp-D into BPF/peak hold circuit for spectrum analyzer display. Because the last output signal inputs into A/D of microprocessor. The Vcc,GND had better be common with Vcc,GND of A/D of maicroprocessor. It untilizes effect of common-mode rejection of Amp-D.Amp-C is the input amplifier to reject common-mode signal(noise).To get to good ground isolation. (2)BPF/peak hold circuit is fit for 5 band spectrum analyzer display. <center frequency> f1=105Hz f2=340Hz f3=1KHz f4=3.4KHz f5=10.5KHz (The value is the design value) Center frequency and Q of BPF is ω0=gm/C gm:matual condactance of inside amplifier circuit (It depends on outside resistor value of Pin.No.3) C:inside capacitor Q=(R1+R2)/R1:it is fixed by inside resistor ratio. (The design value of Q is 3.5) (3)The hold capacitor of peak hold circuit is included. The reset(discharge) signal is made automatically after ending the output of hold value(Discharge pulse effect:-3dB(typ).fall refer to output value) (4)The internal output voltage of peak hold circuit is refered to Vcc/2. (Pin.No.1) When it is selected by the output select circuit,it appear at PHout (Pin.No.15) refered to GND. 3 13 MITSUBISHI ELECTRIC ( / )

ELECTRIC ( / ) PIN No. Name I/O Function IREF I O I O I 1/2Vcc bias O I ENB Vcc/2 VREF DIFOUT COUT CNF AOUT ANF Vcc SELA SELB SELC GND1 PHOUT GND2 0.3Vcc bias BPF center frequency setting current terminal Output of amplifier-D(BPF input signal) Output of amplifier-C Inverted input of amplifier-C System supply Output setting control terminal A(logic input) Ground 1 Peak hold output terminal Ground 2 I I O I I I I I I Output setting control enable terminal(logic input) Output of amplifier-A Inverted input of amplifier-A Output setting control terminal B(logic input) Output setting control terminal C(logic input)

PIN No. Name I/O Peripheral circuit of pins I I I I I I I10 Ground1 Ground2 O IREF ENB Vcc/2 VREF DIFOUT COUT CNF AOUT ANF Vcc SELA SELB SELC GND1 PHOUT GND2 1 2 O O O Vcc GND2 Supply I I I I I GND2 VccX0.3 VccX0.3 10,11,12,13 20K 10K 10K 180K 180K 150K 350K Vcc/26 5 Vcc/28 7 5 13 MITSUBISHI ELECTRIC ( / )

Thermal derating(maximum rating) MITSUBISHI ELECTRIC ( / ) Symbol Pd Tstg -20 to +75 -40 to +125 V mW Parameter Conditions Ratings Unit Power dissipation Operating temperature Storage temperature 540 5.4 mW/Thermal derating 7Supply VoltageVcc(max) Topr Vi(max) Vo(max) Input voltage range Output voltage range V VGND to Vcc GND-0.3 to Vcc+0.3 0.54 0 25 50 75 100 125 150 0.1 0.2 0.3 0.4 0.5 0.6 0.27 K C C C Ta>25 C Ta<25 C= AMBIENT TEMPERATURE Ta ( )C

ELECTRIC ( / ) Recommended operating conditions Parameter Symbol Conditions MIN TYP MAX Unit Logic input H level voltage VCC GND V V V VIH VIL Vcc 6.54.5 5.0 0.5 2.5Vcc=5V Vcc=5V Supply voltage Logic input L level voltage (Note 1) The center frequency characteristics of BPF are determined by the resistor connected between 3pin terminal and GND.If it is necess- ary,adjust the resistor value(note:all bands will be shifted together). The Q of BPF is fixed in 3.5 by inside circuit. (Note 2) The internal output resistor of peak hold output(PIN 15)is 10kW typ. The input resistance of the microprocessor must be much larger than 10kW . (Note 3) The control voltage from the microprocessor must be from GND -0.3V to Vcc+0.3V. If the control voltage is out of the above range. It\`s necessary to modify the control voltage in the above range by using resistors or diodes. (Ta=25 unless otherwise noted)C

ELECTRIC ( / ) PHout fn SELECT (internal signal) 90% fn RESET (internal signal) <SELECT state> Ts(10µSec.MAX) Tr(25µSec.TYP) <Note 1> 'H'=low level,'1'=high level,'X'='0'or'1' <Note 2> The output setting time is more than 10µsec. (When the output setting time is short,the output value and reset signal become unstable) <Automatic Generation by inside time constant> <Output select logic table> ENB SELA SELBPHout (PinNo.15) SELC 0 11 0 01 1 0 X 11 0 1 1 01 0 0 11 1 1 11 1 1 1 1 0 00 f5:10.5kHz f4:3.4kHz f3:1kHz f2:340Hz f1:105Hz GND GND(output stop) Note GND GND XX X:Don\`t Care OUTPUT CONTROL SPECIFICATION

ELECTRIC ( / ) ENB SELA SELB H L H L H L SELC PHout f1 RESET (105Hz) H L GND H L f2 RESET (340Hz) f3 RESET (1KHz) f4 RESET (3.4KHz) H L H L H L f5 RESET (10.5KHZ) H L f1 f2 f3 f4 f5 X X X X X X TIMING CHART

ELECTRICAL CHARACTERISTICS

ELECTRIC ( / ) SymbolParameter Condition IccCircuit current Maximum output level Output offset voltage Vo Vos Unit Limits Min typ Max mA 4.7 30 mV V 50 dB25 Output response time Discharge level 1.0 105 dB 1.700.5 4.0 µsec Logic input H level Common-mode rejection ratio f1 output level No signal,No select (ENB,SELA,SELB,SELC=0) 8 f1 to f5 Measured at each output (VAIN=-14dBV) f1 to f5 Measured at each output (No signal,ENB=0/1) VIH VIL 2.5 5.0 0 0.5 V V Vcc +0.3 GND -0.3 CMRR Vo1 Vo2 Vo3 Vo4 Vo5 V V V V V 0.5 0.5 0.5 0.5 1.0 1.0 1.0 1.0 1.70 1.70 1.70 1.70 Ts DS The time from the rise of output selection until the rise of PHout (90% of peak) <Reference> Inside reset signal Tr=25µsecTYP. f1(fin=80 to 130Hz) f2(fin=270 to 410Hz) f3(fin=0.8 to 1.2KHz) f4(fin=2.7 to 4.1KHz) f5(fin=8.0 to 13.0KHz) Logic input L level f2 output level f3 output level f4 output level f5 output level (Ta=25 ,Vcc=5.0V,PHout(Pin.No.15)RL=1MΩ unless otherwise noted.VAIN=-30dBV, f=1KHz,ENB(Pin.No.13)=1) C

ELECTRIC ( / ) Units resistance:W capacitance:F 0.1m 100K Vcc/2 VREF AOU T COU T DIFOUT IREF CN F AN F PHOUT SELC ENB SELA SELB Vcc GND2 0.01m 10m 0.1m 39K 100K 39K 100K 0.47m 0.47m I REF Gen. Vcc/2 Gen. V REF Gen. SELECTOR HOLD C RESET HOLD OUTPUT BPF IN <PEAK HOLD> (Vccx0.3) Amp-A Amp- C Amp- D BPF 1 P.HOLD BPF 2 BPF 3 BPF 4 BPF 5 P.HOLD P.HOLD P.HOLD P.HOLD GND1 IN AIN Px1 Px2 Px3 Px4 CONTROL CIRCUIT TEST CIRCUIT MCU I/F OUTPUT CONTROL

ELECTRIC ( / ) I REF Gen. Vcc/2 Gen. V REF Gen. SELECTOR HOLD C RESET HOLD OUTPUT BPF IN <PEAK HOLD> 0.1µ 100K Vcc/2 VREF AOU T COU T DIFOUT IREF CN F AN F PHOUT SELC ENB SELA SELB Vcc GND2 (VccX0.3) Amp-A Amp- C Amp- D 0.01µ 10µ 0.1µ BPF 1 P.HOLD BPF 2 BPF 3 BPF 4 BPF 5 P.HOLD P.HOLD P.HOLD P.HOLD 270K/2 100K 270K 100K 0.47µ 0.047µ GND1 COM CH1 Px1 Px2 Px3 Px4 <Common-mode Noise Rejection > ground isolation 270K 0.047µ CH2 <Input Audio Signal> A/D MCU Units resistance:Ω capacitance:F APPLICATION EXAMPLE

ELECTRIC ( / )