M5M27C202P-12 MITSUBISHI | Alldatasheet

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WB 6249425 0023134 687 MEMITL MITSUBISHI LSIs M5M27C202P,FP,J,VP,RV-12,-15 2097152-BIT(131072-WORD BY 16-BIT) CMOS ONE TIME PROGRAMMABLE ROM DESCRIPTION PIN CONFIGURATION (TOP VIEW) The Mitsubishi M5M27C202P,FP,J.VP,RV are high-speed 2097152-bit one time programmable read only memories. ivizsyver IS ky vcc(sv.ev) They are suitable for microprocessor programming applications | CHIP ENABLE cE _.[=] Eg pcK PROGRAM where rapid tum-around is required. The MSM27C202P, FP, INPUT seo(a] Fare) INPUT J. VP, RV are fabricated by N-channel double polysilicon gate Disee[q Fy-—ars| for Memory and CMOS technology for peripheral circuits, and DisesfF] Fae ara ere available in 40 pin (DIP, SOP, TSOP) or 44 pin (PLCC) weATA Dizes[a] B31 spores plastic packages. ourpurg Jon 5 b5a}—araf INPUTS FEATURES Presse] 8 Bean t Do ++[3] Baro] | © 131072 word x 16 bit organization Da «+f g Fie—as | © Package DIP evnvnrsreeeeenrneenenenesssesees MEM2TC202P oo Hs F] cno(ov)

1 SOP (G25mmil) ss:setseesseseeneeses MEM27C2O2FP ve § ae

| PLCC venervseeststntcesneeneeneneneMSM27C202I oad BS TSOP rnevvvesnineeeentneseneeneneeeMISM2TC2O2VP ete Bo | TSOP (Reverse) srs MBM27C202RV para |« «fa Ej-—as i Os «(a BSl+-A4 } INPUTS MS5M27C202P— 15 --seerss-+ 15 0n8 (max) OUTPUTS | La Fle aa © Programming voltage : 12.5V Or «+f 23+ A2 | © Two line control OE, CE outputlpo «fal baer (Ise2) : Stand~by-----0.1 mA (max.) INPUT 7 ; © Single 5V power supply (read operation) Outline 40P4 (OIP : F ©3 State output buffer 40P2M-A (SOP : FP) | @ Input and output TTL-compatible in read and program ezeusgsBers 1 moded asabSoshcez © Word programming algorithm Saamerdat : © Page programming algonthm oie] ° Ej ao © Standard 40 pin DIP, 44 pin PLCC and pin-compatible with Diiaclal Fala arz 2M EPROM Diowe [a] Fan Ds eof) Eee Aro Oe «efal Fal A0 APPLICATION oncw fd MSM27C2025 Box (ov Microcomputer systems and peripheral equioment, ne fg B} KC or «fd Fleas De «fy Bil a7 Os sof Blas o+ +E ope (SAGE TESETETESETE Tes] test ottttst BSSEBS2z2LE Outline 44P0 (PLCC : J) so +0 W Fy cND(OV) bs +B Bom 0 fae Os sf B+ or an Bd Haar Oro sf Fis On a2 = By + As on =o Ed so Os an] fas as ov =f a> Os au H Bsa Ons Ef Ese 03 ais of Bi san Die wo js 02 ais = pa Os Ea» 01 Pow +E] Bisa aw >a Bal <> 00 ve A fa =o te A Mema7c202RV Bs % = + F<» Do Pow +] [gear Dis sf Bis o1 al fs a2 Dia sof Bi +» 02 ais 20] ho as Dis fy £3 +» D3. Ais +B] Baa die =e Fas Os aa 6] f= as on = Fa s+ 05 AG] B+ As Dio «fd Fs oe an 2G] sar ec | Ba <> o7 wo BIC) fs ae Os «Eq F} GND(ov) 43 +] F9 GND(OV) Outline 40P3J-A (TSOP : VP) Outline 40P3J-B (TSOP : RV) N€: NO_CONNECTION EE

4 MITSUBISHI

@™ 6249825 0023135 513 MNITL MITSUBISHI LSIs M5M27C202P,FP,J,VP,RV-12,-15 2097152-BIT(131072-WORD BY 16-BIT) CMOS ONE TIME PROGRAMMABLE ROM Oem RANMABLE ROM BLOCK DIAGRAM ae Q Se oe $< | (#84 au Q—J VPP (SV, 128) an KI 131072 WORD An C4 X-DECODER x16 BIT —Ovee 66, 6v) Ato o— CELL MATRIX T as ADDRESS INPUTS( Af om => Sno (ov) As on — as O—~ A “ s— -peccoer il GATE QROUTS a2 © a O—| [m O—4 CHIP ENABLE INPUT CE o CHIP ENABLE | OUTPUT SENSE 4 OUTPUT ENABLE oC) OUTPUT ENABLE OUTPUT BUFFERS momonnrs Ores] TT i—-—__. COOCOQOCOOOOOOCO-- Do D1 D2 Ds Da Ds Dé D7 De Da DroD11 Diz Di3Die Dis | DATA INPUTS/OUTPUTS ee SSSSSSSSSSSSSSSSSSSSSSsssese MITSUBISHI are SRS 3-51

Mi 6249825 0023136 4ST MMNITL MITSUBISHI LSIs M5M27C202P,FP,J,VP,RV-12,-15 2097152-BIT(131072-WORD BY 16-BIT) CMOS ONE TIME PROGRAMMABLE ROM FUNCTION (Page programming algorithm) Road Page programming feature of the MSM27C202P, FP, J, VP, Set the CE and OE terminals to the read mode (low level). RV allows 2 words of data to be simultaneously programmed. Low level input to CE and OE and address signals to the The restination addresses for a page programming operation address inputs (Ao~A16) make the data contents of the must reside on the same page; that 1s, Ai through Ars must designated address location available at the data input/output —_not change. At first, the M5M27C202P, FP, J, VP, RV enter (Do~Dis). When the CE or OE signal is high, data input/ the page data latch mode when Ver = 12.5V, CE= “H", OE output are in a floating state. = "L" and PGM= “H". A first end second locations in same When the CE signal is high, the device is in the stand by page are designated by address signals (Ao~Ar6), and the mode or power-down mode. data to be programmed must be applied to each location at 16-bits in paraliel to the data inputs (Do~Dis). In this Programming state, the date (2 words) latch is completed. Then the (Word programming algorithm) M5M27C202P, FP, J, VP, RV enter the page programming The M5M27C202P, FP, J, VP, RV enter the word programming mode when OE = “H". In this state, page (2 words) mode when 12.5V 1s supplied to the Ver power supply input, programming 1s completed when PGM = “L”. CE is at low level and OE 1s at high level. A location 1s designated by address signals (Ao~Ais), and the data to Erase be programmed must be applied at 16-bits in parallel to the — The MSM27C202P, FP, J. VP, RV cannot be erased, because data inputs (Do~Dis). In this state, word programming is they are packaged in plastic without transparent lid. completed when PGM is at low level. MODE SELECTION oT = p= ps] = [= [wl a [ Output dsable [Ve | mT XT Tv BV Floating | Vi. | ef sala Program _venty Vie Vi Vi 6V Data out Page data latch Vir Vir Data_in Page program Vii Vie Vi 12.5V. 6V Prearam waive Vie Resting Wii Vir #2 X can be either Vit or VK, ABSOLUTE MAXIMUM RATINGS (Note 1) Se ee | ee All input or output voltage except Ver As With respect to Ground Storage temperature =85~150 Note 1: Stresses above those listed may cause parmanent damage to the device. This is a stress rating only and functional operation of the device at those or at any other conditions above those indicated in the operational sections of this specification is not imphed. Exposure to absolute maximum rating conditions for extended penods affects device reliability. —_— % MITSUBISHI 3-52 ELECTRIC

M@ 6249825 0023137 396 MEMITL MITSUBISHI LSis M5M27C202P,FP,J,VP,RV-12,-15 2097152-BIT(131072-WORD BY 16-BIT) CMOS ONE TIME PROGRAMMABLE ROM SSS CMOS ONE TIME PROGRAMMABLE ROM READ OPERATION DC ELECTRICAL CHARACTERISTICS (Ta = 0~70°C, Vcc = 5V + 10%, Ver = Vcc, unless otherwise noted) [em eee [mee ae] Om | [tu Input leakage current n= 0~Veo TTT OT A | | to | Output leakage current | Vour=O~Vec TT TOT A | | lee: | Ver current read/ stand-by Vee = Veo = 5.5V ee ee [ise Tyco current stand-by [ceva tm [iss2 | [CE Veg 10 Ft [cc1 Ty corent wotwe CE=0E =Vi DGlous=OmA | | (| 30, ma _| [ccs | TES Vu, f= 8.3MHz, lour= Oma [|_| 30, mA _| [Ve [Ieput tow voltage tos fv [Vn [input high voltage ~*~ | ie | Vd [Vou | Ovtout low voltage Sitti SCYSCdYSC* CBT Vd Output igh voltage Ton= = 400 WA [aap vv] Note 2: Typical values are at Ta=25'C and normal supply voltages | AC ELECTRICAL CHARACTERISTICS (Ta = 0~70°C, Vcc = 5V + 10%, Ver = Vcc, unless otherwise noted) Tin Mi [Min [Max [Min] Max | ‘Address to cutout delay [Ce=CE=Vi iT 20 | 150 | ns CE to output delay a eee Outout enable to output delay —| CEE Ve ff 60 60 [ns] ! Output enabie high to outout float CE=Ve [0 | ~s0 [Oo [ 501 ns | [tox J Outout hold from CE, OE or address | | Ot TO] rs | ” Note 3: VCo must be applied simultaneously VPP and removed simultaneously VPP. AC WAVEFORMS: { Test conditions for A.C. characteristics i vi Input voltage : Vi = 0.45V, Viq = 2.4V ° ‘et Input rise and fall times : S 10ns. : ADORESS: ve ADDRESS VALID Reference voltage at timing measurement : 1.5V | Vin Output load: 1TTL gate + C. (= 100pF) ce Vi or 9 1.3V Vin 1N914 , fo our om HIGH Z UL ea CL = 100pF + HIGH Z OUTPUT KKK » + CAPACITANCE Input capacitance (Address, CE, OE) - =Vozov |__| 18 | pF Tee 25%, f= IMHz, Viz Vo= OV T1158] oF | SS MITSUBISHI are RS 3-53

M@™ 6249425 0023138 222 MEMITL MITSUBISHI LSIs M5M27C202P,FP,J,VP,RV-12,-15 2097152-BIT(131072-WORD BY 16-BIT) CMOS ONE TIME PROGRAMMABLE ROM PROGRAM OPERATION ‘WORD PROGRAMMING ALGORITHM First set Voc = 6V, Ver = 12.5V and then set an address to number of 0.2ms pulse applied to that address in register first address to be programmed. After applying 0.2ms X. And then applied a program pulse X times of 0.2ms width program pulse (PGM) to the address, verify is performed. If a8 an overprogram pulse. When the programming procedure the output data of that address is not verified correctly, apply above is finished, step to the next address and repeat this ‘one more 0.2ms program pulse. The programmer continues procedure till last address to be programmed. When the entire 0.2ms pulse-then-venfy routines until the device verify addresses have been programmed completely, all addresses correctly or twenty five of these pulse-then-venfy routines should be verified with Vcc = Ver = SV. have been completed. The programmer also maintains its total DC ELECTRICAL CHARACTERISTICS (Ta = 25 + 5, Vcc = 6V + 0.25V, Ver = 12.5V + 0.3V, unless otherwise noted) [Serbo | Pomme | te cottore in eM] [x [inet Takase curent ——__[ Vars =¥ee tft nA ; fou = 2.1mA jf oas |v | | [Vox | Outout high voltage (verify) | on 400uA Ta [Va [input low voltage | CTT Tw OV [ve [trout ah vetege fae |e ve ao oo ee [lee [Ver suoply current | POM = Vu [0 | ma AC ELECTRICAL CHARACTERISTICS (Ta = 25 + 5°C, Voc = 6V + 0.25V, Ver = 12.5V + 0.3V, unless otherwise noted) ee [tas | Address setup time] C<iS Ts [tors [OE setup ume | CC“‘dYS tT [tos | Data setup time ed ee ee [tau | Address hold we [of us | Data hold time ie [tore | Chip enable to output float delay [oy 130, ns [wes [Voc setup tine | Ci Ts ee rs [ tow | PGM over program pulse width fore, [s25| me | [tces [CE setup time Pa | us| [oe [Data vaiid from OF OT ns] Note 47 VGC must be applied smuileneously VPP and removed smuteneoualy VPP a

9 MITSUBISHI

6249425 0023139 169 eMITL MITSUBISHI LSis M5M27C202P,FP,J,VP,RV-12,-15 2097152-BIT(131072-WORD BY 16-BIT) CMOS ONE TIME PROGRAMMABLE ROM AC WAVEFORMS PROGRAM VERIFY ve _— ADDRESS rr vit DATA OUTPUT PATA von {' | oara ser {Oars OUTPLT 125V _— ea wv i Veo tM sv ce ” = Pom ™ Ly Via OE torw VIL a Test conditions for A.C. characteristics Input voltage : Vi. = 0.45V, Vi = 2.4V Reference voltage at timing measurement : Input, Output “LU” =0.8V,"H" =2V WORD PROGRAMMING ALGORITHM. FLOW CHART ver = 125V NO WORD WORD FAILED PASS PASS OF 0.2Xms DURATION NO esr cor] YES ‘VERIFY, FAIL PASS + 4sv sve = ver 5v oes ELECTRIC 3-55 ee

MI 6249825 0023140 980 EMNITL MITSUBISHI LSis : M5M27C202P,FP,J,VP,RV-12,-15 2097152-BIT(131072-WORD BY 16-BiT) CMOS ONE TIME PROGRAMMABLE ROM EMS ONE TIME PROGRAMMABLE ROM PAGE PROGRAMMING ALGORITHM First set Voc = 6V, Vep = 12.5V and then set an address to The programmer also maintains its total number of 0.2ms first page address to be programmed. After data of 2 words pulse applied to that page addresses in register X. And then are latched, these latch data are programmed simultaneously applied @ program pulse X times of 0.2ms width as an by applying 0.2ms program pulse. Then a verify is performed. overprogram pulse. When the programming procedure above if each output data is not verified correctly. apply one more is finished, step to the next page address and repeat this 0.2ms program pulse. The programmer continues 0.2ms pulse- procedure till last page address to be programmed. When the then-verify routines until each output data is verified correctly entire page addresses have been programmed completely, all ‘or twenty five of these pulse-then-verify routines have been addresses should be verified with Vcc = Ver = 5V. completed. PAGE PROGRAMMING ALGORITHM. FLOW CHART VeP = 12.5V er) PROGRAM ONE PULSE OF 0.2ms a> yes FAIL | Device FAILED PASS OF 0.2Xms DURATION <EE A08> YES ALL WORD FAILED PASS *45V 5 Veo vePs 85 MITSUBISHI 3-56 ate MIRE ee

MH 62496e5 0023341 817 BENITL MITSUBISHI LSIs M5M27C202P,FP,J,VP,RV-12,-15 2097152-BIT(131072-WORD BY 16-BIT) CMOS ONE TIME PROGRAMMABLE ROM DC ELECTRICAL CHARACTERISTICS (Ta = 25 + 5%, Vcc = 6V + 0.25V, Vor = 125V + 0.3V, unless otherwise noted) Sb a twee Fae | hu Input leakage current Vin = 0~ Voc — uA Vou Outout low voltage (verify) lo. = 2.1m {ff ons Tv] Output high voltage (verify) Ton = - 400 uA eZ es ee [Va T input tow voltage PT oat | [Vn [input high voltage PR Ve PT [lee | Vee supply current [PGM=Ve TT 00 TAY AC ELECTRICAL CHARACTERISTICS (Ta = 25 + 5°, Vec = 6V + 0.25V, Ver = 12.5V + 0.3V, unless otherwise noted) | us| Address setup time [2 | us [tos | Data setup time j 2, HE Addis note ne [ton [Data hold time as ee Vec setup time es ee ee | Ver_setup time a 2 | [ tew | PGM initial program pulse width || TORT OBIT ms | | torw | PGM over program pulse width fT TT 5] ms | CE setup time cn ee OO | Data valid from OF _ [oof 507 ns | Oata latch time Ps ['teows | POM setuo time a 2 | [ toon [CE hold time es [ten [OE “hold time ees | Note 5: VCC must be applied simultaneously VPP and removed simultaneously VPP. a

Wm 6249825 0023142 753 BEMITL MITSUBISHI LSIs M5M27C202P,FP,J,VP,RV-12,-15 2097152-BIT(131072-WORD BY 16-BiT) CMOS ONE TIME PROGRAMMABLE ROM CMOS ONE TIME PROGRAMMABLE ROM AC WAVEFORMS PAGE DATA LATCH PAGE PROGRAM PROGRAM VERIFY Ai~Als Vie tas tAHL Vin ja i * i) a, XK x?) Vi: i Vep SV. tyes Veco | 5V- tvcs Itces tOEH Vn 4 cE . HP PGM tors Vie z \\ ; ve [ww _| Test condition for A.C characteristics Input rise and fall time : (10%~90%) : 3 20ns Reference voltage at timing measurement : Input, Output “L” =0.8V,“H" = 2V ore" 3-58 ELECTRIC

M@ 6249825 0023143 b9T MENITL MITSUBISHI LSIs M5M27C202P,FP,J,VP,RV-12,-15 2097152-BIT(131072-WORD BY 16-BIT) CMOS ONE TIME PROGRAMMABLE ROM DEVICE IDENTIFIER MODE The Device Identifier Mode allows the reading of 2 binary The PROM Programmer reads the manufacturer code and code from the OTP ROM that identifies the manufacturer and the device code and automatically selects the corresponding device type. programming algorithm. MsSM27C202P,FP,J,VP,RV DEVICE IDENTIFIER CODE Hex jee nen |e] | [02] on [om] m Lom | ov [oe] | om [os foe fo [| Manufacturer code|Vu [0 | 0 [0 [olTototofotTototolili |i |o fo fooc} [Device code [Vu[ o [ototofofotTofofofovofotiyolti | 1 [oe |} Note 6: As=120+0.5V AI~As, A1o~A19, OF 0E = Vi, POM = Vix Voc = Ver = 5V # 10% RECOMMENDED SCREENING CONDITION The following screening test is recommended before using.