M56694FP

M56694FP MITSUBISHI | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 5

Technical content

Bi-CMOS & DMOS 32BIT SERIAL-INPUT LATCHED DRIVER M 56694FP/GP MITSUBISHI <CONTROL / DRIVER IC> DES CRIPT IO N The M56694 is a semiconductor integrated circuit that has a built- in, 32-bit shift register and a latch of CMOS structure with serial input and serial/parallel output, and a 32-bit totem-pole-type parallel output driver of high pressure proof DMOS structure. Employed are Bi-CMOS and high pressure proof DMOS processing technology. FEAT URES l Serial input-serial/parallel output l Cascade connections possible through serial output l Latch circuit included for each stage l Driver section supply voltage: VH =120V l Operating temperature: -20 – 75°C APP LICAT IO N Vacuum Fluorescent Display ANODE DRIVER FUNCT IO N The M56694 comprises a 32-bit D type flip-flop with 32 latches connected to itsoutput. In accordance with truth table 1, inputting data to SIN and clock pulse to CLK allows SIN signal to be put into the internal shift register when the clock changes from “H” to “L”, and simultaneously shift register data to be shifted sequentially. Serial output SOUT is used by connecting to the next stage M56694 SIN when more than one M56694 is used to expand bits in the series. In accordance with truth table 2, parallel output allows the latch to pass data through if LAT input is turned to “H”, and data to be retained if LAT input is turned to “L”. Driver output HVOn allows data from the latch to be output if BLK input is turned to “L”, and “L” to be output if BLK input is turned to “H”, irrespective of data from the latch. PIN C O N FIG URAT IO N (TO P VIEW ) VH SIN VDD N.C LGND CLK LAT SOUT VH BLK PGND HVO 1 HVO 2 HVO 3 HVO 4 HVO 5 HVO 6 HVO 7 HVO 8 HVO 9 HVO 10 HVO 11 HVO 12 HVO 13 HVO 14 HVO 15 HVO 16 HVO 17 HVO 18 HVO 19 HVO 20 HVO 21 HVO 22 PGND HVO 32 HVO 31 HVO 30 HVO 29 HVO 28 HVO 27 HVO 26 HVO 25 HVO 24 HVO 23 Outline 44P6N-A (FP) M5 6694FP N.C: no connection PGND VDD PGND LGND CLK BLK SOUT VH SIN HVO 1 HVO 5 HVO 6 N.C HVO 7 HVO 8 HVO 9 HVO 10 HVO 11 N.C HVO 3 HVO 4 HVO 14 HVO 15 HVO 16 HVO 17 HVO 18 HVO 19 HVO 20 HVO 21 HVO 22 HVO 12 HVO 13 N.C HVO 32 HVO 31 HVO 30 HVO 29 HVO 28 HVO 27 HVO 26 HVO 25 HVO 24 HVO 23 24 N.C 36 N.C 48HVO 2 LAT VH Outline 48P6D-A (GP) M5 6694GP

Bi-CMOS & DMOS 32BIT SERIAL-INPUT LATCHED DRIVER M 56694FP/GP MITSUBISHI <CONTROL / DRIVER IC> B LOC K D IAGR A M (Note : Pin No. in paretheses are of M56694GP) Output protect circuit Q T D Q L D Q T D Q L D Q T D Q L D Q T D Q L D Q T D Q L D Q T D Q L D 14 1315424344 BLK LAT SIN CLK SOUT 8 N.C VH PGND VDD LGND HVO 32HVO 31HVO 30HVO 3HVO 2HVO 1 (9) (5) (6) (4) (7) (3)(11) (2)(12) (8) (10) (23)(24)(36) (37)(43) Truth table2.Latchand driversections HVOnDn LAT BLK X H L X Dn=nth bit DFF retention data HVOn=nth bit driver output L=“L” level H=“H” level X=“L” level or “H” level Truth table1.Shiftregistersection CLK H or L Shift register operation DATA is shifted. No changes. TRUT H TABL E X H H L H L L L Output all “L” H L Latch’s data output. fl

Bi-CMOS & DMOS 32BIT SERIAL-INPUT LATCHED DRIVER M 56694FP/GP MITSUBISHI <CONTROL / DRIVER IC> HVO 1 – 32 Output driver(push-pull) FunctionPin name PIN FUNCT IO N D ESCRI PTIO N V DD LGND V H PGND CLK SIN SOUT LAT BLK Serial data output Latch input. When the LATCH is set to “H”, the data in the shift resister will enter the each latch circuit. When the LATCH input is set to “L”, the data will be held. Enable input for output control. When the BLK input is set to “L”, data in the latch circuit will appear at outputs. When the BLK input is set to “H”, all outputs will be set to “L”. Logic stage supply voltage Logic stage ground Output stage supply voltage Output stage ground Clock input for the internal shift resister.The data enter the internal shift resisters and the data in the shift registers wil l be shifted in order by High to Low change of the clock. Serial data input Logic inputs voltage Output voltage Power dissipation range Storage temperature range Logic outputs voltage Logic stage supply voltage Output stage supply voltage VI V HV O Tstg -0.3 – 120 V O -0.3 – V DD +0.3 V DD -0.3 – 7 V H Pd -0.3 – V DD +0.3 -0.3 – V H -55 – 150 940 High supply voltage output pin Symbol Ratings UnitParameter Conditions ABS O LUT E M AXIM UM RAT ING S (Ta=25 C, unless otherwise noted) V V V V V C mW Ta £ C Data output 0.4 V 3.1 High supply voltage output pin V -100 SIN, LAT, CLK BLK V TH V TL Output protect operating voltage I HVOH “H” output current V OH V OL Logic output voltage V HVOH Driver output voltage V HVOL I H Supply current 2 Output all “H”, no load Operating temperature Supply voltage Supply voltage Topr 10 – 110 V DD 4.5 – 5.5 V H -20 – 75 Symbol Ratings UnitParameter Conditions REC O M M ENDE D O PERAT IN G C O NDITIO N S V V C Limits Min. Typ. Max. Symbol Test conditions UnitParameter EL ECT R ICAL CHARACT ERISTICS (V DD =5V, VH=110V and Ta=25 C, unless otherwise noted) I DD I HVOL Supply current 1 “L” input current “L” output current I OH = -0.1mA 100 4.5 -20 106 4.95 3.4 mA mA V V I IH I IL “H” input current No load Output all “L”, no load I HVOH = -0.5mA I HVOL = 0.5mA V IH =5V Input pin I OL = +0.1mA High supply voltage output pin V IL = 0V m A 0.7 0.04 m A m A mA mA m A

Bi-CMOS & DMOS 32BIT SERIAL-INPUT LATCHED DRIVER M 56694FP/GP MITSUBISHI <CONTROL / DRIVER IC> RO = 220KW CO = 50pF Driver output propagation time t PLH(SO) Logic output propagation time Limits Min. Typ. Max.Symbol Test conditions UnitParameter SW ITCHING CHARA CT ER ISTICS (VDD =5V, VH =110V and Ta=25°C, unless otherwise noted) fCLK t PHL(SO) tPH L(O U T) t rout t fout Clock frequency Driver output rise and fall time Duty = 45 – 55% 120 100 0.16 1.3 0.35 300 300 MHz ns ns ms tPLH (O U T) CL = 15pF 1 ms ms ms TEST CIRCUI T CO RO PG DUT CL 50W SOUT HVOn VHVDDinput (1)Pulse generator characteristics tr£20ns tf £20ns (2)Capacitance CL includes connection floating capacitance and probe input capacitance. : RO=220KW : CO=50pF 2.5 TIM ING WAV EFO RM SOUT BLK CLK HVOn SIN 1/fmax thtsu tfso trso trOUT tfOUT tPLH(OUT) 50% 50%50% 50% 50% 50% tPHL(SO) 50% 50% 50% tPHL(OUT) 90% 10% 90% 50% 10% tPLH(SO) 90% 10% 90% 10%50%

Bi-CMOS & DMOS 32BIT SERIAL-INPUT LATCHED DRIVER M 56694FP/GP MITSUBISHI <CONTROL / DRIVER IC>

• Ta=25°C
• Repeated frequency >100Hz
• Figure in the circle represents the number of concurrently operating output circuits.
• Current value denotes a numerical value per circuit. 1.VDD =5V and VH =110V, unless otherwise noted 2. Thermal derating characteristics represent those of an individual IC unit. 3. Allowable duty cycle output current characteristics represent that when a standard substrate is mounted. (Standard substrate: 70x70x1.6mm glass epoxy) Duty cycle vs Permissible output current Output current IOH (mA) 13– 1 8– Duty cycle (%) TYPICAL CHARACT ERISTICS Thermal derating Temperature Ta(°C) Power dissipation Pd(W) 1.0 0.94 0.5 0 100755025 Driver output VON –IOH 02 46 8 10 “H” output voltage VON (V) “H” output current IOH (mA) Ta=-20°C Ta=+25°C Ta=+75°C Duty cycle vs Permissible output current Note •Ta=75°C
• Repeated frequency >100Hz
• Figure in the circle represents the number of concurrently operating output circuits.
• Current value denotes a numerical value per circuit. Note Note 60 8020 10040 Output current IOH (mA) 20 60 10040 Duty cycle (%)