M52797SP

M52797SP MITSUBISHI | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 9

Technical content

MITSUBISHI ICs (AV COMMON) M52797SP/FP AV SWITCH with I2C BUS CONTROL PRELIMINARY Notice. This is not a final specification. Some parametric limits are subject to change. AUG.'98

DESCRIPTION

PIN CONFIGURATION ( TOP VIEW )

FEATURES

• Video and stereo sound switches in one package
• High separation ( video switch )
• Two types of packages are provided : SDIP with a lead pitch of 1.778mm ( M52797SP ) ; and SOP with a lead pitch of 1.27mm ( M52797FP ) . APPLICATION Video equipment RECOMMENDED OPERATING CONDITION Supply voltage 4.7V~9.3V Rated supply voltage 5V,9V Maximum output current 24mA(at 9V) Outline 28P4B (Lead pitch :1.778mm) PIN CONFIGURATION ( TOP VIEW ) Outline 24P2N-B (Lead pitch :1.27mm) The M52797 is AV switch semiconductor integrated circuit with I2C bus control . This IC contains 1-channel of 4-input audio switches and 1- channel of 4-input video switches. Each audio switches and video switches can be controled independently . The video switches contain amplifiers can be controled a gain of output 0dB or 6dB . NC Rch T IN Lch T IN VIDEO 3 IN Rch 1 OUT V 2 OUT TUNER IN Lch 1 OUT VCC Rch 2 IN Lch 3 IN VIDEO 2 IN Lch 2 IN Rch 4 IN Rch 3 IN VIDEO 4 IN Lch 4 IN SDA NC SCL V 1 OUT

21 BIAS

NC: No connection

MITSUBISHI ICs (AV COMMON) M52797SP/FP AV SWITCH with I2C BUS CONTROL PRELIMINARY Notice. This is not a final specification. Some parametric limits are subject to change. AUG.'98 BLOCK DIAGRAM (at 28P4B) Rch T IN Lch 3 IN Rch 2 IN Rch 3 IN Rch 4 IN Lch 4 IN Lch 2 IN Lch T IN V 1 OUT V 2 OUT BIAS I C Control CHIP SELECT BIAS L R M R L M D5D4 0/6dB 0dB 0dB 0dB 16 171819 GND NC V-SW R-MODE R-SW L-SW L-MODE SDA SCL Rch 1 OUT Lch 1 OUT VCC VIDEO 2 IN TUNER IN VIDEO 3 IN VIDEO 4 IN

MITSUBISHI ICs (AV COMMON) M52797SP/FP AV SWITCH with I2C BUS CONTROL PRELIMINARY Notice. This is not a final specification. Some parametric limits are subject to change. AUG.'98 Clamp in Pin No. Name Peripheral circuit pins DESCRIPTION OF PIN DC voltage(V) Remarks

2 Vcc

3 Lch 2 IN

6 Lch 3 IN

7 VIDEO 3 IN

8 Rch 3 IN

9 Lch 4 IN

10 VIDEO 4 IN

11 Rch 4 IN

13 SDA

25 Rch T IN

26 TUNER IN

27 Lch T IN

3.6V 5~9V 4.7V VIL max.=1.5V VIH min.=3.0V

16 GND

17 CHIP

VILmax.=1.5V VIH min.=3.0V VOL max.=0.4V (at Iin=3mA) SLAVE ADDRESS 0~1.5V-----90H 2.5V~Vcc--92H

MITSUBISHI ICs (AV COMMON) M52797SP/FP AV SWITCH with I2C BUS CONTROL PRELIMINARY Notice. This is not a final specification. Some parametric limits are subject to change. AUG.'98 Pin No. Name Peripheral circuit pins DESCRIPTION OF PIN (cont.) DC voltage(V) Remarks VOL max.=0.4V (at Iin=1mA) 18 D5 19 D4

20 V 2 OUT

23 V 1 OUT

22 Rch 1 OUT

24 Lch 1 OUT

4.0V 4.2V 1.5K 1.5K 15K 30K 5K 5K SYNC CHIP DC=2.9V SYNC CHIP DC=2.2V

MITSUBISHI ICs (AV COMMON) M52797SP/FP AV SWITCH with I2C BUS CONTROL PRELIMINARY Notice. This is not a final specification. Some parametric limits are subject to change. AUG.'98 Every byte put on the SDA line must be 8-bits long . Each byte has to be followed by an acknowledge bit. Data is transferred with the most significant bit (MSB ) first . The data on the SDA line must be stable during the HIGH period of the clock . The HIGH or LOW state of the data line can only change when the clock signal on the SCL line is LOW . S ; Start condition, a high to low transition of the SDA line while SCL is high P ; Stop condition, a low to high transition of the SDA line while SCL is high A ; Acknownledge CONTROL This IC controls channel switchs with 1-byte data ( DATA1) . I C BUS I C BUS(Inter IC BUS)is multi master bus system developed by PHILIPS . Two wires ( SDA - serial data, SCL - serial clock ) realize functions of start , stop , transferring data , synchronization and arbitration. The output stages of device connected to the bus must have an open drain or open collector in order to perform the wired-AND function . 1 2 3 4 5 6 7 8 9 1 2 9 LSB A MSB SDA SCL MSB S P A LSB S SLAVE ADDRESS A DATA1 PA S : Start A : Acknowledge P : Stop SLAVE ADDRESS 1 0 0 1 0 0 X 0 R/W bit Usually \ 0 \ ( W : Master transmitter transmits to slave receiver ) Possible to select 17PIN Hi:1,Lo:0 (at 28P4B)

MITSUBISHI ICs (AV COMMON) M52797SP/FP AV SWITCH with I2C BUS CONTROL PRELIMINARY Notice. This is not a final specification. Some parametric limits are subject to change. AUG.'98 Data byte format M52797 FUNCTION TABLE S SLAVE ADDRESS A DATA(D7~D0) A P SLAVE ADDRESS SLAVE ADDRESS A6 A5 A4 A3 A2 A1 A0 R/W 1 0 0 1 0 0 0 / 1 0 DATA1 CONT DATA D7 D6 D5 D4 D3 D2 D1 D0 CONT AUDIO MODE I/O I/O V AMP SW CONT VIDEO SW CONT AUDIO MODE CONT DATA OUT DATA MODE V-SW V OUT D7 D6 D1 D0 0 0 MUTE 0 0 T IN 0 1 R/R 0 1 V 2 IN 1 0 L/L 1 0 V 3 IN 1 1 NORMAL 1 1 V 4 IN AUDIO SW CONT MODE MUTE R/R L/L NORMAL DATA OUT OUT OUT OUT D1 D0 Lch OUT 1 Rch OUT 1 Lch OUT 1 Rch OUT 1 Lch OUT 1 Rch OUT 1 Lch OUT 1 Rch OUT 1 0 0 MUTE MUTE Rch T IN Rch T IN Lch T IN Lch T IN Lch T IN Rch T IN 0 1 MUTE MUTE Rch 2 IN Rch 2 IN Lch 2 IN Lch 2 IN Lch 2 IN Rch 2 IN 1 0 MUTE MUTE Rch 3 IN Rch 3 IN Lch 3 IN Lch 3 IN Lch 3 IN Rch 3 IN 1 1 MUTE MUTE Rch 4 IN Rch 4 IN Lch 4 IN Lch 4 IN Lch 4 IN Rch 4 IN AMP GAIN CONT. I/O CONT. DATA AMP DATA OUT DATA OUT D3 V AMP1 D4 D4 OUT D5 D5 OUT 0 0dB 0 HI 0 HI 1 6dB 1 LO 1 LO

MITSUBISHI ICs (AV COMMON) M52797SP/FP AV SWITCH with I2C BUS CONTROL PRELIMINARY Notice. This is not a final specification. Some parametric limits are subject to change. AUG.'98 Parameter Symbol Test condition Min. Max.Typ. Unit Supply voltage Vcc V Circuit current VIDEO Icc mA Vcc=9V,Vin=0Vp-p ,Rl=∞Ω Vcc=5V,Vin=0Vp-p ,Rl=∞Ω 4.7 9.3 24 32 20 27 (Ta=25°C,Vcc=9V,unless otherwise noted)

ELECTRICAL CHARACTERISTICS

G F D CT dB dB Vp-p kΩ dB f=100kHz Maximum with distortion<1.0% ZIV -0.5 0 0.5 5.5 6 6.5 -2.0 0 2.0 -2.0 -60 -54 --- Voltage gain Frequency characteristics Total harmonic distortion Dynamic Range Output DC offset voltage Input impedance Crosstalk G F THD D VOFF CT dB dB dB kΩ mV Vp-p f=1kHz ,1Vp-p (Vcc9V)(RT R 1OUT ) f=1kHz ,1Vp-p (Vcc5V)(RT R 1OUT ) f=100kHz/1kHz , 1Vp-p(RT R 1OUT ) f=1kHz ,Maximum with distortion<0.5% (RT R 1OUT ) f=1kHz,2Vp-p,at 400HzHPF+30kHzLPF (RT R 1OUT ) 1kHz,1Vp-p RT R 1OUT (at R2 mode) -0.5 0 0.5 -0.5 0 0.5 -2.0 0 1.0 0.01 0.05 5.5 -20 0 20 22 30 38 -90- -84 6.0 (MODE:R T,R2,R3,R4 R 1OUT ) (RT,R2,R3,R4,LT,L2,L3,L4 ) Clamp in(T,V2,V3,V4) f=1MHz,1Vp-p T V1OUT (at V2 mode) Vcc=9V(0dB)(T V1OUT ) Vcc=5V(0dB)(T V1OUT ) f=10MHz/100kHz,1Vp-p (0dB)(T V1OUT ) f=10MHz/100kHz,1Vp-p (6dB)(T V1OUT ) f=100kHz,1Vp-p (0dB)(T V1OUT ) f=100kHz,1Vp-p (6dB)(T V1OUT ) 0 2.0

MITSUBISHI ICs (AV COMMON) M52797SP/FP AV SWITCH with I2C BUS CONTROL PRELIMINARY Notice. This is not a final specification. Some parametric limits are subject to change. AUG.'98 tBUF P S tHD;STA tLOW tR tHD;DAT tHIGH tF tSU;DAT tSU;STA Sr tHD;STA tSU;STO P SDA SCL I C BUS CONTROL SIGNAL2 I2C BUS CONTROL SIGNAL Min. input low voltage (Ta=25°C,Vcc=9V,unless otherwise noted)ELECTRICAL CHARACTERISTICS Max. input high voltage Low level output voltage(SDA) fSCL tBUF tHD;STA tLOW tHIGH tSU;STA tSU;DAT tR tF tSU;STO 4.7 4.0 4.7 4.0 4.7 5.0 250 4.0 100 1000 300 kHz µS µS nS tHD;DAT High level input current Low level input current SCL clock frequency Time of bus must be free before Hold time at start condition The low period of the clock The high period of the clock Setup time for start condition Hold time DATA Setup time DATA Rise time of both SDA and SCL line Fall time of both SDA and SCL line Setup time for stop condition VIH VIL VOL IIH IIL µA V SDA = 3mA SDA , SCL = 4.5 V SDA , SCL = 0.4 V 3.0 0.0 0.0 -10 -10 5.0 1.5 0.4 0.0 Parameter Symbol Test condition Min. Max.Typ. Unit a new transmission can start

MITSUBISHI ICs (AV COMMON) M52797SP/FP AV SWITCH with I2C BUS CONTROL PRELIMINARY Notice. This is not a final specification. Some parametric limits are subject to change. AUG.'98 Application Circuit Example (at 28P4B) Note how to use this IC Input signal with sufficient low impedance to input terminal. The capacitance of output terminal as small as possible. Set the capacitance between Vcc and GND near the pins if possible. Assign an area as large as possible for grounding. Power-on Reset The M52797 has an intermal power-on reset function that sets each control r egister to "0" during IC power ON. The power-on reset VTH has 2.5V. slave address Cange(VCC/GND) 1 NC Rch T IN Lch T IN VIDEO 3 IN Rch 1 OUT V 2 OUT TUNER IN Lch 1 OUT VCC Rch 2 IN Lch 3 IN VIDEO 2 IN Lch 2 IN Rch 4 IN Rch 3 IN VIDEO 4 IN Lch 4 IN SDA NC SCL V 1 OUT BIAS CHIP SELECT GND VCC GND 100u 10u 0.47u 10u 10u 0.47u 10u 10u 0.47u 10u 10K 220 10K 220 10u 0.47u 7510u 10u VCC 0.01u 10K 10K