M5240P MITSUBISHI | Alldatasheet
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MITSUBISHI <LINEAR ICs> DUAL LOW-NOISE J-FET INPUT OPERATIONAL AMPLIFIERS
DESCRIPTION
The M5240P is a semiconductor integrated circuit designed PIN CONFIGURATION (TOP VIEW) as a low-noise Bi-FET operational amplifier which adopts J-FETs in the input stage. The device comes in a 16-pin MONE LY [Te] NON INVERTED DIP and contains two circuits tor yielding high sound quality, | inverTED INPUT 1 [SJINVERTED INPUT 2 high input impedance, high slew rate and low distortion fell fa) characteristics. It can be widely used as an operational im & PHASE amplifier in stereo equipment, tape decks, and as preampli- CEASE SATION i ; pS SCOMPENSATION2 fier for digital audio disc players and other similar products, 3 mixer for public announcement or LM, high fidelity VCRs. ‘By {ii) ourPuT? [Td]oureur 2 (+) POWER \\(—) POWER FEATURES Supey El 3) Supecy @ Low noise serreestesseeeeeseeeeee §/N=820B typ.) , (shorted input, RIAA, IHF-A, PHONO 2.5mVrms) Outline 16P4 @ High slew rate ve SR=40V/ xs(typ.) (Variable by extermally connected RC due to external phase compensation type) © Low distortion rate “ro THD=0.001%(typ.) (1=1kHz, RIAA, Vo=5Vims) © Large load current and allowable current : see he=t50mA Pg=1W APPLICATION Amplifier in stereo equipment, tape decks and digital audio disc players, mixer. RECOMMENDED OPERATING CONDITIONS Supply voltage range «----++--:+--" vo $5~H15V EQUIVALENT CIRCUIT FS (+) | ee POWER | | input ~@ oar loot Ing + Om E23] “| jan" | Y NON- + bo, Tay INPUT | o fhe] las) | ze | Ov INVERTED| p++ | Cis c| to | INPUT 2 i Re SRS | “FS Kaul FE 4 se 23s | i Shas fe) Fee? [Ay i ~ aa ( 3 2) 6-C OQ Power PHASE OUTPUT I OuTPUT 2 PHASE . COMPENSATION 1 COMPENSATION 2 J MITSUBISHI 2-88 ELECTRIC
MITSUBISHI <LINEAR ICs> DUAL LOW-NOISE J-FET INPUT OPERATIONAL AMPLIFIERS ABSOLUTE MAXIMUM RATINGS (12=25°C. uniess otherwise noted) Supply voltage a [ue [toad current 0 Ts [via | Ditterential inputvonage | [vic [Common inputvotage Tt [ba [Power dissipation i 1000 | [Ke | Thermal derating | a5 [to mc] [Tope [Ambient temperature PO =20~+75 [Tsig [Storage temperature smi ELECTRICAL CHARACTERISTICS (ta=25¢, Vec=+15v) ‘Test condit ‘est conditions [tcc [@wcuteurent Vino Pico Tima | [vio [input ottsetvotage Rage sc | 5.0 my | [io [input otteet current PTs TF r000 Tp [io [input bias current P20 T2000 |p [Rin [inoutresistance Pt | [Go [Open loop vottage gain BZA Vomttov To Ta | [Raza to Tes TT [vem [Common input votage with | to TT CMAR [Common mode rejectionratio | ReSik TT To | ['svaR —[Suppiy votage rejection ratio ——[RaS1OKQ TT 80 | 150 [wv | [Ps [Power dissipation | 380 50 [mw | [se [Siewrte et SoBe | [| Gain banawiath product Pt TT ie | [2 eguivaent input retterred noise votlage {| 3.3 | fpvidte [Rgw2anomiaa ea | 2 [2.5 [aves] [s/n [Signatto-noise vottage ratio Rg=a7.niaA cQtMe-aA |e | oe TYPICAL CHARACTERISTICS THERMAL DERATING CIRCUIT CURRENT VS. (MAXIMUM RATING) SUPPLY VOLTAGE 1000 25) s Vin=0] I > | z z | = 800) - 20+ N £ 1 & 3 i | zZ 600 —— 15 ++ 3 5 % 400 S - = 10 ij 4 g \\. 3 ; td | 8 \\ 5 Ltt i 3 \\ = 2 \\ 3 | ° o o 2 50 75 100 125 0 =10 £20 AMBIENT TEMPERATURE Ta (C) SUPPLY VOLTAGE Vee (V) MITSUBISHI Je eee 2-89
MITSUBISHI <LINEAR ICs> DUAL LOW-NOISE J-FET INPUT OPERATIONAL AMPLIFIERS eee VOLTAGE GAIN VS. OUTPUT VOLTAGE VS. FREQUENCY RESPONSE SUPPLY VOLTAGE 120; Frans Gone 2 errs B00 NS z pb eh Ew =| °
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S gob VAS oS 28 tog, Benda Al Fd = ONS 3 cn) atte: 2 4 w Sw NY 5 r PON Sl | tH=0.19 < 40 0 FRO > 4} t= ikHz 2 o Ne 5 $ Pete 2 7 COW 5? i duces | TAQ | A 10 100 tk 10k 100k 1M 10M 100M 0 +10 +20 FREQUENCY f (Hz) SUPPLY VOLTAGE Veo (V) VOLTAGE GAIN VS. OUTPUT VOLTAGE Vs. SUPPLY VOLTAGE LOAD RESISTANCE or Se a Ks I] wt”, gndetk é THD=0. 1% of Eitri An | 3 a . ; | SL 8 ae s = 120 hoe — 6 A _ Z 100 aan a 4 P| F ©. 1800p R= 27 3 ny TEER S Cyx=33p Gy (t=TkHz) . ee Te i | 2 afeey + ° £10 20 100 7k TOK TOOK SUPPLY VOLTAGE Vec (Vv) LOAD RESISTANCE R, (Q) INPUT OFFSET VOLTAGE INPUT OFFSET VOLTAGE VS. VS. SUPPLY VOLTAGE ~ AMBIENT TEMPERATURE
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E +8} —_] oe re > 1 a rT ~ 7) a a yt st) py L ¥ —] z+ 4 — = 20 S$ S$ 5 . > 8 fa 2-60) 2 > —— i 2 0 +10 +20 25 O +25 +50 +75 SUPPLY VOLTAGE Vec« (Vv) AMBIENT TEMPERATURE Ta {C MITSUBISHI 2-30 ate TBS
MITSUBISHI <LINEAR ICs> MS240P DUAL LOW-NOISE J-FET INPUT OPERATIONAL AMPLIFIERS EQUIVALENT INPUT REFFERRED a NOISE VOLTAGE Vs. SIGNAL VS. NOISE VOLTAGE RATIO £ SIGNAL SOURCE RESISTANCE VERSUS SIGNAL SOURCE RESISTANCE = 5.9 aE a ® esr. = aol a v" BS: 10H2~ % eof Ths PHONO= a” le. pte T 30kHz 2 S 2. 5mVrsm etal SLT, 8 ae 3 7 N :.{ of" /| é ‘N = 2.0 = a g 70 S are alll ea TU Eo Lett | 8 6 AS | EU) LT Toh
3 Soo a s7tK 3 STOR 2-570 00 22457 TK 2 BASTION 2 3457 TOOK
TYPICAL APPLICATION EXAMPLE HIGH SLEW RATE FLAT AMP. SLEW RATE (SR) CHARACTERISTICS oe es se 2 fo "= 2 eso é 2 es ee Perr + eS 1 & if Werelir a 2S SR=40V/ 18 Unit Resistance; @ oO 1 2 3 4 5 6 on {TTT TTT sv 8 fe - TET a Bea Bs | SCC 500 (W/ns) £ 3 eee o4 ‘ se Ly | et SR=22V/ ys 0 Tr Copacitance 0 02 04 06 08 1.0 1.2 MITSUBISHI oalees 2-91
MITSUBISHI <LINEAR ICs> DUAL LOW-NOISE J-FET INPUT OPERATIONAL AMPLIFIERS STEREO EQUALIZER AMP TOTAL HARMONIC DISTORTION VS. OUTPUT VOLTAGE PHASE COMP 0.1 oe 5 EH Pine 7] Q@ydith 5 8 mms ee I | cr ee | eur 7 O@RLO] | z EHR om { +3.3,.1k OUTPUT a oe i ) S “Jos ger | 7 g7 memes | [TT | a? | PS SERRRIEE Jrvecd Sve Bs EEE EHH poe g 3 HHH 56k [4.7% 73 ” 2358710 23 5 7100 OUTPUT VOLTAGE Vo Vins TYPICAL CHARACTERISTICS (Voc=+15v, RIAA) + Gy=35. BABI THe + Viu=1. 24. Vems(Rg=2. 22, BW=10H2~30kHz. + THO=0, 001%6(1=1kH2, Vo=5Vrms) PRINTED CIRCUIT BOAD FOR CIRCUIT TESTING (TYPICAL APPLICATION CIRCUIT) PRINTED CIRCUIT BOAD WIRING DIAGRAM (COPPER FOIL SIDE) (PARTS SIDE) e e 3 2.016), 0.056 a Oho. oho FL’ o ° ° ng 4.7K 96k > INT = I our 1K aa Yok % 100 “ Cis i Sal 0s q ° “ 100k 3 ° oo ourz 1 0000008 00) bg Spey ee o Bhats E oie 100 Styl a ow-0 ° IN2 L a 0 b= 8b 56K a oo 00 09 oWM—0 O-WM—0 ° Veo +Vec 8.09604. 7 0.0567. SE 1% cSRGEA Tg P oc °° 220 aah 2-92 ELECTRIC
MITSUBISHI <LINEAR ICs> DUAL LOW-NOISE J-FET INPUT OPERATIONAL AMPLIFIERS Gv=20dB FLAT AMP TOTAL HARMONIC DISTORTION VS. OUTPUT VOLTAGE PHASE COMP 1.0 2 5 28 | EEHEACEHEA ieut 47 AXORLG) 5 3 ° @@+331k oureut 2 mt ttt ITT 0] 08 emo NS RL 6°! N 6 © om g Ne EAH +Vccd 6 —Vee 2 $A 4] a 2 ONS m1 z of TIX a Copactance F oon 23 5710 23 50 7 OUTPUT VOLTAGE Vo (ms TYPICAL CHARACTERISTICS *Veo=t15V + Gy=20dB(f=TkHz) + Vo=9.5Vims(t=1kHz, THD=0. 196) + THO=0.0196(1=1kH2, Vo=-9vems) OFFSET COMPENSATION CIRCUIT Veo 100k Q 159] 22k =IN +iN 100kQ aoe 100-Vio Mo 10k 10k 22k “Vee (CIRCUIT FOR EXPLANATION)