M52342FP MITSUBISHI | Alldatasheet

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MITSUBISHI ICs (TV) M52342FP PLL-SPLIT VIF/SIF IC

DESCRIPTION

The M52342FP is IF signal-processing IC for VCRs and TVs. It enable the PLL detection system despite size as small as that of conventional quasi-synchronous VIF/SIF detector, IF/RF AGC, SIF limiter, FM detector, QIF AGC and EQ AMP .

FEATURES

Video detection output is 2V P-P . It has built-in EQ AMP . The package is a 24-pin flat package, suitable for space saving. The video detector uses PLL for full synchronous detection circuit. It produces excellent characteristics of DG, DP , 920kHz beat, and cross color. Dynamic AGC realizes high speed response with only single filter. Video IF and sound IF signal processings are separated from each other. VCO output is used to obtain intercarrier. This PLL- SPLIT method and built-in QIF AGC provide good sound sensitivity and reduces buzz. As AFT output voltage uses the APC output voltage, VCO coil is not used. Audio FM demodulation uses PLL system, so it has wide frequency range with no external parts and no adjustment. APPLICATION TV sets, VCR tuners RECOMMENDED OPERATING CONDITION In case of V CC and Vreg. out short Incase of Vreg. out open PIN CONFIGURATION (TOP VIEW) Outline 24P2N-A 205 196 187 178 169 1510 VCO COIL VIDEO OUT Vreg. OUT APC FILTER VCO COIL Vcc RF AGC OUT GND VIF IN NFB VIF IN AFT OUT AUDIO OUT IF AGC FILTER RF AGC DELAY EQ F/B QIF DET IN QIF OUT M52342FP 1411

1312 LIMITER IN

Vreg. OUT BLOCK DIAGRAM SplitInter EQ AMP 24 23 22 21 19 18 16 14 13 2 3 6 10 12 VIDEO DET FM DET LIM AMP AF AMP QIF AMP IF AGC RF AGC APC VIF AMP VCO AFT QIF DET 1191 VCO COILVIDEO OUT Vreg. OUT LIMITER INAPC FILTER VCO COIL Vcc RF AGC OUT GND VIF IN NFB VIF IN AFT OUT AUDIO OUTIF AGC FILTERRF AGC DELAY EQ F/B AFT SW/NPSW QIF DET IN QIF OUT QIF AGC GND GND Vcc Vcc REG Vreg. OUT

MITSUBISHI ICs (TV) M52342FP PLL-SPLIT VIF/SIF IC ABSOLUTE MAXIMUM RATINGS (Ta=25 C, surge protection capacitance 200pF resistance 0 W , unless otherwise noted) AMBIENT OPERATING CONDITION (Ta=25 C, unless otherwise noted)

ELECTRICAL CHARACTERISTICS

=5V, Ta=25 C, unless otherwise noted) Symbol Parameter Condition Ratings Unit V CC Supply voltage1 V CC and Vreg. out is not connected to each other. 13.2 V Vreg OUT Supply voltage Vreg. OUT V CC and Vreg. out is not connected to each other. 6.0 V P d Power dissipation 1524 mW T opr Operating temperature -20 to +75 C T stg Storage temperature -40 to +150 C Surge Surge voltage resistance 200 V Supply voltage Supply voltage range Recommended supply voltage In case of V CC and Vreg. out short 4.75 to 5.25V 5.0V In case of Vreg. out open 8.5 to 12.5V Symbol Parameter Test circuit Test point Input point Input SG Measurement condition Limits Unit External power supply switches set to position 1 unless otherwise indicatedV7 V8 V12 Min. Typ. Max. VIF section I CC1 Circuit current1 V CC =5V 1 A VIF IN SG1 5 V CC =5V SW17=1, SW14=2 33 46 59 mA I CC2 Circuit current2 V CC =12V 1 A VIF IN SG1 5 V CC =12V SW14=SW17=2 33 46 59 mA V CC2 Vreg voltage 1 TP17 -- - - 5 V CC =12V SW7=2 4.60 4.95 5.30 V V18 Video output DC voltage 1 TP18A -- - SW8=2 3.2 3.5 3.8 V V o det Video output voltage 1 TP18A VIF IN SG1 --- 1.8 2.1 2.4 V P-P Video S/N Video S/N 1 TP18B VIF IN SG2 --- SW18=2 51 56 dB BW Video band width 1 TP18A VIF IN SG3 Variable SW8=2 7.0 9.0 MHz VIN MIN Input sensitivity 1 TP18A VIF IN SG4 --- - 48 52 dB m VIN MAX Maximum allowable input 1 TP18A VIF IN SG5 --- 101 105 dB m GR AGC control range input ---- --- 50 57 dB V8 IF AGC voltage 1 TP8 VIF IN SG6 --- 2.9 3.2 3.5 V V8H Maximum IF AGC voltage 1 TP8 --- 4.0 4.4 V V8L Minimum IF AGC voltage 1 TP8 VIF IN SG7 --- 2.2 2.4 2.6 V V3H Maximum RF AGC voltage 1 TP3 VIF IN SG6 --- 4.2 4.7 V(V CC =9V) 8.0 8.9 CC =12V) 11.0 11.9 V3L Minimum RF AGC voltage 1 TP3 VIF IN SG7 --- 0.1 0.5 V(V CC =9V) 0.2 0.7 CC =12V) 0.2 0.7 V3 RF AGC operation voltage 1 TP3 VIF IN SG8 --- 89 92 95 dB m CL-U Capture range U 1 TP18A VIF IN SG9 --- 1.0 1.7 MHz CL-L Capture range L 1 TP18A VIF IN SG9 --- 1.8 2.4 MHz CL-T Capture range T 1 - - --- 3.1 4.1 MHz m AFT sensitivity 1 TP2 VIF IN SG10 3.3 20 30 60 mV/kHz

MITSUBISHI ICs (TV) M52342FP PLL-SPLIT VIF/SIF IC PIN12 VOLTAGE CONTROL (cont.) Symbol Parameter Test circuit Test point Input point Input SG Measurement condition Limits Unit External power supply switches set to position 1 unless otherwise indicatedV7 V8 V12 Min. Typ. Max. V2H AFT maximum voltage 1 TP2 VIF IN SG10 3.3 3.85 4.15 V(V CC =9V) 7.7 8.1 CC =12V) 10.7 11.1 V2L AFT minimum voltage 1 TP2 VIF IN SG10 3.3 0.7 1.2 V(V CC =9V) 0.7 1.2 CC =12V) 0.7 1.2 AFT def1 AFT defeat 1 1 TP2 VIF IN SG10 1.65 2.2 2.5 2.8 V(V CC =9V) 4.1 4.5 4.9 CC =12V) 5.5 6.0 6.5 AFT def2 AFT defeat 2 1 TP2 VIF IN SG10 4.6 2.2 2.5 2.8 V(V CC =9V) 4.1 4.5 4.9 CC =12V) 5.5 6.0 6.5 IM Inter modulation 1 TP18A VIF IN SG11 Variable SW8=2 35 40 dB DG Differential gain 1 TP18A VIF IN SG12 --- - 2 5 % DP Differential phase 1 TP18A VIF IN SG12 --- - 2 5 deg V18 SYNC Sync. tip level 1 TP18A VIF IN SG2 --- 0.85 1.15 1.45 V RINV VIF input resister 2 TP4 1.2 k W CINV VIF input capacitance 2 TP4 pF SIF section QIF1 QIF output 1 1 TP13 VIF IN QIF IN SG2 SG13 --- 94 100 106 dB m QIF2 QIF output 2 1 TP13 VIF IN QIF IN SG2 SG14 --- 94 100 106 dB m Vos SIF detection output 1 TP13 VIF IN SG15 0

5 SW7=2 94 100 106 dB

m V1 AF output DC voltage 1 TP10 SIF IN SG20 5 1.6 2.2 2.8 V VoAF1 AF output (4.5MHz) 1 TP10 SIF IN SG16 -- 5 400 560 800 mVrms VoAF2 AF output (5.5MHz) 1 TP10 SIF IN SG21 -- 0 320 450 630 mVrms THD AF1 AF output distortion (4.5MHz) 1 TP10 SIF IN SG16 -- 5 - 0.2 0.9 % THD AF2 AF output distortion (5.5MHz) 1 TP10 SIF IN SG21 -- 0 - 0.2 0.9 % LIM1 Limiting sensitivity (4.5MHz) 1 TP10 SIF IN SG17 SG19 -- 5 - 42 55 dB m LIM2 Limiting sensitivity (5.5MHz) 1 TP10 SIF IN SG22 SG24 -- 0 - 42 55 dB m AMR1 AM rejection (4.5MHz) 1 TP10 SIF IN SG18 -- 5 55 62 - dB AMR2 AM rejection (5.5MHz) 1 TP10 SIF IN SG23 -- 0 55 64 - dB AF S/N 1 AF S/N (4.5MHz) 1 TP10 SIF IN SG20 -- 5 55 62 - dB AF S/N 2 AF S/N (5.5MHz) 1 TP10 SIF IN SG25 -- 0 55 64 - dB RINS SIF input resistance 2 TP7 - 1.5 - kW CINS SIF input capacitance 2 TP7 - 4 - pF Control section C QIF QIF control 1 TP7 -- Variable -- SW7=2 - 0.7 1.0 V Pin12 voltage (V) AF AFT 0 to 2.3 0 to 0.6 PAL NORMAL 1.0 to 2.3 DEFEAT 2.7 to 5.02.7 to 4.0 NTSC NORMAL 4.4 to 5.0 DEFEAT

MITSUBISHI ICs (TV) M52342FP PLL-SPLIT VIF/SIF IC ELECTRICAL CHARACTERISTICS TEST METHOD Video S/N Input SG2 into VIF IN and measure the video out (Pin 18) noise in BW Video band width 1. Measure the 1MHz component level of EQ output TP18A with a spectrum analyzer when SG3 (f2=57.75MHz) is input into VIF IN. At that time, measure the voltage at TP8 with SW8, set to position 2, and then fix V8 at that voltage. 2. Reduce f2 and measure the value of (f2-f0) when the (f2-f0) component level reaches -3dB from the 1MHz component level as shown below. VIN MIN Input sensitivity Input SG4 (Vi=90dBm) into VIF IN, and then gradually reduce Vi and measure the input level when the 20kHz component of EQ output TP18A reaches -3dB from Vo det level. VIN MAX Maximum allowable input 1. Input SG5 (Vi=90dBm) into VIF IN, and measure the level of the 20kHz component of EQ output. 2. Gradually increase the Vi of SG and measure the input level when the output reaches -3dB. GR AGC control range GR=VIN MAX-VIN MIN (dB) V3 RF AGC operating voltage Input SG8 into VIF IN, and gradually reduce Vi and then measure the input level when RF AGC output TP3 reaches 1/2 V CC , as shown below. CL-U Capture range 1. Increase the frequency of SG9 until the VCO is out of locked- oscillation. 2. Decrease the frequency of SG9 and measure the frequency fU when the VCO locks. CL-U=fU-58.75 (MHz) CL-L Capture range 1. Decrease the frequency of SG9 until the VCO is out of locked- oscillation. 2. Increase the frequency of SG9 and measure the frequency fL when the VCO locks. CL-L=58.75-fL (MHz) CL-T Capture range CL-T=CL-U+CL-L (MHz) m AFT sensitivity, V2H Maximum AFT voltage, V2L Minimum AFT voltage 1. Input SG10 into VIF IN , and set the frequency of SG10 so that the voltage of AFT output TP2 is 3V. This frequency is named f(3). 2. Set the frequency of SG10 so that the AFT output voltage is 2V. This frequency is named f (2) S/N=20 log 0.7·Vo det NOISE (dB) TP18 -3dB 1MHz BW ( f2 - f0 ) TP3 Vi V3H Vi (dBm) V3L 1/2VCC Voltage

MITSUBISHI ICs (TV) M52342FP PLL-SPLIT VIF/SIF IC 3. IN the graph, maximum and minimum DC voltage are V2H and V2L, respectively. IM Intermodulation 1. Input SG11 into VIF IN, and measure EQ output TP18A with an oscilloscope. 2. Adjust AGC filter voltage V8 so that the minimum DC level of the output waveform is 1.0V. 3. At this time, measure, TP18A with a spectrum analyzer. The intermodulation is defined as a difference between 920kHz and 3.58MHz frequency components. LIM Limiting sensitivity 1. Input SG17 (SG22) into SIF input, and measure the 400Hz component level of AF output TP10. 2. Input SG19 (SG24) into SIF input, and measure the 400Hz component level of AF output TP10. 3. The input limiting sensitivity is defined as the input level when a difference between each 400Hz components of audio output (TP10) is 30dB, as shown below. AMR AM Rejection 1. Input SG18 (SG23) into SIF input, and measure the output level of AF output TP10. This level is named VAM. 2. AMR is; AF S/N 1. Input SG20 (SG25) into SIF input, and measure the output noise level of AF output TP1. This level is named VN. 2. S/N is; C QIF QIF control Lower the voltage of V7, and measure the voltage of V7 when DC voltage of TP13 begins to change. THE NOTE IN THE SYSTEM SETUP M52342FP has 2 power supply pins of Vcc (pin 14) and Vreg. OUT (pin 17). Pin 14 is for AFT output, RF AGC output circuits and 5V regulated power circuit and Pin 17 is for the other circuit blocks. In case M52342FP is used together with other ICs like VIF operating at more than 5V, the same supply voltage as that of connected ICs is applied to V CC and Vreg. Out is opened. The other circuit blocks, connected to Vreg. OUT are powered by internal 5V regulated power supply. In case the connecting ICs are operated at 5V, 5V is supplied to both V CC and Vreg.OUT. LOGIC TABLE f (3) f (2) f (MHz) V2L V2H TP2 Voltage m = 1000 (mV) f (2) - f (3) (kHz)(mV/kHz) 30dB (dBm) (mVrms) Audio output while Audio output while SG17 (SG22) is input SG19 (SG24) is input Audio output SIF input AMR=20log VoAF (mVr.m.s) VAM (mVr.m.s) (dB) AF AFT 10k “H” 20k “H” NTSC DEFEAT 20k “L ” NORMAL 10k “L ” 20k “H” PAL DEFEAT 20k “L ” NORMAL S/N=20log VoAF (mVr.m.s) VN (mVr.m.s) (dB)

MITSUBISHI ICs (TV) M52342FP PLL-SPLIT VIF/SIF IC INPUT SIGNAL TYPICAL CHARACTERISTICS SG No. Signals (50 W termination) 1f 0=58.75MHz AM20kHz 77.8% 90dBm 2f 0=58.75MHz 90dBm CW 3 f1=58.75MHz 90dBm CW (Mixed signal) f2=Frequency variable 70dBm CW (Mixed signal) 4f 0=58.75MHz AM20kHz 77.8% level variable 5f 0=58.75MHz AM20kHz 14.0% level variable 6f 0=58.75MHz 80dBm CW 7f 0=58.75MHz 110dBm CW 8f 0=58.75MHz CW level variable 9f 0=Variable AM20kHz 77.8% 90dBm 10 f 0=Variable 90dBm CW f1=58.75MHz 90dBm CW (Mixed signal) f2=55.17MHz 80dBm CW (Mixed signal) f3=54.25MHz 80dBm CW (Mixed signal) f0=58.75MHz 87.5% TV modulation ten-step waveform Sync tip level 90dBm 13 f 1=54.25MHz 95dBm CW 14 f 1=54.25MHz 75dBm CW 15 f1=58.75MHz 90dBm CW (Mixed signal) f2=54.25MHz 70dBm CW (Mixed signal) 16 f 0=4.5MHz 90dBm FM400Hz –25kHz dev 17 f 0=4.5MHz FM400Hz –25kHz dev level variable 18 f 0=4.5MHz 90dBm AM400Hz 30% 19 f 0=4.5MHz CW level variable 20 f 0=4.5MHz 90dBm CW 21 f 0=5.5MHz 90dBm FM400Hz –50kHz dev 22 f 0=5.5MHz FM400Hz –50kHz dev level variable 23 f 0=5.5MHz 90dBm AM400Hz 30% 24 f 0=5.5MHz CW level variable 25 f 0=5.5MHz 90dBm CW AMBIENT TEMPERATURE Ta ( °C) 0 25 50 75 100 125 250 500 750 1000 1750 150-20 1250 1500 914 THERMAL DERATING (MAXIMUM RATING) POWER DISSIPATION P d (mW) 1524

MITSUBISHI ICs (TV) M52342FP PLL-SPLIT VIF/SIF IC TYPICAL APPLICATION EXAMPLE (for 38.9MHz SPLIT) SplitInter EQ AMP VIDEO DET FM DET LIM AMP AF AMP QIF AMP IF AGC RF AGC APC VIF AMP VCO AFT QIF DET QIF AGC Vcc REG 14 13 * In case the other components are connected Units Resistance : W Capacitance : F 0.47m 220k 33m VCO COIL 5531 0.01m 22p SFE 5.5MD 0.01m 5.1k2.4k 10m0.47m39k 150k 150k 36k 15k 2 3 68 1045 9 71 24 23 22 19 16 151721 20 18 11 12 0.01m 0.01m 0.56m0.01m SAW 0.01m 3.9k 910 0.33m 390 0.01m 33 2200p 220m IF IN 20k 10k OFF ON 47m 0.01m82p1k 100m 10p 300 18m 150 180 10k 47m VCC OFF ON 8.5 to 12V GND to the GND area nearby the VCO coil, a leakage interference to them should be considered. The bypass capacitors of 33mF and 0.01mF are grounded as close as possible to the GND pins (pin 6, 7, 8) so as to minimize the interference. 0.01m

MITSUBISHI ICs (TV) M52342FP PLL-SPLIT VIF/SIF IC Pin 1 (RF AGC DELAY) Pin 2 (AFT OUTPUT) Pin 3 (RF AGC OUTPUT) Note: Connecting a nonpolarity capacitor of 1mF between pin1 and pin 3 improves AGC operating speed. In that case, the capacitors between pin1/pin3 and ground should be removed. VCC An applied voltage to the pin1 is for changing a RF AGC delay point. VCC (supply to a tuner) Tuner The maximum outflow current is 0.2 mA. The maximum inflow current is 0.2mA. Since an AFT output is provided by a high impedance source, the detection sensitivity can be set by an external resistor. The muting operation will be on in following two cases; 1) the APC is out of locking, 2) the video output becomes small enough in a weak electric field. [fo] Vcc Vcc (in open-loop condition) [V2] VCC [IF input] (in open-loop condition) weak electric field strong electric field (supply voltage to a tuner) A current mode output is available in the reverse AGC operation. The fluctuation of a bottom voltage is made small by loading higher impedance for a deep saturation. VCC (supply to a tuner) The maximum inflow current is 1.5mA.

3 Tuner

[V3]

MITSUBISHI ICs (TV) M52342FP PLL-SPLIT VIF/SIF IC Pin 4, Pin 5 (VIF INPUT) Pin 6, Pin 7, Pin 8 (GND) Pin 9 (QIF INPUT, INTER SW) Pin 10 (IF AGC FILTER) It should be designed considering careful impedance matching with the SAW filter. SAW Bias 1.2kW terminal voltage : 1.45V 1.2kW They are all ground pins. Bias 1.5kW 1.5kW 5kW SAW Inter Inter/Split terminal voltage : 2.4V The input impedance is 1.5kW . In the intercarrier system application, the intercarrier output is available in pin 15 by connecting pin 9 to ground. 1kW VCC [IF input] weak electric field strong electric field [V10] In spite of the 1-pin filter configuration, 2-pin filter characteristics are available by utilizing the dynamic AGC circuit.

MITSUBISHI ICs (TV) M52342FP PLL-SPLIT VIF/SIF IC Pin 11 (AUDIO F/B) Pin 13 (LIMITER INPUT) Pin 14 (AFT SW, NP SW) 5kW 5kW terminal voltage : 2.1V Pin 12 (AF OUTPUT) terminal voltage : 2.2V The FM detector can respond to several kinds of SIF signals without an adjustment and external components by adopting the PLL technique. It also is in compliance with the multi-SIF by selecting an appropriate deemphasis and audio output amplifier using the pin14 switch. The capacitor between pin 11 and 12, which fixes the deemphasis characteristics, can be determined considering the combination of an equivalent resistance of the IC and this capacitor itself. In the 4.5MHz application, the internal voltage gain is increased by 6-dB in comparison with the other applications and then the signals are delivered through an emitter follower. Bias 8kW 8kW The input impedance is 8kW . terminal voltage : 2.2V 10kW 22kW AFT Defeat :H AFT ON :L SIF4.5MHz : H Others : L VCC (5V) 2kW It works as a switch by connecting the resistor to 5V(High) or GND (Low), alternately. The terminal voltage is set by the external resistors because of an open base input. H H H H L L LL AF AMP AFT 4.5MHz OTHER DEFFET NORMAL NORMAL DEFFET OTHER 4.5MHz Pin 14 applied voltage 4.4 to 5.0V 2.7 to 4.0V 1.0 to 2.3V 0 to 0.6V 10kW 20kW

MITSUBISHI ICs (TV) M52342FP PLL-SPLIT VIF/SIF IC Pin 15 (QIF OUTPUT / INTER OUTPUT) Pin 16, Pin 17 (VCC ) Pin 18, Pin 19 (VCO COIL) Pin 20, Pin 21 (REG OUTPUT) Drive current : 0.5mA terminal voltage : 2.45V In both the split and intercarrier system, the carrier signal to SIF provided from pin 15 through an emitter follower. VCC The recommended supply voltage is 5V or 9 to 12V. In the case of 5V supply, these pins should be tied to pin 20 In the case of 9 to 12V supply, a regulated output of 5V are available in pin 20 and 21. and pin 21. 850W 850W 466W 466W Connecting a tuning coil and capacitor to these pins enables The tuning capacitor of about 30pF is recommended. The oscillation frequency is tuned in f0. In the actual adjustment, the coil is tuned so that the AFT voltage is reached to Vcc/2 with f0 as an input. The printed pattern around these pins should be designed carefully to prevent an pull-in error of VCO, caused by the leakage interference from the large signal level oscillator to adjacent pins. The interconnection also should be designed as short as possible. an oscillation. 12.1kW 3.8kW It is a regulated 5V output which has current drive capability of approximately 15mA.

MITSUBISHI ICs (TV) M52342FP PLL-SPLIT VIF/SIF IC Pin 22 (VIDEO OUTPUT) Pin 23 (APC FILTER) In the application, an offset between AFT center frequency and VCO free-running frequency, can be improved by connecting a 220kW resistor to Vcc supply (pin 21). 1.1VO-P internal driving current : 3mA An output amplitude is positive 2VP-P in the case of 87.5% video modulation. 12kW Bias In the locked state, the cut-off frequency of the filter is adjusted effectively by an external resistor so that it will be in the range of around 30 to 200kHz. In case the cut-off frequency is lower, the pull-in speed becomes slow. On the other hand, a higher cut-off frequency widen the pull-in range and band width, which results design, the appropriate constant should be chosen for getting desirable performance considering above conditions. [V23] fo 3.4VO-P [IF input frequency] 100kHz [Pin 23 output] [FM mod. frequency] in a degradation in the S/N ratio. So, in the actual TV system A buzz noise also decreases by connecting a capacitor from cut and try method. The capacitor of less than 680pF, which depends on Q of VCO coil, Taking it into consideration in the actual TV set design. pin 23 to Vcc (pin 21) or GND. This effect utilizes the signal interference on the printed circuit board. So, the determination that which connection is effective, to Vcc or GND, is done by a is recommended to prevent an APC pull-in range from narrowing. 220kW C 23 21

MITSUBISHI ICs (TV) M52342FP PLL-SPLIT VIF/SIF IC Pin 24 (EQ F/B) In the intercarrier system, the following phenomenon should be considered; a strong equalization (EQ) enlarge the sound carrier output from pin 22, because the EQ is applied before an audio trap. In that case, the next two solutions are recommended; decrease in S level of SAW, avoiding to peak a sound carrier in EQ. 16.8kW 500W 3.9kW 3.1kW 1.1VO-P Both the external coil and capacitor determine the frequency response of EQ output. The series connected resistor is for damping. Video output (Circuit Diagram of EQ Amp.) 3.1kW 3.17kW 500W Video Det. 3.75mA