Power Management

M51997P

Mitsubishi Electric Sem...

SWITCHING REGULATOR CONTROL?

Manufacturer: Mitsubishi Electric Sem...

Document: 22 Pages / 922Kb

Request Quote Download Datasheet Read online HTML view

More from Mitsubishi Electric Sem... Browse M parts

Online Datasheet

Read M51997P online.

M51997P MITSUBISHI | Alldatasheet

Document overview

Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
PDF pages: 22

Technical content

MITSUBISHI <Dig./Ana. INTERFACE> M51997P,FP SWITCHING REGULATOR CONTROL

DESCRIPTION

M51997 is theprimary switching regulator controller which PIN CONFIGURATION (TOP VIEW) is especially designed to get the regulated DC voltage trom AC power supply. cotector[1 | [14] Ven This IC can directly drive the MOS-FET with fast rise and fast fall output pulse and with a large-drive totempole vou [2] [3] cum— ‘output. EMITTER z GND Type MS1997 has the functions of not only high frequency g OSC and fast output drive but also current limit with fast owl @ [tT ore response and high sensibility so the true “fast switching Fe 3 [er regulator” can be realized, vere] F]s-on The M51997 is equivalent to the M51978 with negative cur- rent limit and externally resettable OVP (over voltage REG [2] sort protection) circuit. Outline 14P4

FEATURES

© 500kHz applicable to MOS FET + Output current - IA e) + Output rise time 60ns, fall time 40ns co.cector[1] [1] vec + Modified totempole output method with small through Vour cuM— current © Compact and tight-weight power supply EMITTER z gNP + Small start-up current +--+: sere 100A typ. HEAT SINK PIN[4 ] a HEAT SINK PIN + Big difference between “start-up voltage" and “stop ove[s] Fa fa] t—oFF voltage” makes the smoothing capacitor of the power q input section small. re[e] » [i] cr Start-up threshold 16V, stop voltage 10V per [to] Ton + Packages with high power dissipation are used to with- stand the heat generated by the gate-drive current of rec [a] [2}sorr MOS FET : 14-pin DIP, 16-pin SOP 1.5W (at 26°C) Outline 16P2N-A © Simplified peripheral circuit with protection circuit and Connect the heat sink pin to GND. built-in large-capacity totempole output + High-speed current limiting circuit using pulse-by- pulse method (CLM+pin) + Over-voltage protection circuit with an externally re- settable latch (OVP) + Protection circuit for output miss action at low supply voltage (UVLO) © High-preformance and highly functional power supply + Triangular wave oscillator for easy dead time setting + SOFT start function by expanding period APPLICATION Feed forward regulator, fly-back regulator RECOMMENDED OPERATING CONDITIONS Supply voltage ranges: so 12~BOV Operating frequency: Jess than 500kHz Oscillator frequency setting resistance + T-ON pin resistance Rox" see 1OkK~ 750 + T-OFF pin resistance Rorr soreeses k= OKA ¢ MITSUBISHI ELECTRIC 5—55

MITSUBISHI <Dig./Ana. INTERFACE> MS51997P,FP SWITCHING REGULATOR CONTROL BLOCK DIAGRAM REG (7. 4V) F/B Vee nV

1 VOLTAGE

REGULATOR 5.8v is g : X§ IStytKes UNDER 3 4h VOLTAGE ~ ; Leocxour A a - pet ISKBKis ‘OP AMP gs + “gy : ewit pw | ICOMPARA~ © COLLECTOR ; BH LarcH 0 | cr O O Vour [__Joscasaron cure De pve T-onN O DETECTION (TRIANGLE) CQ EMITTER T-OFF © sort ciM~ GND ABSOLUTE MAXIMUM RATINGS [Smear [ar] 31 v a v lo utput current _ an 20.18 * Vecrr_| SOFT terial voage or love__, OVP terminal current 8 mA troy | T-ON terminal input current [ma | rote | T-OFF terminal input curent = Ko | Therma derating Tae 2 Topr__, Operating temperature _ =30~ +85 Tatq___| Storage temperature =ab~ 195 Note 1. “+” sign shows the direction of current flowing into the IC and "—" sign shows the current flowing out from the IC 2. The low impedance voltage supply should not be applied to the OVP terminal 5-56 Peles

MITSUBISHI <Dig./Ana. INTERFACE> MS1997P,FP SWITCHING REGULATOR CONTROL ELECTRICAL CHARACTERISTICS (Vec=18v. T3=25C. unless otherwise noted) Limits Block , Symbol Parameter Test Conditions Min tty Tomar) Un" _ Veo | : Eee | operating supply voltage range ' (stom | 7 30} v ee 3 __Vecistaar: | Operation stant up voltage 15.2) 16.2, 17.2 = Vecisior | Operation stop votage 90) 9.9] 10.9 £ | Bec | Vec'sranr' Vee sro difference 1 AVoc™Veo'staar — Vee stor Tso] 63) 76) Vv g ae vestsy uate é| ie ie) B | leox | Stanesby curent 'Vec=!4.5V 300 STas85C Bo} 100) 200)" fo) \\o, | Voc™15V, f= 188KHz 2.3 ni i A | eco | erating circuit current Vani leone —at-— wt ™ a i - - Veo=25V 1.3) 2.0) 30 ma B | lecove | Circuit current in OVP stat pe 4 2 | fecove | Sueur eure owe —_Nec=9.5V ao, 210) 320) uA | tremino | Curent at 0% duty F/B terminal input current =1.8| =1,0) ma {Tete omen at sie i Te terminet input curent fos] -06) —04| ma tramaxo | Current at maximum duty __| F/B terminal input current F/B | dle "Current difference between max and 0% duty | dlrs =trewno— Irowaxo =1.35 | —0.99/ 0.70) ma __, Gurrent diference between max and 0% duly , are reumo Weare ___ we 9 [Veo | #78 terminal vottage | F/@ terminal mput current=0, 95mA 4.9) 5.9) 71) Vv | Ree {erminal resistance i _ | Ree | OVPterminalresistance | 420/600! 80/0 T Vinovens | OVP terminal H threshold voltage oe _ [a0] 750] 960 | mv _ 4Vmoye | OVP terminal hystersis voltage. + ANarowe Vonovee = Vorovme 30 mov (Nwove | OVP terminal tvesnold curren) Ty ae) 50) 280 [wove [OVP terminal input cuvent “Movess00mv eo] 150] 250 vP lecovec | “ supply ve 7 7. . 10. v roe. | Dillerent voltage between operation 1 Necistor: | Diterence supply vatags ia | (high impedance) 0.85} 1.20) — v —Vecovrc | stopand OVP reset L aE 4 j | Curent fom O¥P fei pMeem30v an |S azo 23 — | THONPS | tor OVP reset | Voo=18V - aio! 140] =93} | Marcu | CLM terminal threshold votage 220) 2007 = 180 | mv CLM~ | incu | CLM terminal current Vewe=nOV =i70| —120/ 90} wa | Trgeum= | Delay time trom CLM teVour = | so] = ns | tose Oscillating frequency Row=20k Ce=220pF 170; 188] 207. kHz ["Toury [Maximum ON duty ores I7aQ, “Ss Tas@5C a7| 50] 53) % 5 | Yoscn | Urper limit voltage cf scilaton wavetorm | 3.97

3 Voltage difference between upper Cer 2009F 1

9 MITSUBISHI

MITSUBISHI <Dig./Ana. INTERFACE> M51997P,FP SWITCHING REGULATOR CONTROL TYPICAL CHARACTERISTICS CIRCUIT CURRENT VS. SUPPLY THERMAL DERATING VOLTAGE (NORMAL OPERATION) (MAXIMUM RATING) ienf_—— [Tp 7 1800) Ron =18x2 | FoscrS0OKHe | | = | = Pet eee © JL Genre = %0} . s i ! TT .oTN 3 | eo es. | 8 x * 6 | Eee Pes | : sou tt ay “CTT 0 «2 «50. TS BST 100 125 «150 0 § 10 18 20 2 30 95 40 AMBIENT TEMPERATURE Ta (°C) SUPPLY VOLTAGE Vee (V) SOFT TERMINAL INPUT VOLTAGE SOFT TERMINAL INPUT VOLTAGE S VS. EXPANSION RATE OF PERIOD S VS. EXPANSION RATE OF PERIOD > DRow= 15k Rore=27k " DRow= 15k Rore=27k BTL [aanazmn Renz 2 rp | Phones raza 3ST 7 | ometSence aetitca 3 TTT [Teeth aerrciaka 2 anna @Row =36K2 Roe =6. 2k 2 5 as a Ron =36KN Rore=6. 22 225 2.5) 2A eat a pope dE | Z oA gid Se TT ze. N TEL tt rod |] Se TT toot Se

8 Lode’ Tole] TT | 3 “Ll oladodell TT |

0 2 4 6 8 10 12 14 16 18 2 0 2 4 6 8 10 12 14 16 18 20 EXPANSION RATE OF PERIOD (TIMES) EXPANSION RATE OF PERIOD (TIMES) SOFT TERMINAL INPUT CURRENT Fom- TERMINAL THRESHOLD VOLTAGE ~ VS. INPUT VOLTAGE i VS. AMBIENT TEMPERATURE pepo ie Pal Fae £ é | acon g } 3 2h) ETT ee we Pe Z a Zoe z Bebe tee PUTT TTT r —FELLIE AT Tit # Qo 1 2 3 4 5 6 7 8 9 19 4 40-20 0 20 40 60 80100 SOFT TERMINAL INPUT VOLTAGE Vsorr (V) 3 AMBIENT TEMPERATURE Ta (‘C)

4 MITSUBISHI

5—58 ELECTRIC

MITSUBISHI <Dig./Ana. INTERFACE> M51997P,FP SWITCHING REGULATOR CONTROL CONE RMINAL VOLTAGE: FEMBIENT TEMPERATURE. =z —500 es 3 a TTT . . eS ee s | ! poe Tan = ee + I E | | = —309| < ReE38K) eo 5 | A evae 2 | A 2 5 wy 45===2aen 3 a Gee et . , FI tit rs a i) ee “eee ‘CLM— TERMINAL VOLTAGE Vein— (V) AMBIENT TEMPERATURE Ta (C) OUTPUT LOW VOLTAGE = Sas ee eee Pop Sec oor SADLER 220 hee Coo Z.J CI 1 ete sc TTT nT] Fe ve Sector aston eT gC gpd eT oe ee 2TH a

3 SCO -

[Deeeereiy ans Eee ee aid g Pub a Seer 5 beet os)

8 SSPE ee LUTE

SOURCE CURRENT low (a) SINK CURRENT Io, (A) DETECTING VOLTAGE DETECTION TERMINAL INPUT CURRENT VS. AMBIENT TEMPERATURE = 14 VS. AMBIENT TEMPERATURE walt TTT TT PiT TTT TTT g iL ei td 3 J : . LS 3. ON : . PENS TTT piceauees pueen AMBIENT TEMPERATURE Ta (‘C) ° AMBIENT TEMPERATURE Ta (‘C) MITSUBISHI ate 5—59

MITSUBISHI <Dig./Ana. INTERFACE) M51997P,FP SWITCHING REGULATOR CONTROL voLTAaGe GAIN OF DETECTION ON duty VS, F/B TERMINAL INPUT CURRENT 3 50, 'S. FREQUENCY <0 (fosc=100kHz) eat TTT TT wT TTT TT e J aD \\Gumoeee zt TIN TTT a ee st N Zoot + pV |) | | 2 NTT ef. AN eel | ati TINT Boop | AANA oer St NT EAA OD Sut TTT NII oo AN TT gil TG sip MIAAT TT S LUTTE Lio tT Py ATT ee OM ros oe 10 12 14 12 18 20 22 FREQUENCY f (Hz) F/B TERMINAL INPUT CURRENT (mA) ON duty VS. F/B TERMINAL INPUT CURRENT ON duty VS. F/B TERMINAL INPUT CURRENT (fosc™200kHz) (fose=S00kH; so, op 1082 2) aan ccalle oa EST wo FN an PANT eee Wee A AN SEER \\\\Cenial TANT TO ANT nN \\ LEANN TI LAAN F/B TERMINAL INPUT CURRENT (mA) F/B TERMINAL INPUT CURRENT (mA)

3 UPPER & LOWER LIMIT VOLTAGE OF OSCILLATOR FREQUENCY

OSC VS. AMBIENT TEMPERATURE . VS. CF TERMINAL CAPACITANCE Pe ae 8 aatiorea | | | | TT 7 IR B ag | Bore = 2 TT ARTE Rove 22k2. FT] 5 ul ee | Sere Stora eer Se aaaaiian aa Pop Biaiian eins ad Tose ='004He 3 tot HY 4 AN ote | dT | CT Pe ee = a gu - PRBS sis

2 Uti Tit | 8 ERR

Fy “40-200 20 40 60 a0 100 Noe ® 2S aq: B 38 1OTEAS yQ? 24S 408

3 AMBIENT TEMPERATURE Ta (C) CF TERMINAL CAPACITANCE (pF)

5~—60 MELECTRIC

MITSUBISHI <Dig./Ana. INTERFACE> M51997P,FP SWITCHING REGULATOR CONTROL OSCILLATOR FREQUENCY VS. AMBIENT TEMPERATURE ON duty VS. Rorr (Ron=24k 22, Rore=20k 2, Ce=330pF) 100 -FSo TT so ttt TTT ttt PRS g A 1 2 =10K9 5 20] 3 meroremec ee OR GGnOeen A SSCEEE TT TT a 60 19-20-0204 8080 100 120140 Rorr (kA) AMBIENT TEMPERATURE Ta (‘C) OSCILLATOR FREQUENCY VS. AMBIENT TEMPERATURE ON duty VS. AMBIENT TEMPERATURE (Ron=24K2, Rore= 20k, Cr=47pF) (foso=100kH2) 700 RRERRREEL “Te z i g 600 SS HRon = 9640 Ror = 6242. Po oe : 3 - 2ST # Cee Z so toto, = 3 200 oti tt it Pel Se CTI 0B) 1G e886 TOO 20 a0 “coma a5 0306S BOO TOOTIO 40 AMBIENT TEMPERATURE Ta (‘C) AMBIENT TEMPERATURE Ta (C) ON duty VS. AMBIENT TEMPERATURE ON duty VS. AMBIENT TEMPERATURE (fosc=200kHz) (fosc=500kHz) 100 100 AP “TTT 60 Roy = 36K, Rare =6. 240 | [tr =x = Sannean , fT progr tee Rowen. cka geo ttt | ¢ wet TTT) = Se ing at cant & a Oa Roy=22kM Rore=12k2 a _ - = BR

3 BCR ee teitearacmn 9 8 SP) SSS Ser inn alicia

“peo ae corr a oR Row=15kfl Rope =27K8) 20) of ‘0 beep ot ltt Pr ol Pir T Ty) Tt titi ti iti | “40-200 20 40 00 80 100 120 140 “60-40 200-20 40 60 G0 100 120 140 AMBIENT TEMPERATURE Ta (C) AMBIENT TEMPERATURE Ta (CT) ¢ MITSUBISHI ’ ELECTRIC 5~61

MITSUBISHI <Dig./Ana. INTERFACE> M5S1997P,FP SWITCHING REGULATOR CONTROL OVP TERMINAL INPUT VOLTAGE OVP TERMINAL THRESHOLD VOLTAGE VS. INPUT CURRENT VS. AMBIENT TEMPERATURE go 2 "(oye DA Cee PT g [rane tae Heo aa 8 oper ee HHH 3 aenenencas| 2 Se st A 3 5 neeasseeesay, 3 oof COCCI S| eee TT SSR ee © 100m ET TTY a g ASAE TT Winresnaia vottage 3 4SSRSSSeeenr YT ineeee g Pe PRESET i ssaseeeees uieieeee FA “Fetes

5 FREES @ (ORAS

ES SRE RRSRSRR es 8 eee = paeeeeen.-—<ceee z z == EEOC) | SEER aa = Coo Z ost - TTP Ruuee esos ee 3S & Geese ea 25 °° CCC : Tp ES S ae oO ow S6so3LLE TT TTT Tyr yr ry) 02 0.4 a6 08 1.0 -40 -20 0 20 40 «660 680 100 OVP TERMINAL INPUT VOLTAGE Vove (V) AMBIENT TEMPERATURE Ta (C) CIRCUIT CURRENT VS. SUPPLY CURRENT FROM OVP TERMINAL FOR VOLTAGE (OVP OPERATION) OVP RESET VS. SUPPLY VOLTAGE 8.0 ee PO ~ —-—Ta=85'C o mat = 60) ovpweserromry [TPT 3 S00} | --—- Tyme 2 sofas) 2 tae | EO) Laos), & 500) ~y 2 wofsameor Tre Pe EAH 4 a eeRseeeeeeeners | $s0of 4 Pe eeeeeeneneeecr4— gs He meaeanal oO PEEPS ear Bad eee

5 OOD eee Fe ee

g* Ager 5am 21 = Tittle So gerry 6 por 7 econ

1.0 Ss 4 1

0 10.0 20.0 30.0 © 40.0 o 8 1018 20 25 303540 SUPPLY VOLTAGE Vee (V) SUPPLY VOLTAGE Vee (V) OUTPUT THROUGH CURRENT WAVEFORM AT FALLING EDGE OF OUTPUT PULSE AT RISING EDGE OF OUTPUT PULSE PANE coe Sa EEE LITT ti | Horizontal axis © 20ns/di Horizontal axis © 20ns/div Vertical axis | 50mA/div Vertical axis : SMA/div MITSUBISHI 562 ae ites

MITSUBISHI <Dig./Ana. INTERFACE> M51997P,FP SWITCHING REGULATOR CONTROL FUNCTION DESCRIPTION parts can be reduced and also parts can be replaced by Types M51997P and M51997FP are especially designed for reasonable one. off-line primary PWM contorl IC of switching mode power _N the following circuit diagram, MOS-FET is used for out- supply to get DC voltage from AC power supply. put transistor, however, bipolar transistor can be replaced Using this |C, smart SMPS can be realized with reasonable _—with no problem, cost and compact size as the number of extemal electric « fm SCOR] 8 | e Your pw} | z eae rec cum Rew i ACINPUT] crm ae z 4 urea a 5 ¢{ sort cue ono Ane | M51997P/P ons L_| a ove #8 T-ONGFT~oFF | FeeoBAcK ove | Fig.1 Application example for feedforward regulator 38. B2e oe, . Ve COLLECTOR] 4 & deo Vour 5 + ot oer cum fy ACINPUT | = Vem f Nevee M51997P/FP | y eMirreR PI E res ono fo a oe in ow Ton _cF_t-orr . 2 ° Cue Rou Fig.2 Application example for fly-back regulator SSS . ELECTRIC . 5-63

MITSUBISHI <Dig./Ana. INTERFACE> MS51997P,FP SWITCHING REGULATOR CONTROL Start-up circuit section where Voscn=4.4V The start-up current is such low current level as typical Vos =2.0V 100A, as shown in Fig. 3, when the Vcc voltage is in- creased from low level to start-up voltage Veci start) Cy is discharged by the summed-up of Rore current and In this voltage range, only a few parts in this IC, which has ‘one sixteenth (1/16) of Ron current by the function of Q2, the function to make the output voltage low level, is alive Qs and Qu when SW,, SW, are switched to “discharge and Icc current is used to keep output low level. The large side” voltage difference between Voc isrant) and Vee (stor makes start-up easy, because it takes rather long duration | 5.8V ron pT CT ATES” cuancine © cl oP Swi Ron . a FROM ~

2 ALOFF SOFT SIGNAL’ y

é A V4.2 'SWITCHED BY g os [% “Sw2i = a ‘ = Q, Elen |~ To J : BZ =H00ua H M5197 g Vecigron —Vevisrann , 7 =9.9V. =16.2V Fig. 4 Schematic’diagram of charging and discharging control circuit for OSG. capacitor Cy SUPPLY VOLTAGE Vee (V) Fig. 3 Circuit current vs. supply voltage we 9. pply voltag: ee 22° i 1 . A Fa ! 1 Oscillator section EE osc : \\ The oscillation waveform is the triangle one. The ON- Pareeuaea ee ' H ' ' duration of output pulse depends on the rising duration of BO the triangle waveform and dead-time is decided by the fall- 33 ing duration. S35 The rising duration is determined by the product of external OZ Von f- resistor Ron and capacitor Cr and the falling duration is zz, mainly determined by the product of resistor Rogr and be3 Vou capacitor C, z52 i . BRS (1)Oscillator operation when SOFT circuit does not Fig. § OSC. waveform at normal condition (no-operation of intermittent action operate and OSC. control circuit) Fig. 4 shows the equivalent charging and discharging cir- tall 1 OF termi - cuit diagram of oscillator So fall rate of CF terminal is given as The current flows through Row from the constant voltage Vrore 4 Vr.on (ws) 4 source of 5.8V. Cr is charged up by the same amplitude as ~ RorrXCy ? 16XRonxC, ‘¥/S . Ron current, when internai switch SWs, SW; is switched to imatel “charging side”. The rise rate of CF terminal is given as The minimum off duration approximately is given as (Voscn—Voser)XCi Veo yyy) oss yy wlascu=VaseuXGr (4) 4 Roux Ce s ) rote 4 Vr-on Rore ' 16XRon where Vy.on=4.5V TON where Vy.orr=3.5V The maximum on duration is approximately given as The cycle time of oscillation is given by the summation of ~ (Voscu~Voscu) X RonX Ce. (s) . (2) Equations 2 and 4 Vr-on The frequency including the dead-time is not influenced by the temperature because of the built-in temperature con- pensating circuit ae ' 5—64 ELECTRIC

MITSUBISHI <Dig./Ana. INTERFACE> MS1997P,FP SWITCHING REGULATOR CONTROL (2)Oscillator operation when the SOFT (soft start) circuit 2 is operating Fa Output transistor is protected from rush current by CLM zz Starts trom OV function at the start time of power on. SOFT terminal is B IF Vosonp = -— == 54° on - used to improve the rising response of the output voltage of Ze ' H power supply (prevention of overshooting) FO Voseip -- 77 ~~ -|- ~ H The ON duration of output is kept constant, and the OFF = yun 7 —+t : duration is extended as the SOFT terminal voltage becom- S38 wobec e eee chee np aT The tit

2322 YorPoot r output pulse

es lower by the soft start circuit of this IC. £268 [ ‘No output pulse The maximum value of extension is set internally at approx- on39 Vou = i imately sixteen times of the maximum ON duration $828 + qi The features of this method are as follows: 1 It is ideal for primary control as IC driving current is Fi9-8 Relationship between oscillator waveform and supplied from the third widing of the main transformer output waveform at start-up at the start-up because constant ON duration is obtained from start-up. Fig. 7 shows the relationship between oscillator waveform

2 It is possible to get a wide dynamic range for ON/OFF nd output pulse

ratio by pulse-by-pulse current limit circuit If the SOFT terminal voltage is Vsorr. the rise rate of CF

2 The response characteristics at power-on is not — terminal is given as

affected by input voltage as the pulse-by-pulse limit = (v/s) 5 current value is not affected by the input voltage. ON * VF Fig. 6 shows the circuit diagram of the soft start. if SOFT ‘The fall rate of oscillation waveform is given as terminal voltage is low, T— OFF terminal voltage becomes sigan Yor 4 SM on. (ws) 6 tow and V;~orr in equations ‘3! and ‘4! become low. ore ME “flows WF where Vsorr: SOFT terminal applied voltage TO REG TERMINAL Vec™0.65V | tones | HW Vsor1—VeeX<0, Vsorr~Vae=0 1 {TERMINAL Mf Vsorr— Voc > Vr-orr (=3.5V), Vsorr—Vae=Vr— ore le | i TEAMRAL! | PWM comparator, PWM latch and current j limit latch section | ve OPTS OF Fig. 9 shows the schematic diagram of PWM comparator Joo | ma and PWM latch section. The on-duration of output waveform 5 oP RMINAL coincides with the rising duration of CF terminal waveform DISCHARGING TRANSISTOR * when the no output current flows from F/B terminal

4 Active when operstion stone At CIRCUT When the F/B terminal has finite impedance and current

flows out from F/B terminal, “A” point potential shown in Fig.6 Circuit diagram of SOFT terminal section and Fig. 9 depends on this current. So the “A” point potential is T-OFF terminal section close to GND level when the flow-out current becomes large. “A” point potential is compared to the CF terminal oscillator 53, waveform and PWM comparator, and the latch circuit is set 22 0 A ‘ when the potential of oscillator waveform is higher than “A” ra Voss Tawa point potential. The latch circuit is reset during the dead Zb x20 7 | Y 3 time of oscillator circuit (falling duration of oscillator = i L too circuit). So the “B” point potential or output waveform of , ot m4 ‘ latch circuit is the one shown in Fig. 10. The final output re sot m4 waveform or "C" point potential is got by combining the "B"

2328 Your point signal and dead-time signal logically

Pees Vo (please refer to Fig. 10) z 325 5228 ' Fig.7 Oscillator waveform when the SOFT circult Is operating MITSUBISHI ae s—65

MITSUBISHI <Dig./Ana. INTERFACE> MS1997P,FP SWITCHING REGULATOR CONTROL sty sey | t mn OSC WAVEFORM | < 4 4 OF CF TERMINAL babes Glo 8 8 8 lag + 3 (Bvoul & | ey | rome jes. s H ak 7 WAVEFORM OF | c . CLM— TERMINAL r Pont ¢ i 1 Ne re 211 i Viscum == 200m | 7 f_. A a Pont DA, CURRENT LIMIT tn ae — = SIGNAL TO AN {Eenose SET LATCH #1.Resistor to determine current limit sensivity 2,High-level during dead time ee RMINAL Fig.9 PWM comparator, PWM latch and current limit latch section 1 " Fig.11 Operating wavetorm of current limiting circuit Oscillator wavelorm Waveform at point A To eliminate the abnormal operation by the noise voltage, s R the low pass filter, which consists of Rye and Cyr is used as waveronmor iN f LN iS shown in Fig. 12 OSC & POINT A fl i Y \\/ Ny see It is recommended to use 10~ 1001 for Ry because such sarod toh trot range of Rxs is not influenced by the flow-out current of POINTB r 1 ‘ ia t 1 some 200A from CLM— terminal and Cyr is designed to = — 7 have the enough value to absorb the noise voltage POINT C Fig.10 Waveforms of PWM comparator input point A, : le latch circuit points B and C v, four oo Current limitting section GND When the current-limit signal is applied before the crossing Reem instant of “A” point potential and CF terminal voltage shown 1 7or in Fig. 9, this signal makes the output “off” and the off state cum— * will continue until next cycle. Fig. 11 shows the timing rela- _ tion among them. It the current limitting circuit is set, no waveform is gener- _Fig.12 Connection diagram of current limit circuit ated at output terminal, however this state is reset during the succeeding dead-time wei So this current limitting circult is able to have the tunction in VOltage detector circuit (DET) section a The DET terminal can be used to control the output voltage every cycle, and is named “pulse-by-pulse current limit > which is determined by the winding ratio of fly back trans- There happen some noise voltage on Reim during the former in fly-back system or in case of common ground cir- switching of power transistor due to the snubber circuit and cuit of primary and secondary in teed forward system, stray capacitor of the transformer windings The circuit diagram is quite similar to that of shunt regulator type 431 as shown in Fig. 13. As well known from Fig. 13, and Fig. 14, the output of OP AMP has the current-sink ability, when the DET terminal voltage is higher than 2.5V 5—66 ELECTRIC

MITSUBISHI <Dig./Ana. INTERFACE> M51997P,FP SWITCHING REGULATOR CONTROL 7AV It is necessary to input the sufficient larger current (800). 5000 ~8mA) than |; for triggering the OVP operation The reason to decrease |p is that it is necessary that |cc at is 6s eB the OVP reset supply voltage is small [4 ys It is necessary that OVP state holds by circuit current from

5 R, in the application example, so this IC has the character-

DET istic of small Icc at the OVP reset supply voltage (= stand- rE: 54k by current + 20.A) On the other hand, the circuit current is large in the higher supply voltage, so the supply voltage of this IC doesn't be- 10.8 come so high by the voltage drop across Ry This characteristic is shown in Fig. 16 [ J The OVP terminal input current in the voltage lower than the OVP threshold voltage is based on I, and the input cur- 1.2k rent in the voltage higher than the OVP threshold voltage is the sum of the current flowing to the base of Qy and the current flowing from the collector of Q, to the base For holding in the latch state, it is necessary that the OVP Fig.13 Voltage detector circuit section (DET) terminal voltage is kept in the voltage higher than Vor of Qs So if the capacitor is connected between the OVP terminal but it becomes high impedance state when lower than ang GND, even though Q> turns on in a moment by the 2.V. DET terminal and F/B terminal have inverting phase surge voltage, etc, this latch action does not hold if the characteristics each other, so it is recommended to connect yp terminal voltage does not become higher than Ver of the resistor and capacitor in series between them for phase, by charging this capacitor compensation. It is very important one can not connect by Eo resetting OVP state, it is necessary to make the OVP resistor directly as there is the voltage difference between terminal voltage lower than the OVP L threshold voltage or them and the capacitor has the DC stopper function make Vg¢ lower than the OVP reset supply voltage. As the OVP reset voltage is settled on the rather high vol- 7 tage of 9.0V, SMPS can be reset in rather short time from 5009 the switch-off of the AC power source if the smoothing capacitor is not so large value 1s 6S re Ly DET fe) Veo © _ nav & a Q Fig.14 Schematic diagram of voltage detector circuit - 4 | ] section (DET) ies OVP circuit (over voltage protection circuit) 7] section OVP circuit is basically positive feedback circuit con- structed by Q2, Qs as shown in Fig. 15. ove 6 Q, Qs turn on and the circuit operation of IC stops, when c 25k the input signal is applied to OVP terminal. (threshold vol- She | tage=750mv) ooo td The current value of Iz is about 150A when the OVP does 1,=0 when OVP operates not operates but it decreases to about 2A when OVP —_£ig.15 Detail diagram of OVP circuit operates MITSUBISHI ate TRS 5 -67

MITSUBISHI <Dig./Ana. INTERFACE> MS51997P,FP SWITCHING REGULATOR CONTROL 80 [= Tanase. T] | RECTIFIED DC aa Tease VOLTAGE FROM ~~» main TRANSFORMER 7.01 | — te=-300 Ty SMOOTHING CAPACITOR | t OVP RESET POINT R 3 8. 9¢v(25C) ve avast B sof savescy, a ie oo = 40 : 7 Vee | Ee THIRD WINDING OR 3 40 A | go4 1 1 | eee Lowe F 3 ad ot: M51997 Cue F ot) Laer ° A 10 Ls Lies tT @ eno 0 10.0 20.0 30.0 40.0 Fig. 17 Start-up circuit diagram when it is not necessary SUPPLY VOLTAGE Vec (V) to set the start and stop input voltage Fig.16 CIRCUIT CURRENT VS. SUPPLY VOLTAGE (OVP OPERATION) Just after the start-up, the Ico current is supplied from Cyc. however, under the steady state condition, IC will be Output section supplied from the third winding or bias winding of transfor- It is required that the output circuit have the high sink and Te", the winding ratio of the third winding must be de- source abilities for MOS-FET drive. It is well known that the Signed so that the induced voltage may be higher than the “totempole circuit has high sink and source ability. Howev- _ OPeration-stop voltage Vecisrop) er, it has the demerit of high through current. The Voc voltage is recommended to be 12V to 17V as the For example, the through current may reach such the high "o"mal and optimum gate voltage is 10 to 15V and the out- current level of 1A, if type M51997 has the “conventional” Put voltage (Vow) of type M51997P, FP is about (Vcc—2V) totempole circuit. For the high frequency application such _!* iS not necessary thal the induced voltage is settled high- as higher than 100kHz, this through current is very impor- er than the operation start-up voltage Voc start), and the tant factor and will cause not only the large Icc current and _‘igh gate drive voltage causes high gate dissipation, on the the inevitable heat-up of IC but also the noise voltage. other hand, too low gate drive voltage does not make the This IC uses the improved totempole circuit, so without de- MOS-FET fully on-state or the saturation state teriorating the characteristic of operating speed, its through current is approximately 100mA (2)The start-up circuit when it is necessary to set the start and stop input voltage APPLICATION NOTE OF TYPE M51997P,FP _ tis recommend to use the third winding of “forward wind- Design of start-up circuit and the power 19" o “positive polarity” as shown in Fig. 18, when the DC supply of IC source voltages at both the IC operation start and stop must (1)The start-up circuit when it is not necessary to set the _€ settled at the specified values start and stop input voltage The input voltage (Vinisrant)). at which the IC operation Fig. 17 shows one of the example circuit diagram of the Stats, is decided by Ry and Re utilizing the low start-up start-up circuit which is used when it is not necessary to set _-“UrTent characterisitics of type M51997P, FP. the start and stop voltage. necrineo oc MN It is recommended that the current more than 300A flows SOTA con ne epee nome through R, in order to overcome the operation start-up cur- OOF TRANSFORMER rent Icc(sranr) aNd Cycc is in the range of 10 to 47uF. The Ry aa es product of R; by Cycc causes the time delay of operation, s0 the response time will be long if the product is too much ve large. 0 Ve N wro winons lo} OF FaANSORGeR R; + ° M51997 ° BE Cvce O GND Fig. 18 Start-up circuit diagram when It is necessary to set the start and stop input voltage ¢ MITSUBISHI 568 4 ELECTRIC

MITSUBISHI <Dig./Ana. INTERFACE> MS1997P,FP SWITCHING REGULATOR CONTROL The input voltage (Vi, stop ), at which the IC operation (4)Power supply circuit for easy start-up stops, is decided by the ratio of third winding of trans- When IC start to operate, the voltage of the Cycc begins to former decrease till the Cycc becomes to be charged from the The Vin stanr aNd Vin stop are given by following equa- third winding of main-transformer as the Icc of the IC in- tions creases abruptly. In case shown in Fig. 17 and 18, some “unstable start-up” or “fail to start-up” may happen, as the Vin staar = Ri + lee HR Voc stant 7? charging interval of Cycc is very short duration; that is the Sy charging does occur only the duration while the induced Vin stor (Voc stop ~Ve) yet ZV in ae ee 8 winding voltage is higher than the Cycc voltage, if the in- duced winding voltage is nearly equal to the “operation- where stop voltage” of type M5197 Iccu is the operation start-up current of IC It is recommended to use the 10 to 47F for Cyc, and ab- Vcc stant is the operation start-up voltage of IC out 5 times capacity bigger than Cycey for Cyece Vceisrop: is the operation stop voltage of IC Ve is the forward voltage of rectifier diode Vw pp: is the peak to peak ripple voltage of R, Voc terminal= Nev, Ap. pp - . O Vee co» MAIN TRANSFORMER It is required that the Viv sraar) Must be higher than Vin + + THIRD WINDING When the third winding is the “fly back winding” or “reverse | polarity", the Viv'sraar) can be fixed, however, Vin,stop can | not be settled by this system, so the auxiliary circuit is re- QGND ; quired ——— Fig. 20 DC source circuit for stable start-up (3)Notice to the Vcc, Vcc line and GND line To avoid the abnormal IC operation, it is recommended to QP circuit design the Vcc is not vary abruptly and has few spike vol- —_(4)To avoid the miss-operation of OVP tage, which is induced from the stray capacity between the It is recommended to connect the capacitor between OVP. winding of main transformer. terminal and GND for avoiding the miss operation by the To reduce the spike voltage, the Cycc, which is connected —_ spike noise between Vcc and ground, must have the good high fre- The OVP terminal is connected with the sink current source quency characteristics (=150A)in IC when OVP does not operate, for absorbing To design the conductor-pattern on PC board, following the leak current of the photo coupler in the application cautions must be considered as shown in Fig. 19. So the resistance between the OVP terminal and GND for '2 To separate the emitter line of type M51997 from the —_|eak-cut is not necessary the GND line of the IC If the resistance is connected, the supply current at the b. To locate the Cycc as near as possible to type M51997 OVP reset supply voltage becomes large and connect directly As the result, the OVP reset supply voltage may become © To separate the collector line of type M51997 from the _ higher than the operation stop voltage Veg line of the IC In that case, the OVP action is reset when the OVP is trig- d. To connect the ground terminals of peripheral parts of gered at the supply voltage a little high than the operation \\Cs to GND of type M51997 as short as possible stop voltage. So it should be avoided absolutely to connect the resist- ance between the OVP terminal and GND COLLECTOR — Ved / Ban + 2 TRANSFORMER: ATHIROD ; Cvee 3 iN OUTPUT wa EMTTER GS GNOG Fig. 19 How to design the conductor-pattern of type M51997 on PC board (schematic example) ae ' ELECTRIC 5-69

MITSUBISHI <Dig./Ana. INTERFACE> M51997P,FP SWITCHING REGULATOR CONTROL TO REG oF Voc c-- + S “vec i nat 56k ; . TRANSFORMER of = 51997 ; M51997 5 PHOTO COUPLER . ~~ Til ove: I __ 1 \\" i Fig. 23 OVP setting method using the induced third winding voltage on fly back system (4)Method to control for ON/OFF using the OVP terminal Fig. 21 Peripheral circuit of OVP terminal You can reset OVP to lower the OVP terminal voltage lower than Vrnovet, So you can control for ON/OFF using this nature (2)Application circuit to make the OVP-reset time fast The application is shown in Fig. 24. The reset time may becomes problem when the discharge the circuit turns off by SW OFF and turns on by SW ON in time constant of Crm (Ry+Re) is long. Under such the cir- this application Cult condition, it is recommended to discharge the Cvcc OF course you can make use of the transistor or photo- forcedly and to make the Vcc low value; This makes the trancistor instead of SW OVP-reset time fast. REG (3)OVP setting method using the induced third winding voltage on fly back system M51997 For the over voltage protection (OVP), the induced fly back 5. tk type third winding voltage can be utilized, as the induced ove third winding voltage depends on the output voltage. Fig 23 shows one of the example circuit diagram. i sw TO MAIN [4 ; 7 TRANSFORMER Fig. 24 Method to control for ON/OFF using the | OVP terminal Current limitting circuit id 7 Vee (1)Peripheral circuit of CLM — terminal a) Pend a Fig.25 shows the example circuit diagrams around the CLM as — terminal. It is required to connect the low pass filter. in GND oder to reduce the spike current component, as the main - current or drain current contains the spike current especial- THE TIME CONSTANT ly during the turn-on duration of MOS-FET BE SS eART SHOULO 1,000pF to 22,060pF is recommended for Cyr and the Rye, and Ryr2 have the functions both to adjust the “current- Fig. 22 Example circuit diagram to make the detecting-sensitivity” and to consist the low pass filter. OVP-reset-time fast 5—70 y ELECTRIC

MITSUBISHI <Dig./Ana. INTERFACE> MS1997P,FP SWITCHING REGULATOR CONTROL a tos GNO M51997 © hos _ J Rae CURRENT a a Umit Bure SIGNAL h (b) Primary and secondary current Fig. 26 Primary and secondary current waveforms under the current limitting operation Fig. 25. Peripheral circuit diagram of CLM— terminal condition on feed forward system To design the Rur; and Rwea, it is required to consider the w influence of CLM — terminal source current (Incum —) » 2 which value is in the range of 90 to 270A 2 In order to be not influenced trom these resistor paralleled 2 value of Ryer and Ryrz, (Ryei//Rwe2) is recommended to 4 be less than 1002. 3 The Roum should be the non-inductive resistor (2)Over current limitting curve OUTPUT CURRENT (a) In case of feed forward system Fig. 27 Over current limitting curve on teed forward Fig. 26 shows the primary and secondary current wave- system forms under the current limitting operation. At the typical application of pulse by pulse primary current yeical app! pr y pulse primary The demerit of the pulse by pulse current limiting system detecting circuit, the secondary current depends on the is that the output f idth ‘ot red I h primary current. As the peak value of secondary current is a put pulse width can not reduce to less than ‘ some value because of the delay time of low pass filter limitted to specified value, the characteristics curve of out- connected to the CLM — terminal and propagation delay put voltage versus output current become to the one as shown In Flo, 27 time Tpocim — from CLM — terminal to output terminal of type M51997, The typical Trocim— is 150ns As the trequency becomes higher, the delay time must be be shorter. And as the secondary output voltage becomes > Tr higher, the dynamic range of on-duty must be wider; it means that it is required to make the on-duration much more narrower. So this system has the demerit at the high- er oscillating frequency and higher output voltage applica- tions. — To prevent that, the SOFT terminal is used to lower the fre- quency when the curve starts to become vertical ToiC GND 4 3 Reo Toctm— <4 (a) Feed forward system Oe

MITSUBISHI <Dig./Ana. INTERFACE> M51997P,FP SWITCHING REGULATOR CONTROL H REG bao GOueerO + BIAS WINDING OF QVec FE Cyc THE MAIN TRANSFORMER 3k 500 Vour ' .e: 1S 6s M51997 TO OUTPUT F/B Ry TRANSISTOR SOFT o i c M51997 _| pre ae Fig. 28 Relationship between REG terminal and fa F/B terminal If the curve becomes vertical because of an excess cur- rent, the output voltage is lowered and no feedback current flows from feedback photo-coupler, the PWM comparator PHOTO-COUPLER FOR FEED BACK SIGNAL operates to enlarge the duty sufficiently, but the signal from the CLM-+ section operates to make the pulse width nar- Fig. 29. Ciroult to lower frequency during over current rower Under the condition in which Iz in Fig, 26 does not become Your, sorr YE sort 0, the output voltage is proportional to the product of the in put voltage Vw (primary side voltage of the main 2 transformer) and on duty. If the bias winding is positive, + Vee is approximately proportional to Vin and the smoothed output voltage of the IC is proportional to Viy. The exist- ence of feed back current of the photo-coupler is known by TO MAKE THE KNEE POINT HIGH measuring the F/B terminal voltage which becomes less Vour than 2Vee in the internal circuit of REG terminal and F/B SOFT terminal if the output current flows from the F/B terminal Fig. 29 shows an application example. Q, is turned on when normal output voltage is controlled at t a certain value. The SOFT terminal is clamped to a high- level voltage. If the output voltage decreases and the curve TO MAKE THE KNEE POINT LOW starts to drop, no feed back current flows, Q, is tuned off and the SOFT terminal responds to the smoothed output FI: 90 Meee? to control the knee point of frequency voltage. It is recommended to use an Ry and Ry of 10k~30KA. An Ry of 20~ 100k 2 and C of 1000pF ~ 8200pF should be used To change the knee point of frequency drop, use the circuit in Fig. 30. To have a normal SOFT start function in the circuit in Fig 29, use the circuit in Fig. 31. It is recommended to use an Ry of 10k 5—72 J ELECTRIC

MITSUBISHI <Dig./Ana. INTERFACE> MS51997P,FP SWITCHING REGULATOR CONTROL Es D> w G e BIAS WINDING OF g

0 Ve oO BB Cvce THE MAIN 5

Fy >> =< POINT THAT Voc VOLTAGE Vour & a7 OR THIRD WINDING oO 3 -7 VOLTAGE DECREASES M51997 TO OUTPUT Uo UNDER “OPERATION-STOP Rs 3 TRANSISTOR 8 | o-- VOLTAGE SOFT ° Re DC OUTPUT CURRENT c . Fig. 32. Over current limiting curve on fly back system on | +] a, 2 Dy b. J COLLECTOR aE Cvce Ra. . “*~—— PHOTO-COUPLER FOR FEEDBACK SIGNAL M51997 sort Oo Fig. 31 Circuit to use frequency drop during the over Ore Ores Re current and normal soft start (b)In case of fly back system ne The OC output voltage of SMPS depends on the Voc vol- Re tage of type M51997 when the polarity of the third winding To photo-coupler for feed back signal is negative and the system is tly back. So the operation of. 53, Circuit to lower the frequency during the over type M51997 will stop when the Vcc becomes lower than current In the fly back eyster 9 “Operation-stop voltage” of M51997 when the DC output voltage of SMPS decreases under specitied value at over load condition. Output circuit However, the MS1997 will non-operate and operate inter- (4) The output terminal characteristics at the Vcc mittently, as the Vcc voltage rises in accordance with the voltage lower than the “Operation-stop” voltage decrease of Ioc current The fly back system has the constant output power charac- to main teristics as shown in Fig. 32 when the peak primary current TRANSFORMER and the operating frequency are constant To avoid an increase of the output current, the frequency is 51997 towered when the DC output voltage of SMPS starts to drop Vour using the SOFT terminal. Vcc is divided and is input to the SOFT terminal as shown in Fig. 33, because the voltage in 100k9 $ Rei proportional to the output voltage is obtained from the bias winding. in this application example, the current flowing to R; is added to the start-up current. So please use high re- sistance or 100k 2~200k2 for Ro, The start-up current is not affected by Ry if Rs is connected to Cyccz in the circuit shown in Fig. 20 Fig. 34 Circuit diagram to prevent the MOS-FET gate 9 gi potential rising EE

MITSUBISHI <Dig./Ana. INTERFACE> MS1997P,FP SWITCHING REGULATOR CONTROL The output terminal has the current sink ability even though 2 the Vcc voltage lower than the “Operation-stop” voltage or Vecsrop). (It means that the terminal is “Output low state" > I and please reter characteristics of output low voltage ver- 2 ig Vps=80V L sus sink current.) y Vosle200y \\\\i fb ORAIN This characteristics has the merit not to damage the MOS- = | | Vor=3200 WY i FET at the stop of operation when the Vcc voltage de- & 10} +4 of 4 wot creases lower than the voltage of Vccistop’, aS the gate 8 EaREy, be aS charge of MOS-FET, which shows the capacitive load char- s a om me ies : acteristics to the output terminal, is drawn out rapidly B 5 | i orn oa The output terminal has the draw-out ability above the Voc & |'/ \\ | baa | sounce voltage of 2V, however, lower than the 2V, it loses the abil- 3 Vie sii it ity and the output terminal potential may rise due to the o Ke ttl leakage current 2 In this case, it is recommended to connect the resistor of TOTAL STORED GATE CHARGE (nC) 100k between gate and source of MOS-FET as shown in Fig, 34 Fig. 35 The relation between applied gate-source voltage and stored gate charge (2)MOS-FET gate drive power dissipation Fig. 35 shows the relation between the applied gate vol- tage and the stored gate charge 1) To attach the heatsink to type M51997 in the region (D, the charge is mainly stored at gs as the (2) To use the printed circuit board with the good ther- depletion is spread and Coo is small owing to the off-state mal conductivity of MOS-FET and the high drain votage. 3) To use the buffer circuit shown next section In the region 2), the Cgp is multiplied by the “mirror effect" as the characteristics of MOS-FET transfers from off-state _‘(9) Output butfer circuit to on-state It is recommended to use the output buffer circuit as shown In the region @, both the Cop and Cos affect to the charac- i" Fig: 36, when type M51997 drives the large capacitive teristics as the MOS-FET is on-state and the drain voltage [084 0F Bipolar transistor is tow The charging and discharging current caused by this gate i charge makes the gate power dissipation. The relation be- J tween gate drive current ip and total gate charge Qgsn is v shown by following equation; M51997 = 'b=Qosx * fosc ee cee Where . teen i switching frequency Fig. 36 Output butfer circuit diagram As the gate drive current may reach up to several tenths = DET milliampere at 500kHz operation, depending on the size of —_Fig. 37 shows how to use the DET circuit for the voltage MOS-FET, the power dissipation caused by the gate cur- —_detector and error amplifier. rent can not be neglected For the phase shift compensation, it is recommended to In this case, following action will be considered to avoid connected the CR network between DET terminal and F/B heat up of type M51997 terminal ae ' 5-74 ELECTRIC

MITSUBISHI <Dig./Ana. INTERFACE> MS1997P,FP SWITCHING REGULATOR CONTROL A pulse width narrow only for a few pulse at the start of op- 6 CG FA getectina eration 0.1F is recommended for the C. ~~ | Ry Fre J M F/B 51997 C, Ro MS1997 DET toon ’ TO PHOTO c <te COUPLER co, 23 A, Lo---- Fig. 39 How to get the narrow pulse width during the start of operation Fig. 37 How to use the DET circult for the voltage detector How to synchronize with external circuit ‘Type M51997 has no function to synchronize with external Fig. 38 shows the gain-frequency characteristics between _ircuit, however, there is some application circuit for syn- point B and point C shown in Fig. 37. chronization as shown in Fig. 40 The G,,~, and 2 are given by following eugations; cece eeeecssesstrenienesosesiineneenesssee Gi= RR 10) C2 - Ra M51997

2 C Gy Ra (12) T-ON CF T-OFF

At the start of the operation, there happen to be no output c. pulse due to F/B terminal current through C, and C2, as the Fone Tae potential of F/B terminal rises sharply just after the start of 4 Q, the operation ‘SYNCHRONOUS Not to lack the output pulse, is recommended to connect PULSE the capacitor C, as shown by broken line. Please take notice that the current flows through the R; and Rz are superposed to Icc(staar)- Not to superpose, R, is connected to Cycc2 as shown in Fig. 20 gz bao} gu —= Gavoer 3? ov a (DC VOLTAGE GAIN) 3 Pa 9 35 BS 2g ov bs KK £5 WiortOr MAXIMUM PULSE WIDTH OF logo , ®” SYNCHRONOUS: SYNCHRONOUS PULSE og PULSE Fig. 38 Gain-frequency characteristics between point Fig. 40 How to synchronize with external circuit B and C shown in Fig. 37 How to get the narrow pulse width during the start of operation Fig. 39 shows how to get the narrow pulse width during the start of the operation. If the pulse train of forcedly narrowed pulse-width continues too long, the misstart of operation may happen, so it is recommended to make the output MITSUBISHI oe ies 5-75

MITSUBISHI <Dig./Ana. INTERFACE> M51997P,FP SWITCHING REGULATOR CONTROL oe — I 3| vy © COLLECTOR ee Veo Vour M51997 Oo (-2v~-5v) Za fo) fe) Fig. 41 Driver circuit diagram (1) for bipolar transistor Driver circuit for bipolar transistor dependency of forward voltage of pn junction, and IC pack- When the bipolar transistor is used instead of MOS-FET, age temperature is measured by “thermo-viewer", and also the base current of bipolar transistor must be sinked by the _ the IC is mounted on the “phenol-base” PC board in normal negative base voltage source for the switching-otf duration, atmosphere in order to make the switching speed of bipolar transistor So it is concluded that the maximum case temperature fast one. (surface temperature of IC) rating is 120°C with adequate In this case, over current can not be detected by detecting margin. resistor in series to bipolar transistor, so it is recommended to use the CT(current transformer). For the low current rating transistor, type M51997 can drive it directly as shown in Fig. 42. COLLECTOR Vee Vour BIPOLAR M51997 TRANSISTOR Ni EMITTER Fig. 42 Driver circuit diagram (2) for small bipolar transistor Attention for heat generation The maximum ambient temperature of type M51997 is + 85°C, however, the ambient temperature in vicinity of the IC is not unitorm and varies place by place, as the amount of power dissipation is tearly large and the power dissipation is generated locally in the switching regulator. So it is one of the good idea to check the IC package temperature. The temperature difference between IC junc- tion and the surface of IC package is 15°C or less, when the IC junction temperature is measured by temperature ee 5—76 z ELECTRIC

Product Information

M51997P specifications and overview.

Summary

SWITCHING REGULATOR CONTROL?

Description

SWITCHING REGULATOR CONTROL?

Source title M51997P Datasheet(PDF) - Mitsubishi Electric Semiconductor

Related Parts

More parts from the same family.

Browse manufacturer