M50436

M50436 MITSUBISHI | Alldatasheet

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eR RT ME ERLE te fees So os ie: MITSUBISHI MICROCOMPUTERS . fe0"*. SINGLE-CHIP 4-BIT,. CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER . or re vob Fee wy Poses 2. with ON-SCREEN DISPLAY CONTROLLER PIN DESCRIPTION ~ . ~ : Input ° ‘Supply voltage Power supply Inputs SV109% 10 Veo, and OV to Vag. OSC IN Input for.” Those are 1/0 pins af internal clock ascliating circult. Depending on the Hysteresis ‘osclliating ¢ircult reference signal, connect elther a quartz crystal resgnator (4MH2) and characteristiog: apacitore to these pins. exlats OSC OUT | Outpurter . . CMOS output escillating cteeuit “~ KomKs || Por kK | Output | This pore outputs data trom the register A. 4m N-ehgnnel | open-drain high-voltage : output (12v) Ho~Hy Port H Outout | DThis port outputs data from the registar A, : Nechannet : cpen-drain ! @this port can be connected to LED dlreeuy, high-voltage: output (12V) Mo*-Ms Port M Output | This port outputs data from the lower 3 bits of tne register A, “HT Nechannal, open-drain high-voltage output (12) Exlamal applied signar's level is read into the register A, Built-In pull-up resister (eptien} GorGs | oui | This port ourputs data trom te ragister A, Bullt-In pull-up resistor [tout | External apslied signar’s level is read Into the register A. (option) resistor . @External applied signal's iovel is read Into the reglater A, (option) QLy can be used as an Input pin tor he HS counter. vo @Extemal applied signers level Is read Into the carry tag. Comparative This pin Is comparative voltage input for ihe debit A-D converter. vattage input

“REE EEG aR TA ag ENT RRR OS oe al A “+ **\\MITSUBISHI MICROCOMPUTERS eas “SINGLE-CHIP 4.BIT CMOS MICROCOMPUTER for ‘VOLTAGE SYNTHESIZER ne we ‘ oe with ON-SCREEN DISPLAY CONTROLLER RESET Reset ingot | Input | Ifa “L" (OV) Input is applied, the reset stale Is entared. If the input 18 Builtein pulup , change from “L" to “H". the Internal reset continues fer at least 3 machine resistor “ . eycles, For normal use, apply a “H" input, Algo, when the power Is Initally (option) . and 7 . | applied, an external elreuit ig required for reset . bysterosls | : characterlstles : . existe 14-bil PM According to tha 14-dit digital information, the PWM signal Is output. | The —outpul | CMOS output ouput Tha repeated trequency Is 122Hz, and the minimum puiza width is SO0ns. | state Ie unge- ‘And, the Input polanty ean be changed by selecting the option - ined until’ ne - data ts input @This pin can be used as an 1-bit ulput por. Into D-A latch. VDP, . | 7-it PWM output WaAccording to the 7-bil latched data, he PYM signal (which has 85 | VDPs Is aot ac- | N-channel VoP, levels) are outpul. The frequency Is 1kHz, and ihe ‘minimum pulse wietn | tive state, the | open-drain VDP, 's 1618, And, the Input rolarity can be changed by selecting the cption, | olher state is | high-voltage undeninad until | evtput (12V) @his pin ean be used as 1-blt output port. o the data Is In- put Into D-A later, | INT. Interrupt Input Input | This pin used wheh an external interrupt fs spplied to the CPU. Built-in pull-up } “| resistor (option) Hsyne Horizontal syns | Input | This 1s the horizontal synchronizing signal input pin fat TV applications, chronizing signal The input polarity can be changed by selecting an option, Input tor display Vsyne Vertical synenro- | Input | This Is te vertical synchronizing signal Input pin tor TV applications. niging signat Input ‘The input polarity can be changed by selecting an option, for display oset Oselllater Input Input | A display clock can be obtained by connecting a varisble ‘resistor for display (described later) and a capaciter, ot both 4 coil and capacitors, between naga pine. osc2 Osclitator output CMOS cutput | ter display 7, G, B output These pins control the color display data. : Not an active ‘The output polarity can be changed by selecting an option, state, ouT OUT ourput ‘This Is 4 logical OR output for tha A.G.8 pins. Not an active | CMOS output ‘The output polarity can be changad by $6lécting an option, | state,

ee RAR, Bi Meee ot MITSUBISHI MICROCOMPUTERS | ARMIES BEY! . M50436-XXXSP Arc © SINGLE-CHIP -4-BIT.CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER tee en See ES 2 gs es. with ON-SCREEN DISPLAY CONTROLLER BASIC -FUNCTION BLCOKS for the most significant bit of address M (0,3)) are 14-BIT PWM OUTPUT . _. .\\ transfered to the D-A latch by the DATA Instruction. (1) D-A port . According to the lower 14-bit’ digital information, the The 14-bit PWM output port (D-A) outputs the pulse pulse width modulated signals: are- output from the D-A . width modulated (PWM) signals. It can also be used as port, By performing D-A conversion on these output, a tuning-voltage output port, - rectangle waves (via the integration circuit), a tuning 4 As shown in Figure 1, the D-A port has @ 14-bit D-A voltage can be generated. . ’ . latch and a 15-bit D-A latch. Altogether, the 15-blts of And, the B-A port can be used as a 1-bit output by data (addresses M(0,0), M(0,1), M(0,2), and except controlling the upper 1-bit. we hy . fad [Qos es foal faa] om fase] —TPse] cn sel [ese instruction ess] TT TT TT TTT TTT pst] oss eae cee BA Fig.l RAM, D-A lacth, 14-bit PWM, and D-A port (2) B-A port output signals Table 1. Relationship between the Lower 6-bit Data The periodic interval (To, about 122 Hz) can be divided and Tm into 2 minimum pulse widths (t, 600ns) , and the pulse. width can be modulated by that tg unit devending [| agooo0 [Nore CS on the 14-bit data 900001 [meg Also, by creating a small periodic interval (Ts, about 7.8kHz with 64Ts=To), which Is 256 times ty, pulses of m=8. 24, 40, 56 Tm (m=1~64), defined as the signal duration in 64 TOO 00 | ry 26110) a , Small intervals, is determined as follows: First, the 14- 7 - bit data is split into two parts: the lower 6 bits and the upper 8 bits. When the number designated by the low- The 64 cases from 000000 to 111111 can be expressed er 6 bits reaches 64, it is moved up one place. So Tm by the seven combinations shown in the Table 1. Also, (164) = (number indicated by upper 8 bits) X ty in by combining the upper & bits, 2" sets from the 64 small intervals. Furthermore, as many to's as are gooodd00000000 to 11111111111111 can be ex- . indieated by the lower 6 bits are added one by one in pressed. the 64 small intervals. The relationship between this If the upper & bits of the 14-bit are 00000011, and the tower 6-bit data and Tm is shown in Table 1. lowar 6 bits are 000101, (for example, Ts, Tz, Taz, Tao and Ts, =4to) and all the other Tm's become “L” dur- ing Sty. Figure 2 shows this example.

nt Oe a - MITSUBISHI MICROCOMPUTERS “i! © SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER {oF VOLTAGE SYNTHESIZER ns a - ‘ Steer Ey aae _ with ON-SCREEN DISPLAY CONTROLLER Re - A 3tfe 3h be A zis Data of the D-A latch a le Lower ee : . 00000 po . T.~Tu= 3 . xl tefe 3 fe 5 ‘te Fe otal ~ Upper 8 bits : l a n| on Too | Tso 7 00000017 b~T.—=] fete a tower ore : Omer Tm= 3h Fig.2 Output Waveform from Port D-A ° | Thus, those duration times of Tm's (of the level In each Table 2. Relationship between the 7-bit Data and the small interval) can coincide or become almost equal Output Waveform from Port VDP with at most ty difference. This periodic time of the Small interval (Ts, about 7:8kHz) approximates the re- LooogooG[None(aime) SY peated frequency, [o.oo 0008 mega After the RAM data at the specifc address is set, the output pin status will still be unstable untill the DATA Instruction is executed. 7-BIT PWM OUTPUT (1) VDP por The 7-bit PWM output port (VDP) is used to output the . pulse width modulated (PWM) signals. It can also be used as an output port for various analog data control INTERRUPT by using lowpass filter. A 7-bit analog latch is ¢on- (1) IF flag . nected brough PWM biock to the VDP Port. The lower The IF (Interrupt Flag) consists of four bits. ED1 sets 3 bits of register B and the 4-bit data of register A are the polarity of the input signal input to the INT pin. ED2 transfered to the analog latch by the VDP)~2 Instruc: selects two kinds of reference clocks that determine tlons. According to this 7-bit digital information, the the pulse interval of the input signal to the INT pin. Pulse width modulated signals (changeable to 64 EDF Is a bit Indicating the EI/DI state 4 "0" inhibits the levels) are output from the VDP: Port thus allowing var- interrupt, while a “1" allows the interrupt. The EI/DI lous analog data to be controlled. state is set by the El or DI Instruction, INTF Is a bit in- (2) Output wavaforin from the VDP port dicating the presence or absence of an external inter- According to the 7-bit analog latch data, the VOP pon rupt input. This bit Is set to "1" when an external inter- outputs pulses, whose widths have been modulated by rupt occurs. When in the EI state and an interrupt is every minimum pulse width (t) (16u5) , in every accepted, the INTF signal is cleared and set to “0”, Perlodic time interval (T) (about 1kH2 of repeated The EDF signal is automatigally set to "0". frequency). T can be divided Into 64 sets of t, An ex- The data of the lower two bits of the IF flag is moved ample of this is shown in Table 2. Thus, Pulse-width- from register A by the TIFA instruction and the IF flag modulated signals tram 0000000 to 1XXXXXX ean be is read and transferred to register A by the TAIF in- obtained, struction, . When the VDP port output needs to be changed, enter the corresponding data of the desired puise width out. ‘ Putinto register A and B. Then transter this data to the analog latch using the VDP,» instructions,

OMS Rn denep dd cut gehia a so . MITSUBISHT MICROCOMPUTERS S Ey See 1 M50436-XXXS5P - : SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER . Soa . . with ON-SCREEN DISPLAY CONTROLLER © rr ‘Table 3. Structure of IF Flag . . the EI/OI flag is “0”, the Interrupt request is disabled. [Fee [tea | Saecienn —]At this time, ‘so INTE flag is set an interrupt ts ED1 [__0 | interrupt occurs at tating edge ofiNT Bn __| accépted as soon as EI/DI flag is set to "1". (vito) [WT Tinterupt ceaue arising espe of nT pn | (3) Interrupt control clrouit | ) Oe, | op eeacl es sntertctose * The interrupt control circylt, shown In Figure §, Is com- (bit) [1 [Setar tzee etangard clock posed of the INTF/F (Interrupt flag) and El/D!I flag. | kee, |b umeetataee The Interrupt request signal (INT) described above, Is (bit2) 1 Siena eran nets Input to INTF/F. This signal acknowledge the existence ae [2 [gn eesene a aeret anes of an input. When an interrupt is accepted and jumping mateato eatcrence of imeruph request to the Interrupt processing routine is executed, the (2) Acceptance of an interrupt INTF/F is automatically reset. . Recognition of ‘an Interrupt Is made by sensing the © The logical product of outputs (from INTF/F and El/DI Pulse edge. About 68us~1281s (changeable to 1364s flag) produces an interrupt signal (INT). Once an inter- to 256us by the ED2 flag) after the signal applied to rupt is appepted, the program execution automatically the INT pin drops, the signal can be recognized as an jump to address 3, and the next program address to be interrupt. The Interrupt request signal (INT) is then executed is pushed .on the stack register. The Di state generated to set the Interrupt flag (INTF/F). Whether is then automatically set. this interrupt Is accepted or not depends upan the con- At reset, the EI/DI flag enters the DI state, INTF/F en- dition of EI/DI flag, !f the El/Dl flag Is set to “1", an in- ters the reset state, and no other interrupt can be terrupt request can be accepted, On the other hand, if accepted. — INTF wr [> INTF/F ‘ El DF RESET > S| _ Control signal Flg.3 Interrupt Control Gircult REGISTER | shorter than the standard interval (about 1.54ms), respec- Register | is a 3-bit read-only register which stores bit data tively. The other is a word decision (word-end) whieh de- and word-end data of the interrupt request signals. It also“ termines whether one word has been reached. This Is done stores the input status of the INT terminal. by comparing the pulse interval with the standard time in- The INT input circuit includes a counter which checks the terval of about 3.2ms. If using the 12848 cycle clock, both interval between interrupts. When using remote control, this the time interval described above and that described in signal can be input to the INT pin. “Interval” needs to be doubled (See Table 4). There are two sets of standard clocks to measure the INT The bit data described above is stored in bit 0 of register |. pin pulse intervals; one with a 64us cycle, and one with a If the pulse interval is shorter than the standard time inter- 1284s cycle. Those clocks can be switched using the ED2, val, this bit is set to “O". Otherwise, it is set to "1". The word Gy using one of these clocks, the following two decisions decision data is stared in bit 1 also. Bit 2 of register | stores ean be made; a bit judgement (bit data), expressed as a the input status of the INT pin. “1" of "0", indicating whether the pulse interrupt (between The entire data of register | can be read into register A by the falling or rising edges of the input signals) is longer or executing the TAI instruction. Refer to Figure 4.

Table 4. Judgment Of Bit Data, Word-end - ’ Toe, : ‘ sou dat 4MHz frequency) on ‘ 7 . an : . S|" |? [(Gamstizsus) sts ae 7 “st oo ol. Puts signals from Lo of port L and a latch which stores the tion. After that, the D-A reference voltage (Vref) is set. The counter Is first reset.and then begins counting for a transfered to the least significant bit ef register A. Set, the pulse input to Ly Is disabled.

ae 27 a a MITSUBISHI MICROCOMPUTERS Ps M50436-XXXSP SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER WITH ON-SCREEN DISPLAY CONTROLLER The D-A converter can produce 8 different reference vol- 8&BIT TIMER COUNTER tages (Vref, voltages independent of Von) depending on The 8.192ms clock is counted down with an 8-bit counter, the contents of register A. The relationship between the When the count reaches zero, the timer flip-flop (TIMF/F) analog voltage (comparative voltage) supplied to the A-D —is set and the content of the &-bit timer latch is again pin and Vref Is as follows: loaded into the counter, “4", If the comparative voltage >the reference voltage (1) Timer counter control register (EVC) "0", if the comparative voltage<the reference voltage This register is used to control the clock input to the counter. Executing the TEFA instruction causes thc Table 5, The Contents of register R and Reference lower 2 bits in register A to be transferred to EVC. Ex- Voltage (Vref) : ecution of the TAEF instruction causes that control reg- ister information to be moved back into register A. [pec | Binary, =| Vref(Vonm™5Vv) | The cotrol register operation is shown in Table 6. poo ooo av | a a a | a | a | a | a TEFA “-, °"8.192ms TAEV ‘ | {>} 1) +P —— ia o Test input 1 > a4 G-bit timer counter « |—-e4s TIM F/F . | [o 7 a} To ' Qu ! TAEF le | '

2 Timer counter control register I

Ieton Ho] tatch L { 7 | tuna 4 4 TULA : crt ™ | Fig.7 Structure of Timer Counter :

ecution of the TLLA instructlon, and into the upper 4 appropriate instructions. The clock input to the L, pin or the internal clock by 16 characters. (4) Timer flip-flop (TIMF/F) register. Table 6. Event Counter Control Register (EVC) [0 [alospayorr [= T7171 Tre serine ck oe toe teoner a oti, | If raset, all the bits of register CO are set to “0”.

a airs vous me MITSUBISHI MICROCOMPUTERS ae M50436-XXXSP SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER . . . WITH ON-SCREEN DISPLAY CONTROLLER ees (2) Character layout enable the display of a smooth chracter pattern. Refer ‘A displayed character consists of a matrix of 6X7 dots. to Figure 8. if a one-dot space is allowed between adjacent char- For kanji character display, a 12X14 dot display can acters (in the horizontal direction), one character will be enabled by specifying block 1 and block 2 of verti- be displayed from 5X7 dots, cally adjacent positions, Also, within the 57 dot matrix, is rounding feature of 4 Refer to Figure 9, X6 dots which can be shifted by half a dot. This is to : 12 dots 6 dots 6 dots 4 dots 4 dots A ots fox“ setg ns tr? Are TTT Re] TA oe A Popes | Prey | ee ee 3 ' ree TTT Sogee ee ce cee cee ft 1 Block 1 yee TTT $ i . a : a i y eRe al i |_| 4 | coe hile alc nalMlancMize | Lf | (iLL E ET PR DRT Fig.9 Character Layout tor Kanjl

ROM. Table 8 shows the displayed characters. Table 8. Display Characters e/a a designated bit data and actual output colors. ter code which corresponds to each character shown in is determined. Table 8. Figure 10 shows the structure of display sania g Color Specification Bits and Output Colors set from register A data by the TCnA (n=0~3) instrue- . tion. This is shown in Figure 11.

horizontal and vertical directions. The horizontal direc and block 2, respectively. Table 10. Upper 2 Bits of Register G and Display R &

an . MITSUBISHI MICROCOMPUTERS SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER tor VOLTAGE SYNTHESIZER WITH ON-SCREEN DISPLAY CONTROLLER OSCILLATING CIRCUIT RESET FUNCTION Since the CMOS inverter and feed-back pull-up resistor By connecting a circult to the RESET pin as shown in Fi- are bullt Into the IC, the reference signal can be obtained gure 15, & reset can be Implemented when the power is by connecting a ceramic resonator between the oscillating applied. The RESET pin contains a Schmitt circuit, there- circuit input pin and the output pin (OSC IN and OSC OUT), tore a reset is accomplished only when the voltage (Vc) of (Figure 14 shows an example of the circuit) the RESET pin exceeds the threshold voltage Vii. Once reset, a second reset can not be made until Vc falls below the threshold Voltage Vry2. Furthermore, to ensure that the reset Is made when power is applied, the time interval To IN Our ‘Ceramic resonator (whieh is the time between the power supply voltage Voo Ok CSA 4,00MG. reaching 4.5V and Vo) Vai must be less than 1 ms. Figure (made In MURATA 16 describes this. MFG. GQ., LTD) snitia. oT Tr Cy 0, =C2=300F The reset function initializes the program counter to 0. Fig.14 External Ceramic Resonator Circuit av MzZ304 A |___Yor RESET M50436-XXXSP_ i Veg _TEST Fig.15 Power-on Clear Clreult Voltage H i Te Fig.16 Relationship between the Voltage and the Auto Clear Function

woh ye ced roo MITSUBISHI MICROCOMPUTERS SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER

6 WITH ON-SCREEN DISPLAY CONTROLLER

M50436-XXXSP INSTRUCTION CODE TABLE : nore Sry 7 ¢ Pon re [uy] ..| La] aD LOMi ~| x | ue 000 ) IMP TMA | Tam RG CAL 0 o |. -s[ 0 Qo o 0 a ty |. LA | ao [aM bom] Lx | Lo 001 1 [DATA JMP | rea XAM sc CAL : 1 1 1 Aeeocees 1 1 1 ly Lom Lx | LG {SNEA MutT JMP TMAX| TAMX|TAGM) CMG CAL 2 | 2 2 2 2 uy LA AD Lomi ux uc SEA oon 3) |NMUT| JMP TMAY|TAMY! ODA | ICD CAL { 3 a 3 3 3 a 3 sz¢ ly ws VDP Lei ix |"Lo [SNEAT SEA

0100 INX | RAR Ar CAL |

ISNZBO| 4 4 o 4 4 4 4 4 snzc| sB | LY La vor Lomi tx | Le [Suga ciot 5 JMP Iny | RAL RTI CAL | | szpo| 1 5 5 1 5 5 5 5 3B | LY LA voP LOMI ux { Le [sneal sea SEV IMP PHXY| TAI ATS | CAL 2 6 6 2 6 6 6 6 G sea] uy La | AD *The tem ux | Le |SNeA] SEA ont 7 |SNEV | wMP PLXY | CMA | second] SKIP CAL i a Zz z 7 word 7 717 717 ty TA | AD LOMI Lx | LC /SNEA] SEA JMP TYA | TAY |TGCA;TOMAl CAL 6 cl] a 8 a | 8 8 é SZB | LY LA LCMI Lx | LC [SNEA, SEA rota IMP TXA | Tax | TaG | TOA CAL i 1 9 9 9 9 9 9 E) $z6 | LY La] AD fl LoMt Ux | Lo” [SNEAT SEA

1010 TC2A wMP Tea | Taw | TAZ |; TZA CAL

2 A ALA A a lala A

1101 OKA IMP OGA| IAg | ame | TV2A CAL

1 o D o =) o o SN26| LY LA AD i] LOMI SNEA OLA wMP OHa | TAHS |SNEAM TVSA | cal

2 E i i E i

3 F FE F fia F F F

[£71 2-word instruetion . BRA 3-word instruction

‘SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER WITH ON-SCREEN DISPLAY CONTROLLER Ce EEEEEF ReEEEEEEEE %, 6, "805 "ee, 1 , Q Sef [ef aT [es | fey Po Pade Ts Taped [| SU] OR: a Foe t = LEER SS —| (= aay — agg : 20+] ':0 | : big n ishing } i SU" ),0R,:| ANO Pnses eae Pr ee i EOKAnceeico Ge Oe OR | AND i Fe aay Sane DHHACCo Oe oe 4 | 4 eepebsnry aaa Ss TAEF | TEFA o110 6 SPER Kec Eater f -j 6 | 6 Ae Eo nandeapel | su | on Bain het ie ee alpe ca DHA OoRI Be oo EOKnACEeI Bee Seo +0 AND | ae Ro ! 1001 ° TAGI 1001 9 ee tesa 7! oR | AND akvod {sated t A TACa Sie] Cael -4| On ETE ct i H gee Gee su | OR | AND rm ae KoA I c TACML| c muped eal -} 101 ”ACMH no es Cale] — -| D area pac | pve Pe SPE Te | ve |e gel — | - Fe | E ys 1 4 ’ | su A os ww F 4 -

Rae A Nebr! a re oss fy arity nged otras ST ELS BOSS SU BISHI MICROCOMPUTERS BOSS he dw ‘ M50436-XXXSP SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER i ‘ . . with ON-SCREEN DISPLAY CONTROLLER — eee SYMBOLS The following notation are used for the following descriptions. ‘ coe . . [__Symbot [Contents Synbat tang A Register AC4 bite) INTE Interrupt enable flag BO - | Register B(4 bits) ot INTE interrupt fequest flip-flop c Register C(4 bits) EoD EDAD fig cc Register CC(4 bits) ELL The lower 4 bits of event laich . CO Coler ragister(3 bits) * ELH ‘The upper 4 bits of event latch co, ‘Color ragistar( 3 bits) Evc Event counter control register CO, Color ragister(3 bits) EVE Event flip-flop CO, Color ragister(3 bils) MUTF Mute flag 1 Register (3 bits) A Sys AND . R Register AC bits) Vv uj OR O-aL DA fatch(14 bits) M(DP) RAM address which le specified by data pointer x Register X(4 bits) * Yo: Register ¥(4 pits) - Direction In which data ig transferred Zz Register 2(4 bits) () The contenta cf register, memory, etc. Zz Raglster 22(2 bits) x ‘bit binary variable DP Data pointar (8 bits) Ang bit binary variable (consisting of the registers X and Y) inio 2-bit binary vatabie PC Program eeurter( 13 bits) XaXoX1Xo Cit binary variable 8K | Slack register(13 bits) Yaye¥iYo 4-bit inary variagle: SKX Slack registor X(4 bits) : Nghgh Ne 4-bit binary vatable SKY Slack register ¥(4 bits) . cy Carry flag(1 bit) a Label to show the address of D | Port O(1 bit) : ns 940 89 Aa By Be Bs a4 99 3 By Be Ee Pont E(¢ bits) - Negation or condition of the flag Is not change after the F Port F(4 bits) Insirucilon fa executed fc) "| Part G4 bits) H Port H(4 oits) d Fort J(4 gits) K Por K(4 bils) L Port L(4 blis) : M. Port M(3 bis) Note 1: The M50498-XxXSP performs a skip By ignoring the next instruction, and by not executing the instruction at tha address pointed to by the cone tents of the program counter + 2, Therefore, the cycle number does not change. regardless of whether a skip i$ generated or not.

GARE 2 SH OIG RE METRE OM as is 2 MITSUBISHI MICROCOMPUTERS I 2S Re BREET oo So 5 O4BE-XXXSP fissois “SINGLE-CHIP 4.BIT'CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER SIAMESE SC LSB Ey YLT gE ay a with ON-SCREEN DISPLAY CONTROLLER rr" OO — ’ MACHINE INSTRUCTIONS . ; . % TAB OT torr Oo 1 Of 7 A Ft 1 | Kaye) . TBA ; 0 1 1 o 1 ° 1 o 6 A 1 1} (B)—(A) Tac 1 0 0 0 1 60 0 1] 8 9/1] 1 | Abo) : TCA 1 0 0 1 1°00 1] 9° 8% 1) 1] cerca) TAX oO ’otot t-0 9 1) 7 9) 1 phy (Ay OK) | 8 lx o 1 1 0 1 6 0 +) 6 go |lrj}4 jens & (Tay Oo 1 1 1 1 0 GO oO] 7+ & {tft ! Carey) ; TYA o 1 1 0 1:0 0 OO] € e/a |onmen °

3 TAR 1 0 0 0 GO 4 TT) 8 7 | 2] 2 | (Aa, As, Ay, Ap)*-(0, Fea, Pa, Ra)

Hy | TRA 1 0 0 BD OB 4 1 1} &@ 9 Ja} 2 | Cre Fa, Rpd=CAp, Ay, Ao) 2 od 10 0 0 0 0 ola oo TACM 19 0 G0 0 9 1 0} B 2 | 2) 2} (Ag As As, Ac)-(0, 0, A/D, COMP) . 6 0 0 09 6 9 9 a] o o TAHS Oo to oroprovo tot oo} 7 E | 1] 1 | Ca)—(Hs) TAL Oo Totoro vp oo} 7 6 | t 1 | (Ag. Az Ar, Aod==(0, INT, BIT, GP) TAIF 9 ro rotor 6 1 if 7 Bia | 1 | (Aa, Aa, Ar, Ap) *-CINTF, EDF, EDs, EDe) . TIFA Oo 1 F Ot O 4 4 6 B11 | (EDs, ED9)—(A;, Ag) LX x 1 1 0 0 xe me x me} © x 11) 1 | Ome, where x0 ~18 Lyy © 0 1 0 ys ye vw yo) 2 vy ltl i | (yey, where yao ~t5 E a = [Len 11 0 1 ms mom mi Don | 1} 1 | (een, where n= 0 ~15 2 iny o 1 1 0 0 1 © 1] 6 S11 | Or) 1 “ INX Oo 1 1 0 O 1 86 a] 6 APU ET | Oe Ox)+ 1 PHXY oO 1 1°90 0 1 1 O} 6 6 | ti) 1 | (sKy)-(x), (KWo) PLXY ot 1 0 0.4 4 a] 6? 7 1 ]1) GOmtsKx), (sk)

ARSTRGNSREOR CRIES 0 0 MITSUBISHI MICROCOMPUTERS _, cpt. s« > SINGLE-CHIP 4-BIT.CMOS MICROCOMPUTER for VOLTAGE .SYNTHESIZER | Weitere caattea fe %... With ON-SCREEN DISPLAY CONTROLLER iT D . ‘The contents of register & ara transferred to roglster A. . ‘The contents of register A are transferred lo regiaterB. . ‘The contents of register C ate transterrad to register A, ‘The contents of register A are transterred to register C. “+s, ‘The contents of register X are tranatarrad to register A. ™ Me ‘The contents of ragisier A are transferred to ragister X. ‘The contents of ragister ¥ era transtarrad to register A, - ‘The contents of registar A are \\ransferred to raglater Y. . ‘a contents of ragister Ave Hanetarrd to replete A ‘The centents of ragister A are transtarrad to register A. Tha resut of eomparison (COMP) and Ihe value of A-D pin (A/D) are tranaterrad to register A. The contonts of HS counter are transferred tc regisicr A, The result of Judging Interrupt are transterred to register A. The contents of IF flag are transferred lo register A ‘The contents af regisier A are transferred to IF flag. eontinuous description The Immadiate field value 4 Is loaded into register X. I a continuous description of LX instructions are written and ere being executed, only tho first LX inatruction ig executed. tha following LX instructions are ail skipped. continuous deseription ‘The immediate leld value y is loaded into ragister ¥, ‘ if a continugus description of L¥ Instructions are wrliten and ara being executed, only the {Irst LY Instruction is oxecuted, the following LY instructions are all skipped. continuous deseription ‘The immediate fleld value n is loaded into register C. It a continuous desédptian of LC Instrvetions are written and are being executed, only the first LG instruction Is executed, the following LC Instructions are all skipped. - ‘Tha contents of register X are Incromentad by 1. . - ‘The contents ct register ¥ are incremented by 1. As a rasult If the éantants of register Y are “O", the next Instrucilon is skipped. - ‘The contents of data pointer (register X and rogister Y) are transferred lo stack X and stack Y. - ‘The contents of slack X and stack Y are transferred (9 data poinler.

Ws “SES PTI Sea ee ang yc 2 arena a) MITSUBISHI MICROCOMPUTERS co Sig So aban aadietiake ; -.M50436-XXXSP obo SINGLEICHIP 4-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER EIS AUE TELA tg $Bed Got eal atte with ON-SCREEN DISPLAY CONTROLLER . i Ingtruetion code i Kd / . BL |zs q Mnemonic 28/25 Furetlons Evie Dr By Dy Dy Ds De DD} Heradecimal |S 3/EE TAM o 11 41 0 0 ao oo] 7 O 77] 1 | (A)(uM(oP)) TAMX }o tT Fer oO o 4 of > Bb ]ada (B)=(M(DP)), (D(X) 1 3) TAMY Cor Vt oo 1 4} 7 93 fa] a fae CMcor), Ory —cy)+1 i ; ‘ * mary ; | 5 : 3 lta 9 rte eo 0 0) 6 0 LT | eMcory—ca | =° % @ |TMAX o 1 1 0 © 0 1 Of @ 2 11) 1 | (M(pe)=(a), 00-0041 TXAY Oo 1 1 0 0 0 1 1) 6 3 FT 1 | MCORP) —(A), (Y)—-O¥) 1 XAM oO re tr 0 0 oO Tf 7-4 batt | CAvemtneoe)) AM 1 0°00 0 1 4 6 of] 6 ©} 1) 1 | (Al-(A)+(M(OP)), (CY) cary AMG 1 0 O© 0 1 4 0 1] a8 D1] 1 | (A=(A)-+(m(DP)) +(CyY), (CY) carry oo 1 1 0 01 of 3 2 suma $9 9 9 or 4 FFB 7 | ale] (A=(a—CM(OP))—(Dorrew) 9 9 1 1 0 0 1 1} 3 3 (CY) borrow FANDM poo 9 9 9 4 to 1) 8 7 le) 2) Caecaracmcor)) oo 4 to 1 0 ala 8 » | ORM yoo 09 9 9 4 1 Gl e 7 [2 | 2) (A)—(Al Vv (M(De)) 5 o 0 4 1 0 4 9 0] 3 4 £ fuan Ot 9 0 ns Me my mo] 4 9 141 | (Aden, where nos & | ry E jaon 0 1 0 1 my me om re} Son ft 11 | CAlmCA}en, where n=0~15, z (CY) —carry AND n T 9 G@ 0 80 1 1 G/e 7 | 2{ 2) (A)—(A)A n, where n=0~15, 0 0 1 0 m mm ml) 2 « | OR n 3.8 8 8 ot to 4) a 7 Jala) CarHtady ny where n=om18 O° 0 6 toms mp om ml ion i sun 9 8 8 § Pt 1 af sg 7 2) 2] (A al—m where n=o~18, 0 0 0 O ny mm ml 0 oA (ev)—borew cMA 8 4 1 1 0 4 1 4) 97 7 [111 | (Ay (A) RAL oO roYo too 41 0 1) 7 BS tad CHARA A } Tashan} Rar oO rotot 0 1 0 of 7 4 fat . sc 1 0 0 1 0 9 o 1} g TP ay t | (eypet RC 1 0 9 1 9 0 0 oj g 9 It} 4 | eveo

A BOOS Bh MERLE TU TES: POE TERED SEE, rr MITSUBIS HI MICROCOMPUTERS nme Rogeh ese , “'M50436-XXXSP Wop fe SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER BEd peek teed glk ake 0 Po it els with ON-SCREEN DISPLAY CONTROLLER i Skip conditions | oa Datalled description see The contents of M(DP) ara transtarrad to register A. % . The contents of M(DP) are \\ranslerred ta register A, and the contonts of register X are incremented by 1. , : The contents of register A ara transterrad 10 M(DP). a ‘ana Ife contenta of register ¥ ave ineramatented by 1, and tho resuit Is “0", then the next instruction ls sklpped! 4 . ‘The contents of register A are transterrad to M(DP), te ‘The contents of ragister A are tranglerrad ta M(DP), and the contents of register X are incremented by 1. ‘The contents of register A are transterred to M(DP). ‘And if the contents of register ¥ are ineremetented by 1 and tha rocult Is “0", then the next instruction Is sklopod. The contents of M(DP) ave exchanged wilh register A, — | Te contents ot M(DP) are added t6 registar A, and the resull Is stored into reglater A and In the carry fag CY. — | me contents of M(DP) and carry Itag CY are added to register A and ine regult Is stored into register A and Into carcy flag cy. — | me contents of M(DP) ave subtract Irom ragister A, and the result is stored into register A and in tha carry flag GY. — | me contents ot M(DA) and borrow are subtract from register A. and the result 1s stored Into register A and in the carry tlag cy. = | A logical AND is pertormad between the contents of register A and the contests of M(DP), and the result is stored Into reaistor A. = | Alogical OR is performed between the contents of register A and tha contents of M(DP), and the result 's stored into rege later A. ‘The immadiate tleld value n is loaded into cagiatar A Wa continuous description of LA instructions are written and being execuled. only the first LA instruction Ia executed, tha following LA instructions are all skipped. — | The immadiais feta value a is adaed 10 register A, and the result I stored into register A and In the carry fag CY. — | A togical AND Is porfermad between the contents ef regleter A and the Immediate field value n, and the result Is stored Into register A. . : — | Alogical OF is partormed between the contents of raglster A and the Immediate flald value n, and the result is stered Into register A —_ | The immediate field value nls subWract tram ragiator A, and the roxult it eterad Into register A and in the carry flag CY. — | The one's complement of ragister A's contents are storad Into register A. ‘Ag. | The register A, Including carry flag CY, is rotated 1 bit 16 ma lett Ay | The register A, including carry Nag CY, is rotated 1 bit to ihe right, 1 | the carry tiag CY 6 cet (1) 0 | The carry flag GY Is reset (0) ,

GASLUSI EDR ARISH AM ay. 0 000) ont cAMITSUBLSH MICROCOMPUTERS, | Noah's. ¢0SINGLE-CHIP 4.BIT, CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER. Agee 2 aah Soh a kl 1" with ON-SCREEN DISPLAY CONTROLLER Hi : . Hexadeotmal |5 515 5 | omc 1 0 0 171 0 0 1 Of-g 2 (ey)—(G¥) i eze . 1:0 0 0 O'1 0 Of oO 4 (cy)=0? @ | SNZBO : o ; ; — | swzc 0 070 © 0 1 90 1] 0°84 (orm 0? 3 $ZBO SB J 0 0.0 10 1 jy fy t 4 (M|(OP))—1, where j=0-+3 2 |RBi 0 0 0 1 0 6 fF w/t J (M\\(DP))--0, where j= 0~ 3 a © |szpy o 0 0 t 1 0b fe} 1 8 (M\\(OP))-0 2, where j=O~3 A + - i SNZB j o 0 0 1 1 1 jp jo} 4 c (Mj(OP))+—1 2, where J=O-~3 | o |SEAn 1 oT 1 T ng ne om nol F ft 1 | (A)en?, where n=0~15 | 3 SNEA n 19107 0 mom m ml Eon 1 | (Ayn? whore ne O~15 | © | seam 10 0 9 F 1 1 Of] 8 is 1 | (A) (M(DP)) ? | Te gs 7 0 O09 0 G0 0 60 1] 8 1 1 | (evon—o | Es ee 1 0 0 6 0 0 0 OF 8 o 1 | (EVDI—1 | = § : | ‘TAEV 1 0 09 O09 O9 1 1 1] 8 7 (Ag Agi Ars Aa) = (0, 0, ©, SVF) oo 1 1 06 4 7 1/3 =°7 g | TAEF 1 0 0 0 0 1 1 1] 8 7 (Aa, Aas Ar, Ao) (0, 0, EVE, EVEo) 3 oo 1 1 01 1 of 3 6 | Ey TEFA 10 0 0 0 1 1 1) 8 7 (EVGF, EVCy, EVE9)—(Az, Ar. Ao) 2 9 1 0 0 O 4 4 OQ] 4 6 = | Tua 2. 0 0 0 0 1 1 7/8 7 (ELL)—(a) 8 o 1 6 606 09 1°60 8} 4 4

5 TLHA 1 0 0 O09 O9 1 1 1) 8 z (BLM) —=(A)

5 0 1 0 0 0 1 0 1) 4 5 = | sev 0 0 0 0 6 1 1 oO} oO 6 (EVE)=1 i SNEV 0 0 0 0 6 1 1 1] 6 7 (EVE) 0?

ABARAT FER ERE Dt eS A APESUBISHE MICROCOMPUTERS BR AS EE Ge RUN He Ee sos , . ae SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for VOLTAGE ‘SYNTHESIZER SPEEA? BS ISS os ee with ON-SCREEN DISPLAY. CONTROLLER TR i — (cy) - | The one's compiemant of carry flag GY's contents are storad inte cerry flag CY. (cy)=0 — | Ifthe contents of carry flag CY are “0°, thé next instuetten Io skipped. . (CY) m0 —" | Wihe contents of carry flag CY are “1”, the noxt Instruction Is skipped. ° . be ow - — _} The |+th 8K of the contents of M(OP), which Is the bil specitied by the immediate eld value J, Is set to 1. oO - — | The j-th Blt of the contents of M(DP), which Is tha bit specified by the immadiale ‘teld value |, Is reset to 0. - — | ihe [oth BI of the contents of M(OP), which Is the bit apscified by the immediate flald value J, is “0°, the next Instruction : 4s skipped. ~- — | Hrthe Ith bit of ma contents of M(DP). which is the bit specifted by the Immediate fleld valve j, Is “17, the next instruction {a skipped. (A)=n — | It the contents of register A ara equal to ine Immediate fleld value n, the next inatruction Is skipped. (A)sn — | Wthe contents ef registar A aro not equal te tha immediate flald value n, the next instruction Is skipped. (A)=(M(DP)) — [AF ihe €éntonts of register A are aqual to the contents of M(DP), the next Instruction la skipped. | (a) #(M(DP)) = | Ifthe contents of register A are nol equal to the esntents of M(DP), the next instruction is skipped. ‘The EW/DI flag Is reset (0) to change the state in which af interrupt Is disabled. Tha EV/DI Mag it set (1) te change ine state In which an Interrupt is enabled, 7 — | The contenis of vent flip-fle are transtarred to register A and ihe filp-flen is reset (0), - — _| The contonts of event control register ara transterred to the lower 2 bits of register A. ~ — | The lowor 3 bits of register A ara transferred to ine avent central register, ~- — | The contents of register A are transforred to tha lower 4 bits of event igich, ~ — | The contents of register A are transterred to the upper & bits af event latch, (EVF)=1 | ifthe contents of event filp-tlop are "7", tha next Instruction Ig skipped and the flip-top ts reset (0). | . (EVF)=0 — | Ihine contents of event iip-Mep ara "0", ine next Instruction is skipped and the fllp-Hlop Is reset (0).

HORA SRAGO SANE RNa BE 06 of Soe obs “MITSUBISHI MICROCOMPUTERS co ES Deed GREG LP ES ae MS0436-XXXSP Anne B/* SINGLE-CHIP. 4-BIT-CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER OL hte etd oe ree ae with ON-SCREEN DISPLAY CONTROLLER rr — re — — : . Ingtruction cede 3 fs . ‘ Mnomonic - mal Be 3 . + Funetlons 1 ODA 1 0 0 0 ovo 1 t/a af 1] 1 | (DCA) . OFA ° 1 1 0 T 1 o 0 6 c 1 1 | (F)—(A) ! oGa TO 4 T 0 4 9 0 Gf 6 -o Ii} 4] fayeca i 4 ona OY 4 oO tet to) 6 OES a fa | Head | B | ova 0 0 0 0 1 1 0 | a 6 | ths} cea | 5 | oKA o 0 0 0 1 1 O 1} 9 BD Yt} 1 | (K)=(a) ! ES 6 | OLA 000 0171 1 oo e yr fr} aa) | 3 OMA | OT tO 1 tot tt 6 F fata | (My—tAg, An Ae? | IAG or tort 4 0 tf 7) ofr} a} tara | “HAL O Tort to 4 4 af 7 Foy.) 1 | (Abe(L) | Ico 10 9 1 0 0 1 4) 9 3 falytcenqcoy 1 a |VOP a 1 0 0 © G0 1 m my} 8 i 1] 7 | (VOPn)—(i2, B1, By, Aa, Az, As. Ag) | £2 A where n= O—-2 | 38 : & 8 | pata 0 © 0 0 0 © 6 if a 4 4] 1] (om LIHCrAC0, 3)>MC0, 0)) < § | mur o 0 9 9 6 9 41 Of oO 2} 4) 4] (MUTE j 8 | mur 9 09 0 0 9 6 1 1] 0 3 44) 1) (MuTEy—o UMP a 0 O T 1 ag a a a] 3 8 12/2 | (PC)-ay,~a9 8 a Aas 8 83 a2 ay ag a a CAL a 1 0 1 1 ay a a | B 2 | 2! 2) (sK)-(PCnext) i i en ee) a (PC) ar mag ° JMPL aa Co) 7 1 o 0 09 6 1 6 1 3] a | (PC)—ayg~ag F 0 0 0 & a a a a] a a 2 ar % M% a 8 a ay asf a. a H CALL aa i) 1 1 t) ) 9 0 al 6 1 3) 3 | ($K)—(PCpext) hd 1 0 0 @& a a a ay! 8 a (PC) argag & By Be as 8 82 ag Ay ao| + . § a g alia $ jrt To 0 0 1 0 1 0 0} 89 4 | a] 4 | CPey—¢sKy Fy @ | aT TO 0 1 7 TO 1) 9 5 11] a | (Pe —(sK), (skIP)—(SKS) & | RTS a 1 0 0 1 0 4 4 Of 9 6 ]ti4 | (PO)—-(SK), (SKIP) = 1 | SKIP T 9 0 T O 1 1 4) 9 7 [VJ t | (skiey—t NOP 1 ° o 1 0 1 1 1 ° oO Vy. (PE)—(PC)+1

Ra ged are d arta ak klscily ager coe thee we Bote enteabn ges pa eee IR 8 Me Mt Pl atid PH eu dinta VE TE ore BETS . woe. MITSUBISHI MICROCOMPUTERS ; S08 BLN ye : . M50436-XXXSP wes, 4-2 SINGLE-CHIP 4-BIT CMOS, MICROCOMPUTER for VOLTAGE: SYNTHESIZER . . : BOs soy with ‘ON-SCREEN DISPLAY CONTROLLER _S— — eSeSSsee Skip conditions = nd Datalled deserlptlon . - — | The most significant bit of reglaler A la cutput to the port D. - — | The contonts of ragister A are output (o the pert F. oe = | The contonte of register A ste output to the port G. . . _ — | The contents of raglster A are outpul tothe pet, ra, i - — | The contents of register A are cutput to the port J. ay ° _ — | The contents of raglater A ara output to the pert K. . - - ‘The contents of register A are oulput lo the port L_ ~ - | Tha tower 3 bits of ragister A are ourpul to the port M. . ~ — | The input trom the port € are transterrad lo register A. - — | Tho input irom ine port G are transterred to register A, : os — | The input irom the por L are transferred to register A - = | Tho input trom the port D are transferred to carry flag CY. i} " | - —_| The 7abit 0+A date (ihe tower 3 bits of regiater 6 and reglater A) are Wansterted to VOP laten, - | 77 | The 5sbiLD-A dato (M(0,0), (0,1). (0,2), ana except lor tne upoer 1 bit of M4(G3)) are transtfered lo the O-A iatcn = | — | The MUTE flag Is aet (1). The VOP pert becomes “L” level, - =| The MUTE tag is set (0), Mute state Is cancsied. - Jump to an address which la specified by an-~ae uncenditionally. = ‘The ratuen address Ia stored ina slack ragiater, ang jump to an sddress whieh is specified by a1)~29 uncendltlonally. = Jump to an address when is specified by axz~a0 unconditionally, - ‘The return address is stored inta stack register, and jump to en addross whi¢h ig speeilleg by a1g~ap unconditionally. 7 ‘Control (a then returned from the subroutine to the routine which is called the subroutine. (sks)=1 Contra is then retumnea {rqm the interrupt handing routine fo the main routine, unconditional skip Control is men returned from the subroutine to the reutine whieh is called the subroutine, and the nex! insiruction is unean- ditionally skipped. unconditional skip ‘The next instruction is skipped after tne akip flag Is set 10 “7 - No oporation

COMBE KR agr iad -- | -*" M50436-XXXSP "= 223" SINGLE:CHIP 4-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER Bot PFA Ren YR OR Ye MT with ON-SCREEN DISPLAY CONTROLLER ——— Mnemonic Bel2s Punetions | TOCA 1 9 9 0 1 0 0 of] 8 8 lift] (edy—cay . ‘|taz 10 0 0 1 6 1 Of'e@ Aly 4} tareez) | TZa 1 0 O°? 7 6 1 0) 8 wf add} ez—cay TAZZ V0 O° 0 1 0 T tT) gs By, 1, V | 1 | (Aa. Aa An Aa, (0, 0, 221, 2Z5) T2ZA 10 0 tT 1 0 4 th 9 va} JL] (22x. ZZ0)—CAn, Ao) ‘| TCna 0.0 0 0 1 0 0 of] 6 3 | 1 | 1} (One, Gry, Gng)—(Az, Ay, Ao) oA where n=0~3 TAG n } H 9 9 ° } 1 A H 7 2} 2 | CAs, Az Ar, Ao)*(0, Cra, Cry, Cro) + where n= Q~ 3 TvnA oa 0 1 1 To m my] 9 é T | 1 | ($21, SZ, Vig, Ving, Vag, Ving, Yrs, ng) . a w(Gg, Ca, Cr, Co. Ag. Ar. Ay, Ao) : m=(n—1), where n= O~2 i THRA Yoo 0 1 1 tT 1 1] 9 F]tf4 | cos, Ha, Ha, He, Hy, Ho) A or(Gr, Co, Aa. Aa, Ans Ao) 2 |romn 10 1 0 mg me my mo} A n/t] d | CoM(2z 2))—Cc). n, 8 | @—@41 z TOMAL 1 0 9 1 4 9 80 Of g B | 1] t | (om(z2z,.2))—(6) (A), a | (a—(z)41 TACML 1 0 0 9 8 1 1 1] 8 7 | 2) 2 | (A)—(OM(2zZ, Z))3s~0 oo 1 1 1 1 0 Of 3 6 ‘TACMH t+ 0 09 0 o +t 4 a} eae o7)}2 | 2 | (A COM(Z2, 2) re oo 1 1 1 4 0 1/3 D | |

MAG TAREE IG TRAE ee ) {.?ac.MITSUBISHE MICROCOMPUTERS. SEY ESO OS A eos »>M50436-XXXSP evpaaiy ov SINGLE,CHIP 4-BIT CMOS -MICROCOMPUTER for. VOLTAGE ‘SYNTHESIZER i es Ce ee me gas with ON-SCREEN DISPLAY CONTROLLER [= |e an _ tag 4 - — | The contents of roglater A are transferred to regiatar CC. - — | The contents of pointer teaister Z for CRTAAM are transferred to register A. - — | The contents of register A are transtarred to tha painter registet Z tor CATRAM. - ~_| The contents of setactor register ZZ tor CRTRAM are transfered to ragistar A . - — | The contenta of resistor A are transtarred to the selector ragleter'ZZ for CRTRAM, . am - — | The contents of register A are transterred to the coler reglster Gn, =~ | _ i ‘The contents of celar register Cn are transferred to register A. | . ~ — | The contents of rugister A and register C are transferred to the character size segister SZn and the vertical location regis ter Vn. ~ - The conlante ol ihe lewar 2 bitt Of register C and register A are transfertad lo regiatar HR. - _ After the Immediate fletd value n and the contents of register C are transterred to m(Z). the contents of register Z. are in- eremented by 1 - — | Tha contanls of registers A and © are transtorred (o M(Z), the contents of register Z are Inerementad by 1. - — | The lower 4 bits of CRTRAM are transterred to ragisier A. ~ — | Tha upper 4 bits of CRTAAM are transferred to raglster A.

sr re : MITSUBISHI MICROCOMPUTERS We . M50436-XXXSP . SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER mo. : . . . WITH ON-SCREEN DISPLAY CONTROLLER or ABSOLUTE MAXIMUM RATINGS (1,=25°, except the timits of temperature) A 2 | Input voltage Ports Eq~Ey, Gy~Gz, Lo~La -0,3~ 3 v “Mi HSYNG, VSYNG, INT, RESET ‘With respect to V5 1. 3~Veo tO. [vo [oupuveies Sd OE ‘Output voltage VOPo~VDP2, Ports Mar~Ms, HaHa With respect to Vie 03-13 v Kae-Ks Suiput transistors cut-off - [_Utenl [ eurrantin eeu inte mA [Pig. | Gutontin great O=2(Note 2) [ma] Gurrant In elrcutt Port Hom Ha O~10(Note3) | “mA _| | Po _| Power alsslpauien | Tope | Operating tempera TS =10~70 L Tayq | stress temperate COT Nota 1: The total amount current flowing aut of the IC must not axcaed T5mA. 2 + The total amount currant flowing into the IG must not exceed Z0mA except pon H 3} The total amount of port H current flowing into the IC must nt exceed dma. RECOMMENDED OPERATING CONDITIONS (11=—10~70¢, Voo= 5 V-+10%, unless otherwise noted) ‘Symbol Parameter Sa ee | Yoo | sueniyvotage aes | 8 es Supply voltage {of o P| “H" input voltage Ports E~Ea, D, INT, Li~Ly Vin Go~Gs, HSYNG, VSYNC: {oo | Veo | Veo v SH Input vortage Ports Lo, Li 0.8Vee Reset 0 vee | oT Vee || _ | “bY Input vontage Ports Eos, 0, INT. La~Ly | Vie Go+G;, HSYNC, VSYNC, RESET (o3Mo0 ‘LE Input voltage Porta Le Ly | 6 [To F2vec fv | Vo euoat eonent Pontes [to |e eto eure Pet Hem [tery | Clock oasiliating frequency (in CPU section)( Nate 4) [a6 | 4 | 44 [| mz | [tone | Glock oscilatig treauency (In CRT section) [4] si 6 [re | Note 4: Use a quare crystal oscillator or a caramic resonater fer the CPU oscillating circuit. ELECTRICAL CHARACTERISTICS (12=-10~70%, Voom $V+10%, thoy 4 MHz. unless eterwise noted) Von ‘Supply voltage fend [asf s | 65] Vv log Supply current Voo=5.6V fopusMHZ atalepiay ot | | (1.5 | 6 | ma Voos5.8V feaymaHz Supply current Bo eu | too | wre lear=5MHz_at display on im “HP output eutrent Pots FoF, do-Ja, DA, G, 8 our ba Von-"4.5V Von 4V mA I : “L" output current 0-A, D. Ports Mo Ms, VDPo~VOP2 =4.5V a oo FoF datrds, Kor*Ka, OUT Woo SV Voue.av [ma | “LY output current Pons @y~Gs, Le~=Ly _ Voo=4.5V_Voi=0.4V 1{[— mat ioe + evra caren 65 Se vant Te] hysteresis Ports Ly, Li Voo™5V_at using 9s coumter input a5 1 [1s VoarVr=] Hyleresis EGET ess [et is Pull-up transister Ports Lg~Lo, Eg*-Es, Go~Gy “ Re (Note 5) Voom5V Vi=0v 15 60 | xo Pull-up transistor INT, RESET Output leak current Parts Gr~Gs, Le~ ly Vo=SV_ | | 10 | aa \\ Output teak current VDP¢~VDPy, Porls My~Mz _ loz. Kar Ko Hetty Vo=l2v uA Ve Pressure-resistant output voltage Ports Mo~ My, VDPp + *+*VOP3, Ko™Ko, HoH. 12 v

Summary

SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER?

Description