M37224M3

M37224M3 MITSUBISHI | Alldatasheet

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Technical content

PIN CONFIGURATION (TOP VIEW) Outline 42P4B

DESCRIPTION

The M37224M3-XXXSP is a single-chip microcomputer designed with CMOS silicon gate technology. They are housed in a 42-pin shrink plastic molded DIP. In addition to their simple instruction sets, the ROM, RAM and I/O addresses are placed on the same memory map to enable easy pro- gramming. The M37224M3-XXXSP has a PWM output function and a OSD dis- play function, so it is useful for a channel selection system for TV.

FEATURES

• Memory size
• Minimum instruction execution time (at 8 MHz oscillation frequency, VCC =5.5V, at CRT display) SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER M37224M3-XXXSP MITSUBISHI MICROCOMPUTERS P06/INT2/A-D4 X OUT H SYNC VSYNC P00/PWM0 P01/PWM1 P02/PWM2 P03/PWM3 P04/PWM4 P05/PWM5 P07/INT1 P23/TIM3 P24/TIM2 P25 P26 P27 D-A P32 CNV SS XIN VSS RESET P52/R P53/G P54/B P55/OUT P20/SCLK P21/SOUT P22/SIN P10 P11 P12 P13 P14 P16/A-D2 P30/A-D5/DA1 P31/A-D6/DA2 OSC1/P3 3 OSC2/P3 4 VCC P17/A-D3 M37224M3-XXXSP P15/A-D1/INT3
• CRT display function (16 lines maximum) Kinds of character colors (It can be specified by the character) maximum 7 kinds (R, G, B) Kinds of raster colors (maximum 7 kinds) Display position Bordering (horizontal and vertical) APPLICATION TV

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER FUNCTIONAL BLOCK DIAGRAM of M37224M3-XXXSP OUT Clock inputClock output XIN XOUT Reset input V CC VSS CNV SS Clock output for display Input ports P33, P34 OSC1 OSC2 Clock input for display INT2 INT1 PWM5 PWM4 PWM3 PWM2 PWM1 PWM0 P5 (4) B G R HSYNC VSYNC A-D comparator 14-bit PWM circuit 8-bit PWM circuit Accumulator A (8) Timer 4 T4 (8) Timer 3 T3 (8) Timer 2 T2 (8) Timer 1 T1 (8) Timer count source selection circuit TIM2 TIM3 Instruction register (8) Instruction decoder Control signal CRT circuit Stack pointer S (8) Index register Y (8) Index register X (8) Processor status register PS (8) 8-bit arithmetic and logical unit ROM

12 K bytes

PC L (8) Program counter PC H (8) RAM 256 bytes Data bus Clock generating circuit RESET Output ports P52–P55 Output for display Address bus SI/O(8) SIN SCLK SOUT INT3 10 9 8 7 6 5 4 3 I/O port P0 28 29 30 31 32 33 34 35 P1 (8) I/O port P1 15 14 13 12 11 36 37 38 P2 (8) I/O port P2 I/O ports P30–P3 2 17 26 2716 P3 (3)P0 (8) 39 40 41 42 2 1 2019 25 22 21 18 24 23 ( ) Timing output D-A D-A converter Multi-master I C-BUS interface Synchronous signal input ROM correction function

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Number of basic instructions Instruction execution time Clock frequency Memory size Input/Output ports Serial I/O A-D comparator D-A converter PWM output circuit Timers ROM correction function Subroutine nesting Interrupt 0.5 µs (the minimum instruction execution time, at 8 MHz oscillation fre- quency)

8 MHz (maximum)

4 K bytes

8-bit 5 1 (N-channel open-drain output structure, can be used as PWM output pins, INT input pins, A-D input pin) 8-bit 5 1 (CMOS input/output structure, can be used as A-D input pins, INT input pin) 2-bit 5 1 (CMOS input/output or N-channel open-drain output structure, can be used as serial I/O pins) 6-bit 5 1 (CMOS input/output structure, can be used as serial input pin, external clock input pins) 2-bit 5 1 (CMOS input/output or N-channel open-drain output structure, can be used as A-D input pins, D-A conversion output pins) 1-bit 5 1 (N-channel open-drain output structure) 2-bit 5 1 (can be used as CRT display clock I/O pins) 4-bit 5 1 (CMOS output structure, can be used as CRT output pins) 8-bit 5 1 6 channels (6-bit resolution) 2 (7-bit resolution) 14-bit 5 1, 8-bit 5 6 8-bit timer 5 4 32 bytes 5 2 96 levels (maximum) External interrupt 5 3, Internal timer interrupt 5 4, Serial I/O interrupt 5 1, CRT interrupt 5 1, f(X IN)/4096 interrupt 5 1, VSYNC interrupt 5 1, BRK interrupt 5 1 2 built-in circuits (externally connected to a ceramic resonator or a quartz- crystal oscillator)

5 V ± 10 %

165 mW typ. (at oscillation frequency f(X IN) = 8 MHz, fCRT = 8 MHz) 110 mW typ. (at oscillation frequency f(XIN) = 8 MHz) 1.65 mW (maximum) –10 °C to 70 °C CMOS silicon gate process 42-pin shrink plastic molded DIP 20 characters 5 2 lines (maximum 16 lines by software) 12 5 16 dots 128 kinds 3 kinds Maximum 7 kinds (R, G, B); can be specified by the character 64 levels (horizontal) 5 128 levels (vertical) Parameter Functions FUNCTIONS ROM RAM CRT ROM CRT RAM 0–P17 P20, P21 P22–P27 P30, P31 P32 P33, P34 P52–P55 I/O I/O I/O I/O I/O I/O Input Output CRT ON CRT OFF In stop mode Number of display characters Dot structure Kinds of characters Kinds of character sizes Kinds of character colors Display position (horizontal, vertical) Clock generating circuit Power source voltage Power dissipation Operating temperature range Device structure Package CRT display function

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Power source CNV SS Reset input Clock input Clock output I/O port P0 PWM output External interrupt input Analog input I/O port P1 Analog input External interrupt input I/O port P2 External clock input Serial I/O synchro- nous clock input/ output Serial I/O data output Serial I/O data input I/O port P3 Analog input D-A conversion output Input port P3 Clock input for CRT display Clock output for CRT display Input Input Output I/O Output Input Input I/O Input Input I/O Input I/O Output Input I/O Input Output Input Input Output Apply voltage of 5 V ± 10 % (typical) to VCC , and 0 V to VSS . Connected to VSS . To enter the reset state, the reset input pin must be kept at a “L” for 2 µs or more (under normal VCC conditions). If more time is needed for the quartz-crystal oscillator to stabilize, this “L” condition should be maintained for the required time. This chip has an internal clock generating circuit. To control generating frequency, an external ceramic resonator or a quartz-crystal oscillator is connected between pins X IN and XOUT . If an external clock is used, the clock source should be connected to the XIN pin and the XOUT pin should be left open. Port P0 is an 8-bit I/O port with direction register allowing each I/O bit to be individually programmed as input or output. At reset, this port is set to input mode. The output structure is N-channel open-drain output. See notes at end of Table for full details of port P0 functions. Pins P00–P05 are also used as PWM output pins PWM0–PWM5 respectively. The output structure is N-channel open-drain output. Pins P06 , P07 are also used as external interrupt input pins INT2, INT1 respectively. P06 pin is also used as analog input pin A-D4. Port P1 is an 8-bit I/O port and has basically the same functions as port P0. The output structure is CMOS output. Pins P15–P17 are also used as analog input pins A-D1 to A-D3 respectively. P15 pin is also used as external interrupt input pin INT3. Port P2 is an 8-bit I/O port and has basically the same functions as port P0. The output structure is CMOS output. Pins P23, P24 are also used as external clock input pins TIM3, TIM2 respectively. P20 pin is also used as serial I/O synchronous clock input/output pin SCLK . The output structure is N-channel open-drain output. Pin P21 is also used as serial I/O data output pin SOUT . The output structure is N-channel open-drain output. Pin P22 is also used as serial I/O data input pin SIN. Ports P30–P32 are 3-bit I/O ports and have basically the same functions as port P0. Either CMOS output or N-channel open-drain output structure can be selected as the port P30 and P31. The output structure of port P32 is N-channel open-drain output. Pins P30, P31 are also used as analog input pins A-D5, A-D6 respectively. Pins P30, P31 are also used as D-A conversion output pins DA1, DA2 respectively. Ports P33, P34 are 2-bit input ports. P33 pin is also used as CRT display clock input pin OSC1. P34 pin is also used as CRT display clock output pin OSC2. The output structure is CMOS output. PIN DESCRIPTION Pin Name Functions Input/ Output VCC , VSS. CNV SS RESET XIN XOUT P00/PWM0– P05/PWM5, P06/INT2/ A-D4, P07/INT1 P10–P14, P15/A-D1/ INT3, 6/A-D2, P17/A-D3 P20/SCLK , P21/SOUT , P22/SIN, P23/TIM3, P24/TIM2, P25–P27 P30/A-D5/ DA1, 1/A-D6/ DA2, P33/OSC1, P34/OSC2

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Output port P5 CRT output H SYNC input VSYNC input DA output PIN DESCRIPTION (continued) P52/R, P53/G, P54/B, P55/OUT H SYNC VSYNC D-A Ports P52–P55 are a 4-bit output port. The output structure is CMOS output. Pins P52–P55 are also used as CRT output pins R, G, B, OUT respectively. The output structure is CMOS output. This is a horizontal synchronous signal input for CRT. This is a vertical synchronous signal input for CRT. This is a 14-bit PWM output pin. Output Output Input Input Output Note : As shown in the memory map (Figure 5), port P0 is accessed as a memory at address 00C016 of zero page. Port P0 has the port P0 direction register (address 00C116 of zero page) which can be used to program each bit as an input (“0”) or an output (“1”). The pins programmed as “1” in the direction register are output pins. When pins are programmed as “0,” they are input pins. When pins are programmed as output pins, the output data are written into the port latch and then output. When data is read from the output pins, the output pin level is not read but the data of the port latch is read. This allows a previously-output value to be read correctly even if the output LOW voltage has risen, for example, because a light emitting diode was directly driven. The input pins are float, so the values of the pins can be read. When data is written into the input pin, it is written only into the port latch, while the pin remains in the floating state. Pin Name Functions Input/ Output

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER CMOS output Ports P1, P2, P30, P31 Note: Each port is also used as follows: P15 : A-D1/INT3 P16 : A-D2 P17 : A-D3 P20 : SCLK P21 : SOUT P22 : SIN P23 : TIM3 Ports P1, P2, P30, P31 Data bus Direction register Port latch Ports P00–P05, P32 Data bus Direction register Port latch Ports P06, P07 Data bus Direction register Port latch N-channel open-drain output Ports P06, P07 Note: Each port is also used as follows: P06 : INT2/A-D4 P07 : INT1 N-channel open drain output Ports P00–P05, P32 Note: Each port is also used as follows: P00–P05 : PWM0–PWM5 P24 : TIM2 P30 : A-D5/DA1 P31 : A-D6/DA2 Fig. 1. I/O Pin Block Diagram (1)

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Schmidt input H SYNC , VSYNC CMOS output D-A, P5 2–P55 Note: Each port is also used as follows: P52 : R P53 : G P54 : B OUT : P55 Fig. 2. I/O Pin Block Diagram (2) Internal circuit D-A, P52–P5 5H SYNC , VSYNC Internal circuit

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER CPU Mode Register The CPU mode register contains the stack page selection bit. The CPU mode register is allocated at address 00FB16. FUNCTIONAL DESCRIPTION Central Processing Unit (CPU) The M37224M3-XXXSP uses the standard 740 Family instruction set. Refer to the table of 740 Family addressing modes and machine instructions or the SERIES 740 <Software> User’s Manual for de- tails on the instruction set. Machine-resident 740 family instructions are as follows: The FST, SLW instruction cannot be used. The MUL, DIV, WIT and STP instructions can be used. Fig. 3. CPU Mode Register b7b6 b5b4b3 b2b1b0 B After resetRW CPU Mode Register 0, 1 to Name Functions Processor mode bits (CM0, CM1) 0 0: Single-chip mode 0 1: 1 0: Not available 1 1: Fix these bits to “1.” 1Stack page selection bit (CM2) (See note) b1 b0 0: 0 page 1: 1 page 10 0 CPU mode register (CPUM (CM)) [Address FB16] RW RW RW Note: This bit is set to “1” after the reset release. 111

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER MEMORY Special Function Register (SFR) Area The special function register (SFR) area in the zero page contains control registers such as I/O ports and timers. RAM RAM is used for data storage and for stack area of subroutine calls and interrupts. ROM ROM is used for storing user programs as well as the interrupt vector area. RAM for Display RAM for display is used for specifying the character codes and col- ors to display. ROM for Display ROM for display is used for storing character data. Interrupt Vector Area The interrupt vector area contains reset and interrupt vectors. Zero Page The 256 bytes from addresses 000016 to 00FF16 are called the zero page area. The internal RAM and the special function registers (SFR) are allocated to this area. The zero page addressing mode can be used to specify memory and register addresses in the zero page area. Access to this area with only 2 bytes is possible in the zero page addressing mode. Special Page The 256 bytes from addresses FF0016 to FFFF16 are called the spe- cial page area. The special page addressing mode can be used to specify memory addresses in the special page area. Access to this area with only 2 bytes is possible in the special page addressing mode. ROM Correction Memory (RAM) This is used as the program area for ROM correction. 000016 00C0 16 00FF 16 013F16 06B3 16 D000 16 SFR area Not used Not used FFFF 16 FFDE 16 FF00 16 060016 Interrupt vector area Not used 1000016 10FFF 16 1FFFF 16 ROM for display (4K bytes) Special page ROM (12K bytes) RAM for display (Note) (80 bytes) Zero pageRAM (256 bytes) Note: Refer to Table 8. Contents of CRT display RAM. ROM correction memory (RAM) Block 1: addresses 02C016 to 02DF16 Block 2: addresses 02E016 to 02FF16 021716 021B 16 02C0 16 02FF 16 2 page register Not used Not used Fig. 4. Memory Map

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER n SFR Area (addresses C016 to DF16) D0 16 D1 16 D2 16 D3 16 D4 16 D5 16 D6 16 D7 16 D8 16 D9 16 DA 16 DB 16 DC 16 DD 16 DE 16 DF 16 C0 16 C1 16 C2 16 C3 16 C4 16 C5 16 C6 16 C7 16 C8 16 C9 16 CB 16 CC 16 CD 16 CE 16 CF 16 CA 16 Address Port P5 (P5) Port P5 direction register (D5) Port P3 output mode control register (P3S) DA-H register (DA-H) DA-L register (DA-L) PWM0 register (PWM0) Port P1 (P1) Port P1 direction register (D1) Port P3 (P3) Port P3 direction register (D3) Port P2 (P2) Port P2 direction register (D2) Register Port P0 (P0) Port P0 direction register (D0) PWM1 register (PWM1) PWM2 register (PWM2) PWM3 register (PWM3) PWM4 register (PWM4) PWM output control register 1 (PW) PWM output control register 2 (PN) Serial I/O mode register (SM) Serial I/O regsiter (SIO) DA1 conversion register (DA1) DA2 conversion register (DA2) P30SP31S PW0PW1PW2PW3PW4PW5PW6PW7 PN2PN3PN4 SM0SM1SM2SM3SM5SM6 0016 0016 0016 00 ???? ? ? DA1SDA2S DA10DA11DA12DA13DA14DA15 DA20DA21DA22DA23DA24DA25 DA17 DA27 0016 0016 0016 0016 0016 b7 b0 Bit allocation State immediately after reset b7 b0 : “0” immediately after reset : Undefined immediately after reset <State immediately after reset> : “1” immediately after reset : Fix this bit to “0” (do not write “1”) <Bit allocation> Function bit : No function bit : Fix this bit to “1” (do not write “0”) Name : Fig. 5. Memory Map of SFR (special function register) (1)

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER HR0HR1HR2HR3HR4HR5 CV10CV11CV12CV13CV14CV15CV16 CV20CV21CV22CV23CV24CV25CV26 CS10CS11CS20CS21 MD10MD20 CO01CO02CO03CO05 CO11CO12CO13CO15 CO21CO22CO23CO25 CO31CO32CO33CO35 CC0CC1CC2 VSYCR/G/BOUTOP5OP6OP7 HSYC CK0CK1 ADM0ADM1ADM2ADM4 ADC0ADC1ADC2ADC4 ADC3ADC5 T34M0T34M1T34M2T34M3T34M4 T12M0T12M1T12M2T12M3T12M4 CK0RE5 RE4 RE3 CM2 TM1RTM2RTM3RTM4RCRTRVSCRIT3R CK0MSR IT1RIT2RS1R TM1ETM2ETM3ETM4ECRTEVSCEIT3E IT1EIT2ES1EMSE T34M5 CK0 ????00 00 ??00 00 0 0 0016 ?00 000 00 FF16 0716 FF16 0716 00 00 ? 00 0000 00 00 0016 11 11 0016 0016 0016 0016 0016 0016 0016 0016 0016 0016 00 0 0016 FC 16 0016 0016 0016 0016 b7 b0 Bit allocation State immediately after reset b7 b0 : “0” immediately after reset : Undefined immediately after reset <State immediately after reset> : “1” immediately after reset : Fix this bit to “0” (do not write “1”) <Bit allocation> Function bit : No function bit : Fix this bit to “1” (do not write “0”) Name : F016 F116 F216 F316 F416 F516 F616 F716 F816 F916 FA 16 FB 16 FC 16 FD 16 FE 16 FF16 E016 E116 E216 E316 E416 E516 E616 E716 E816 E916 EB 16 EC 16 ED 16 EE 16 EF 16 EA 16 Address CRT control register (CO) CRT port control register (CRTP) A-D control register 1 (AD1) A-D control register 2 (AD2) Timer 1 (TM1) Vertical register 1 (CV1) Color register 0 (CO0) Color register 1 (CO1) Character size register (CS) Border selection register (MD) Register Horizontal register (HR) Vertical register 1 (CV1) Timer 2 (TM2) Timer 3 (TM3) Timer 4 (TM4) Timer 12 mode register (T12M) Timer 34 mode register (T34M) PWM5 register (PWM5) Interrupt input polarity register (RE) Test register (TEST) Interrupt request register 1 (IREQ1) Interrupt request register 2 (IREQ2) Interrupt control register 1 (ICON1) Interrupt control register 2 (ICON2) Color register 2 (CO2) Color register 3 (CO3) CRT clock selection register (CK) CPU mode register (CPUM) n SFR Area (addresses E016 to FF16) Fig. 6. Memory Map of SFR (special function register) (2)

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER 21716 21816 21916 21A16 21B16 Address Register ROM correction address 1 (high-order) n SFR Area (addresses 21716 to 21B16) ROM correction address 1 (low-order) ROM correction address 2 (high-order) ROM correction address 2 (low-order) ROM correction enable register (RCR) 00RC1RC0 0016 0016 0016 0016 ??? ?000 b7 b0 Bit allocation State immediately after reset b7 b0 : “0” immediately after reset : Undefined immediately after reset <State immediately after reset > : “1” immediately after reset : Fix this bit to “0” (do not write “1”) <Bit allocation> Function bit : No function bit : Fix this bit to “1” (do not write “0”) Name : Fig. 7. Memory Map of 2 Page Register Fig. 8. Internal State of Processor Status Register and Program Counter at Reset b7 b0 b7 b0 Register Processor status register (PS) Bit allocation State immediately after reset Program counter (PCH ) Program counter (PCL) Contents of address FFFF16 Contents of address FFFE16 : “0” immediately after reset : Undefined immediately after reset <State immediately after reset> : “1” immediately after reset : Fix this bit to “0” (do not write “1”) <Bit allocation> Function bit : No function bit : Fix this bit to “1” (do not write “0”) Name :

table because its operation is similar to an interrupt. register are automatically stored into the stack. be set to “0” and “1” by a program. Reset is treated as a non-maskable interrupt with the highest priority. Figure 9 shows interrupt control. that all bits are cleared to “0” at reset. An interrupt is generated by an overflow of timer 1, 2, 3 or 4. Table 1. Interrupt Vector Addresses and Priority

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER (5) f(XIN)/4096 interrupt This interrupt occurs regularly with a f(XIN)/4096 period. Set bit 0 of the PWM output control register 1 to “0.” (6) BRK instruction interrupt This software interrupt has the least significant priority. It does not have a corresponding interrupt enable bit, and it is not af- fected by the interrupt disable flag I (non-maskable). Interrupt request bit Interrupt enable bit Interrupt disable flag I BRK instruction Reset Interrupt request Fig. 9. Interrupt Control

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER b7b6 b5b4b3 b2b1b0 Interrupt request register 1 (IREQ1) [Address 00FC B Name Functions After resetRW Interrupt Request Register 1 0 0 : No interrupt request issued 1 : Interrupt request issued Timer 1 interrupt request bit (TM1R)

1 Timer 2 interrupt

request bit (TM2R)

2 Timer 3 interrupt

request bit (TM3R)

3 Timer 4 interrupt

request bit (TM4R)

4 CRT interrupt

request bit (CRTR) 5V SYNC interrupt request bit (VSCR) 0 : No interrupt request issued 1 : Interrupt request issued 0 : No interrupt request issued 1 : Interrupt request issued 0 : No interrupt request issued 1 : Interrupt request issued 0 : No interrupt request issued 1 : Interrupt request issued 0 : No interrupt request issued 1 : Interrupt request issued 0 ] 0 ] 0 ] 0 ] 0 ] 0 ] INT3 interrupt request bit (IT3R) 0 : No interrupt request issued 1 : Interrupt request issued 16] R R R R R R R 6 Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is “0.” —R0 Fig. 10. Interrupt Request Register 1 Fig. 11. Interrupt Request Register 2 b7b6 b5b4b3 b2b1b0 Interrupt request register 2 (IREQ2) [Address 00FD B Name Functions After resetRW Interrupt Request Register 2

0 INT1 interrupt

request bit (ITIR) 0 : No interrupt request issued 1 : Interrupt request issued

1 INT2 interrupt

request bit (IT2R)

2 Serial I/O interrupt

request bit (SIR) 4 f(XIN)/4096 interrupt request bit (MSR) 5, 6 Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” 7 Fix this bit to “0.” 0 0 : No interrupt request issued 1 : Interrupt request issued 0 : No interrupt request issued 1 : Interrupt request issued ] : “0” can be set by software, but “1” cannot be set. 0 ] 0 ] 0 ] 0 ] 0 : No interrupt request issued 1 : Interrupt request issued 16] R R R R RW

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER b7b6 b5b4b3 b2b1b0 Interrupt control register 1 (ICON1) [Address 00FE16] B Name Functions After resetRW Interrupt Control Register 1

0 Timer 1 interrupt

enable bit (TM1E) 0 : Interrupt disabled 1 : Interrupt enabled enable bit (TM2E) enable bit (TM3E)

4 CRT interrupt enable bit

(CRTE) 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 RW RW RW RW RW R Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is “0.” Timer 4 interrupt enable bit (TM4E) 0 : Interrupt disabled 1 : Interrupt enabled

5 VSYNC interrupt enable

bit (VSCE) 0 : Interrupt disabled 1 : Interrupt enabled 0R W INT3 interrupt enable bit (IN3E) 0 : Interrupt disabled 1 : Interrupt enabled W Fig. 12. Interrupt Control Register 1 Fig. 13. Interrupt Control Register 2 b7b6 b5b4b3 b2b1b0 Interrupt control register 2 (ICON2) [Address 00FF16] B Name Functions After resetRW Interrupt Control Register 2 enable bit (IT1E) 0 : Interrupt disabled 1 : Interrupt enabled

1 INT2 interrupt enable

bit (IT2E) enable bit (SIE) 5 to 7 Fix these bits to “0.” 4 f(XIN)/4096 interrupt enable bit (MSE) 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 00 0 0 RW RW RW RW RW

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Fig. 14. Interrupt Input Polarity Register b7 b6 b5 b4 b3 b2 b1 b0 Interrupt input polarity register(RE) [Address 00F916] B Name Functions After reset R W Interrupt Input Polarity Register INT1 polarity switch bit (RE3) 1, 2 0 0 : Positive polarity 1 : Negative polarity 0 : Positive polarity 1 : Negative polarity 0 : Positive polarity 1 : Negative polarity 000 INT2 polarity switch bit (RE4) INT3 polarity switch bit (RE5) Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is indeterminate. Fix these bits to “0.” Fix this bit to “0.” Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is “0.” Indeterminate R— RW RW RW RW RW

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER TIMERS The M37224M3-XXXSP has 4 timers: timer 1, timer 2, timer 3, and timer 4. All timers are 8-bit timer with the 8-bit timer latch. The timer block diagram is shown in Figure 17. All of the timers count down and their divide ratio is 1/(n+1), where n is the value of timer latch. By writing a count value to the correspond- ing timer latch (addresses 00F0 16 to 00F316), the value is also set to a timer, simultaneously. The count value is decremented by 1. The timer interrupt request bit is set to “1” by a timer overflow at the next count pulse, after the count value reaches “00 16”. (1) Timer 1 Timer 1 can select one of the following count sources:

• f(XIN)/16
• f(XIN)/4096 The count source of timer 1 is selected by setting bit 0 of the timer 12 mode register (address 00F416). Timer 1 interrupt request occurs at timer 1 overflow. (2) Timer 2 Timer 2 can select one of the following count sources:
• f(XIN)/16
• Timer 1 overflow signal
• External clock from the TIM2 pin The count source of timer 2 is selected by setting bits 1 and 4 of timer 12 mode register (address 00F4 16). When timer 1 overflow signal is a count source for timer 2, timer 1 functions as an 8-bit prescaler. Timer 2 interrupt request occurs at timer 2 overflow. (3) Timer 3 Timer 3 can select one of the following count sources:
• f(XIN)/16
• External clock from the HSYNC pin
• External clock from the TIM3 pin The count source of timer 3 is selected by setting bits 0 and 5 of timer 34 mode register (address 00F5 16) Timer 3 interrupt request occurs at timer 3 overflow. (4) Timer 4 Timer 4 can select one of the following count sources:
• f(XIN)/16
• f(XIN)/2
• Timer 3 overflow signal The count source of timer 3 is selected by setting bits 1 and 4 of timer 34 mode register (address 00F5 16). When timer 3 overflow signal is a count source for timer 4, timer 3 functions as an 8-bit prescaler. Timer 4 interrupt request occurs at timer 4 overflow. At reset, timers 3 and 4 are connected by hardware and “FF 16” is automatically set in timer 3; “0716” in timer 4. The f(XIN)/16 is se- lected as the timer 3 count source. The internal reset is released by timer 4 overflow in this state and the internal clock is connected. At execution of the STP instruction, timers 3 and 4 are connected by hardware and “FF 16” is automatically set in timer 3; “0716” in timer 4. However, the f(XIN)/16 is not selected as the timer 3 count source. So set bit 0 of timer 34 mode register (address 00F516) to “0” before execution of the STP instruction (f(XIN)/16 is selected as the timer 3 count source). The internal STP state is released by timer 4 overflow in this state and the internal clock is connected. As a result of the above procedure, the program can start under a stable clock. Timer-related registers are shown in Figures 15 and 16.

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER b7b6 b5b4b3 b2b1b0 Timer 12 mode register (T12M) [Address 00F416] B After reset W Timer 12 Mode Register 5 0 Name Functions Timer 1 count source selection bit (T12M0) 0: f(XIN)/16 1: f(XIN)/4096 Timer 2 count source selection bit (T12M1) 0: Internal clock 1: External clock from TIM2 pin Timer 1 count stop bit (T12M2) 0: Count start 1: Count stop Timer 2 count stop bit (T12M3) 0: Count start 1: Count stop Timer 2 internal count source selection bit (T12M4) 0: f(XIN)/16 1: Timer 1 overflow Fix this bit to “0.” R 6,7 0Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” WR WR WR WR WR WR Fig. 16. Timer 34 Mode Register Fig. 15. Timer 12 Mode Register b7b6 b5b4b3 b2b1b0 Timer 34 mode register (T34M) [Address 00F516] B After resetRW Timer 34 Mode Register 6,7 0 Name Functions Timer 3 count source selection bit (T34M0) 0: f(XIN)/16 1: External clock Timer 4 internal count source selection bit (T34M1) 0: Timer 3 overflow 1: f(XIN)/16 Timer 3 count stop bit (T34M2) 0: Count start 1: Count stop Timer 4 count stop bit (T34M3) 0: Count start 1: Count stop Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.”

4 Timer 4 count source

selection bit (T34M4) 0: Internal clock 1: f(XIN)/2

5 Timer 3 external count

source selection bit (T34M5) 0: External clock from TIM3 pin 1: External clock from HSYNC pin RW RW RW RW RW RW

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Fig. 17. Timer Block Diagram Timer 1 (8) 1/2 1/8 Timer 1 latch (8) T12M0 T12M2 T12M4 T12M1 T12M3 Timer 2 (8) Timer 2 latch (8) Timer 3 (8) Timer 3 latch (8) Timer 4 (8) Timer 4 latch (8) Data bus Timer 1 interrupt request Timer 2 interrupt request T34M0 T34M2 T34M5 T34M4 T34M3 T34M1 XIN TIM2 TIM3 Selection gate : Connected to black side at reset T12M : Timer 12 mode register T34M : Timer 34 mode register Notes 1 : HIGH pulse width of external clock inputs TIM2 and TIM3 needs 4 machine cycles or more. of input signal. FF16 0716 H SYNC Reset STP instruction Timer 3 interrupt request Timer 4 interrupt request When the external clock source is selected, timers 2 and 3 are counted at a rising edge In the stop mode or the wait mode, external clock inputs TIM2 and TIM3 cannot be used. 2 : 3 :

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER SERIAL I/O The M37224M3-XXXSP has a built-in serial I/O which can either trans- mit or receive 8-bit data serially in the clock synchronous mode. The serial I/O block diagram is shown in Figure 18. The synchronous clock I/O pin (SCLK ), and data I/O pins (SOUT , SIN) also function as port P2. Bit 2 of the serial I/O mode register (address 00DC 16) selects whether the synchronous clock is supplied internally or externally (from the 0/SCLK pin). When an internal clock is selected, bits 1 and 0 select whether f(XIN) is divided by 4, 16, 32, or 64. Bit 3 selects whether port P2 is used for serial I/O or not. To use the P22/SIN pin as the SIN pin, set the bit 2 of the port P2 direction register (address 00C516) to “0.” The operation of the serial I/O is described below. The operation differs depending on the clock source; external clock or internal clock. Fig. 18. Serial I/O Block Diagram Serial I/O shift register (8) Data bus Serial I/O interrupt request Selection gate : Connected to black side at reset.Synchronous circuit Frequency divider 1/81/4 1/16 SM1 SM0 Serial I/O counter (8) SM5: LSB MSB S SM2 SM6 XIN SIN S OUT S CLK SM3 P21 latch P20 latch SM3 (Address 00DD16) SM : Serial I/O mode register Note: When the data is set in the serial I/O register (address 00DD16), the register functions as the serial I/O shift register. (Note)

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Fig. 19. Serial I/O Timing (for LSB first) Synchronous clock Transfer clock Serial I/O register write signal Serial I/O output SOUT D 0 D 1 D 2 D 3 D 4 D 5 D 6 D 7 (Note) Serial I/O input SIN Note : When an internal clock is selected, the SOUT pin is at high-impedance after transfer is completed. Interrupt request bit is set to “1” Internal clock: The serial I/O counter is set to “7” during the write cycle into the serial I/O register (address 00DD16), and the transfer clock goes “H” forcibly. At each falling edge of the transfer clock after the write cycle, serial data is output from the S OUT pin. Transfer di- rection can be selected by bit 5 of the serial I/O mode register. At each rising edge of the transfer clock, data is input from the S IN pin and data in the serial I/O register is shifted 1 bit. After the transfer clock has counted 8 times, the serial I/O counter becomes “0” and the transfer clock stops at HIGH. At this time the interrupt request bit is set to “1.” External clock: When an external clock is selected as the clock source, the interrupt request is set to “1” after the transfer clock has been counted 8 counts. However, transfer operation does not stop, so the clock should be controlled externally. Use the external clock of 1MHz or less with a duty cycle of 50%. The serial I/O timing is shown in Figure 19. When using an external clock for transfer, the external clock must be held at HIGH for initial- izing the serial I/O counter. When switching between an internal clock and an external clock, do not switch during transfer. Also, be sure to initialize the serial I/O counter after switching. Notes 1:On programming, note that the serial I/O counter is set by writing to the serial I/O register with the bit managing in- structions, such as SEB and CLB. 2: When an external clock is used as the synchronous clock, write transmit data to the serial I/O register when the trans- fer clock input level is HIGH.

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER b7b6 b5b4b3 b2b1b0 Serial I/O mode register (SM) [Address 00DC16] B Name Functions After resetRW Serial I/O Mode Register 0, 1Internal synchronous clock selection bits (SM0, SM1) b1 b0 0 0: f(XIN)/4 0 1: f(XIN)/16 1 0: f(XIN)/32 1 1: f(XIN)/64

2 Synchronous clock

selection bit (SM2)

3 Serial I/O port

selection bit (SM3)

5 Transfer direction

selection bit (SM5) 7 0 0: P20, P21 functions as port 1: SCLK , SOUT 0: External clock 1: Internal clock 0: LSB first 1: MSB first Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is “0.” Fix this bit to “0.” Serial input pin selection bit (SM6) 0: Input signal from SIN pin 1: Input signal from SOUT pin RW RW RW RW RW RW Fig. 20. Serial I/O Mode Register

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Serial I/O shift register (8) “1” “0” ClockS CLK S OUT S IN SM6 SM: Serial I/O mode register Fig. 21. Signals on Serial I/O Common Transmission/Reception Mode Serial I/O Common Transmission/Reception Mode By writing “1” to bit 6 of the serial I/O mode register, signals SIN and SOUT are switched internally to be able to transmit or receive the serial data. Figure 21 shows signals on serial I/O common transmission/recep- tion mode. Note:When receiving the serial data after writing “FF 16” to the serial I/O register.

Note : The DA-L register also functions as the low-order 6 bits of the DA latch. Table 2. Relation between Low-order 6-bit Data and High-level Area

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Fig. 23. 8-bit PWM Timing (a) Pulses showing the weight of each bit 1 3 5 7 9 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 170 180 190 200 210 220 230 240 250 2555 4 12 20 28 36 44 52 60 68 76 84 92 100 108 116 124 132 140 148 156 164 172 180 188 196 204 212 220 228 236 244 252 16 48 80 112 144 176 208 240 24 40 56 72 88 104 120 136 152 168 184 200 216 232 248 32 96 160 224 64 192 Bit 7 2 6 10 14 18 22 26 30 34 38 42 46 50 54 58 62 66 70 74 78 82 86 90 94 98 102 106 110 114 118 122 126 130 134 138 142 146 150 154 158 162 166 170 174 178 182 186 190 194 198 202 206 210 214 218 222 226 230 234 238 242 246 250 254 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 128 Bit 0 PWM output t = 4 ms T = 1024 ms f(XIN) = 8 MHz (b) Example of 8-bit PWM t 116 (0) 116 (1) 116 (24) (255) T = 256 t FF 16

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Fig. 24. 14-bit PWM Output Example (f(XIN) = 8 MHz) 0.25 ms b7 b0b6 b5 b4 b3 b2 b1 0 0010110 b13 b6 00 010110 b0b5 101000 Set “2C16” to DA-H register. [DA-H register] D H At writing of DA-L b0b6 b5 b4 b3 b2 b1 010100 Set “2816” to DA-L register. [DA-L register] D L At writing of DA-L Undefined These bits decide “H” level area of fundamental waveform. These bits decide smaller interval “tm” in which “H” leval area is [“H” level area of fundamental waveform + t ]. Minimum resolution bit width 0.25 ms High-order 8-bit value of DA latch5“H” level area of fundamental waveform FF 00 D3FE FD … …D6 D4 02 01D5 14-bit PWM output 8-bit counter 0.25ms5 44 FF 00 D3FE FD D6 D4 02 01D5 14-bit PWM output 8-bit counter 0.25ms5 45 Fundamental waveform Waveform of smaller interval “tm” specified by low-order 6 bits Fundamental waveform of smaller interval “tm” which is not specified by low-order 6 bits is not changed. 14-bit PWM output Low-order 6-bit output of DA latch 0.25ms5 44 t = 0.25ms T = 4096 ms Repeat period t0 t1 t2 t3 t4 t5 t59 t60 t61 t62 t63 [DA latch] 2C 2B 2A 03 02 01 00 2C 2B 2A 03 02 01 00……

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER b7b6 b5b4b3 b2b1b0 PWM output control register 2 (PN) [Address 00D6 B After resetRW PWM Output Control Register 2 0, 1 Name Functions DA output polarity selection bit (PN3) 0 : Positive polarity 1 : Negative polarity PWM output polarity selection bit (PN4) Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” DA general-purpose output bit (PN5) 0 : Output LOW 1 : Output HIGH to 0Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” 0 : Positive polarity 1 : Negative polarity 16] RW RW RW Fig. 25. PWM Output Control Register 1 Fig. 26. PWM Output Control Register 2 b7b6 b5b4b3 b2b1b0 PWM output control register 1 (PW) [Address 00D5 B After resetRW PWM Output Control Register 1 Name Functions DA, PWM count source selection bit (PW0) 0 : Count source supply 1 : Count source stop P00/PWM0 output selection bit (PW2) 0: P00 output 1: PWM0 output P01/PWM1 output selection bit (PW3) 0: P01 output 1: PWM1 output P02/PWM2 output selection bit (PW4) 0: P02 output 1: PWM2 output

5 P03/PWM3 output

selection bit (PW5) 0: P03 output 1: PWM3 output

6 P04/PWM4 output

selection bit (PW6) 0: P04 output 1: PWM4 output DA/PN4 output selection bit (PW1) 0 : DA output 1 : PN4 output

7 P05/PWM5 output

selection bit (PW7) 0: P05 output 1: PWM5 output 16] RW RW RW RW RW RW RW RW

comparator block diagram is shown in Figure 27. the A-D control register 2 (address 00EF16). chine cycles (NOP instruction 5 8). Table 3. Relation between Contents of A-D Control Register 2 and

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER b7 b6 b5 b4 b3 b2 b1 b0 A-D control register 1 (AD1) [Address 00EE16] B After resetRW A-D Control Register 1 to Analog input pin selection bits (ADM0 to ADM2) Name Functions b2 b1 b0 0 0 0 : A-D1 0 0 1 : A-D2 0 1 0 : A-D3 0 1 1 : A-D4 1 0 0 : A-D5 1 0 1 : A-D6 1 1 0 : 1 1 1 :

4 Storage bit of comparison

result (ADM4) 0: Input voltage < reference voltage 1: Input voltage > reference voltage Indeterminate Do not set. 5 to 7 Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” RW b7 b6 b5 b4 b3 b2 b1 b0 A-D control register 2(AD2) [Address 00EF16] B After resetRW A-D Control Register 2 to 6, 7 Name Functions D-A converter set bits (ADC0 to ADC5) b0b1b2 b3 b4 b5 Nothing is assigned. These bits are write disable bits. When these bits are reed out, the values are “ 0.” 000000 00000 0000 111 11111 111111 : 3/128Vcc : 5/128Vcc : 123/128Vcc : 125/128Vcc : 127/128Vcc : 1/128Vcc RW Fig. 28. A-D Control Register 1 Fig. 29. A-D Control Register 2

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER D-A CONVERTER The M37224M3-XXXSP has 2 D-A converters with 6-bit resolution. D-A converter block diagram is shown in Figure 30. D-A conversion is performed by setting the value in the DA conver- sion register. The result of D-A conversion is output from the DA pin by setting “1” to the DA output enable bit of the port P3 output mode control register (bits 2 and 3 at address 00CD 16). The output analog voltage V is determined with the value n (n: deci- mal number) in the DA conversion register. V = V CC 5 (n = 0 to 127) The DA output does not build in a buffer, so connect an external buffer when driving a low-impedance load. n 128 D-A Conversion Register Table 4.Relation between Contents of D-A Conversion Register and Output Voltage Bit 7 000/128 V CC 001/128 VCC 002/128 VCC 125/128 VCC 126/128 VCC 127/128 VCC Output Voltage “V” Bit 5 1 … Bit 4 1 … Bit 3 1 … Bit 2 1 … Bit 1 1 … Bit 0 1 … Fig. 30. D-A Converter Block Diagram Data bus DA1 output enable bit Resistor ladder DA1 conversion register DA1 (address 00DE16)7 DA2 Resistor ladder DA2 conversion register (address 00DF16) DA2 output enable bit

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Fig. 32. Port P3 Output Mode Control Register Fig. 31. DAi Conversion Register b7 b6 b5b4 b3 b2b1 b0 DAi conversion register (DAi) (i = 1 and 2) [Address 00DE16, 00DF16] B After reset R W DAi Conversion Register 0 to 5, Indeterminate Name Functions DA conversion set bits (DAi0 to DAi5) b0b1b2 b3 b4 b5 Fix this bit to “0.” 000000 00000 0000 111 11111 111111 : 1/128Vcc : 2/128Vcc : 125/128Vcc : 126/128Vcc : 127/128Vcc : 0/128Vcc RW RW b7 b6 b5 b4 b3 b2 b1 b0 Port P3 output mode control register (P3S) [address 00CD16] B Name Functions After resetR W Port P3 Output Mode Control Register 0 0 : CMOS output 1 : N-channel open-drain output 1 0 to P30 output structure selection bit (P30S) P31 output structure selection bit (P31S) Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” 0 : CMOS output 1 : N-channel open-drain output

02 DA1 output enable bit 0 : P30 input/output

1 : DA1 output

03 DA2 output enable bit 0 : P31 input/output

1 : DA2 output RW RW RW RW

Table 5 outlines the CRT display functions of the M37224M3-XXXSP. obtained by using each output signal (R, G, and B). smooth character patterns (refer to Figure 33). À Write the display character code in the display RAM. \` Specify the display color by using the color register. ˆ Specify the vertical position by using the vertical position register. ˜ Specify the character size by using the character size register. ing data in the block for which display is terminated by software. the block diagram of the CRT display circuit. Table 5. Outline of CRT Display Functions

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Fig. 33. CRT Display Character Configuration Fig. 34. CRT Control Register 12 dots 16 dots b7 b6 b5 b4 b3 b2 b1 b0 CRT control register (CC) [Address 00EA16] B Name Functions After resetR W CRT Control Register

0 All-blocks display control

bit (CC0) (See note) 0 : All-blocks display off 1 : All-blocks display on

1 Block 1 display control bit

(CC1) 0 : Block 1 display off 1 : Block 1 display on 2 0 : Block 2 display off 1 : Block 2 display on to Note: Display is controlled by logical product (AND) between the all-blocks display control bit and each block control bit. Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” Block 2 display control bit (CC2) RW RW RW

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER CRT control register (Address 00EA16) Vertical position registers (Addresses 00E116, 00E216) Character size register (Address 00E416) Horizontal position register (Address 00E016) Border selection register (Address 00E516) Display oscillation circuit OSC1 OSC2 Display position control circuit H SYNC VSYNC Display control circuit RAM for display 10 bits 5 20 characters 5 2 lines Color registers (Addresses 00E616 to 00E916) CRT port control register (Address 00EC16) Data bus ROM for display 12 dots 5 16 dots 5 128 characters Shift register 12 bits Shift register 12 bits Output circuit R G B OUT Fig. 35. Block Diagram of CRT Display Circuit

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER (2) Display Position The display positions of characters are specified in units called a “block.” There are 2 blocks, block 1 and block 2. Up to 20 characters can be displayed in each block (refer to (4) Memory for Display). The display position of each block can be set in both horizontal and vertical directions by software. The display position in the horizontal direction can be selected for all blocks in common from 64-step display positions in units of 4T C (TC = oscillating cycle for display). The display position in the vertical direction for each block can be selected from 128-step display positions in units of 4 scanning lines. Block 2 is displayed after the display of block 1 is completed (refer to Figure 36 (a)). Accordingly, if the display of block 2 starts during the display of block 1, only block 1 is displayed. Similarly, when multiline display, block 1 is displayed after the display of block 2 is completed (refer to Figure 36 (b)). The vertical position can be specified from 128-step positions (4 scan- ning lines per a step) for each block by setting values “00 16” to “7F16” to bits 0 to 6 in the vertical position register (addresses 00E116 and 00E216). Figure 38 shows the structure of the vertical position regis- ter. Fig. 36. Display Position (HR) CV1 CV2 Block 1 Block 2 (a) Example when each block is separated CV1 CV2 Block 1 Block 2 Block 1 (second) CV1 No display No display (b) Example when block 2 overlaps with block 1

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Fig. 37. Supplement Explanation for Display Position The display position in the vertical direction is determined by count- ing the horizontal sync signal (HSYNC ). At this time when VSYNC and H SYNC are positive polarity (negative polarity), it starts to count the rising edge (falling edge) of HSYNC signal from after about 1 machine cycle of rising edge (falling edge) of VSYNC signal. So interval from rising edge (falling edge) of VSYNC signal to rising edge (falling edge) of HSYNC signal needs enough time (2 machine cycles or more) for avoiding jitter. The polarity of HSYNC and VSYNC signals can select with the CRT port control register (address 00EC16). When bits 0 and 1 of the CRT port control register (address 00EC16) are set to “1” (negative polarity) VSYNC signal input VSYNC control signal in microcomputer 0.125 to 0.25 [ms] ( at f(XIN) = 8MHz) Period of counting H SYNC signal (Note 2) H SYNC signal input Not count 12345 Notes 1 : The vertical position is determined by counting falling edge of HSYNC signal after rising edge of VSYNC control signal in the microcomputer. 2 : Do not generate falling edge of H SYNC signal near rising edge of VSYNC control signal in microcomputer to avoid jitter. 3 : The pulse width of V SYNC and HSYNC needs 8 machine cycles or more. 8 machine cycles or more 8 machine cycles or more Fig. 38. Vertical Position Register i b7 b6 b5 b4 b3 b2 b1 b0 Vertical position register i (CVi) (i = 1 and 2) [Addresses 00E116, 00E216] B Name Functions After reset R W Vertical Position Register i to Vertical display start positions128 steps (0016 to 7F16) Indeterminate (CVi : CVi0 to CVi6) Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is “0.” RW

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER The horizontal position is common to all blocks, and can be set in 64 steps (where 1 step is 4TC , TC being the display oscillation period) as values “0016” to “3F16” in bits 0 to 5 of the horizontal position register (address 00E016). The structure of the horizontal position register is shown in Figure 39. Fig. 39. Horizontal Position Register b7 b6 b5 b4 b3 b2 b1 b0 Horizontal position register (HR) [Address 00E016] B Name Functions After resetRW Horizontal Position Register 0to 6, 7 Horizontal display start positions (HR0 to HR5) 64 steps (0016 to 3F16) 0 0Nothing is assigned. These bits are write disable bits. When thses bits are read out, the values are “0.” RW

C ) in the width (horizontal) direction. Nothing is assigned. These bits are write disable bits. position is common to all blocks even when the character size varies with each block (refer to Figure 41). Table 6. Relation between Set Values in Character Size Register and Character Sizes

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Fig. 42. Display Character Stored Data (4) Memory for Display There are 2 types of display memory : CRT display ROM (addresses 1000016 to 10FFF16) used to store character dot data (masked) and CRT display RAM (addresses 060016 to 06B316) used to specify the colors of characters to be displayed. The following describes each type of display memory. À ROM for display (addresses 1000016 to 10FFF16) The CRT display ROM contains dot pattern data for characters to be displayed. For characters stored in this ROM to be actually displayed, it is necessary to specify them by writing the character code inherent to each character (code determined based on the addresses in the CRT display ROM) into the CRT display RAM. The character code list is shown in Table 7. The CRT display ROM has a capacity of 4 K bytes. Since 32 bytes are required for 1 character data, the ROM can stores up to 128 kinds of characters. The CRT display ROM space is broadly divided into 2 areas. The [vertical 16 dots] 5 [horizontal (left side) 8 dots] data of display char- acters are stored in addresses 10000 16 to 107FF16; the [vertical 16 dots] 5 [horizontal (right side) 4 dots] data of display characters are stored in addresses 1080016 to 10FFF16 (refer to Figure 42). Note however that the high-order 4 bits in the data to be written to ad- dresses 1080016 to 10FFF16 must be set to “1” (by writing data “FX16”). 10XX0 16 +80016 000000 000000 000010 000101 001000 001000 00100 0 010000 111100 1 100000 100000 100000 000000 000101 000010 01111 000 0000 0000 0000 0000 0000 0000 0100 0100 0100 0010 0010 0010 0000 0000 0000 10XXF 16 +80016 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 b7 b0 b7 b0 b3 10XX0 16 10XXF 16 0000

contents of the CRT display RAM. register No. to the low-order 2 bits (bits 0 and 1) in address 068016. CRT display RAM is shown in Figure 43. Table 7. Character Code List (partially abbreviated) Table 8. Contents of CRT Display RAM

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER [Color specification] 0 0 : Specifying color register 0 0 1 : Specifying color register 1 1 0 : Specifying color register 2 1 1 : Specifying color register 3 Color register specification Block 1 [Character specification] Specify 128 characters (“0016” to “7F16”) Character code Block 2 [Character specification] 1st character : 062016 20th character : 063316 1st character : 068016 20th character : 069316 1st character : 060016 20th character : 061316 [Color specification] 1st character : 06A016 20th character : 06B316 to to to to Specify 128 characters (“0016” to “7F16”) Character code 0 0 : Specifying color register 0 0 1 : Specifying color register 1 1 0 : Specifying color register 2 1 1 : Specifying color register 3 Color register specification Fig. 43. Structure of CRT Display RAM

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER (5) Color Registers The color of a displayed character can be specified by setting the color to one of the 4 registers (CO0 to CO3: addresses 00E616 to 00E916) and then specifying that color register with the CRT display RAM. There are 3 color outputs; R, G and B. By using a combination of these outputs, it is possible to set 23–1 (when no output) = 7 col- ors. However, since only 4 color registers are available, up to 4 col- ors can be disabled at one time. R, G and B outputs are set by using bits 1 to 3 in the color register. Bit 5 is used to specify whether a character output or blank output. Figure 44 shows the color register. Fig. 44. Color Registers b7 b6 b5 b4 b3 b2 b1 b0 Color register i (COi) (i = 0 to 3) [Addresses 00E616 to 00E916] B Name Functions After resetR W Color Register i 0 0

1 B signal output

selection bit (COi1) 0 : No character is output 1 : Character is output

2 G signal output

selection bit (COi2) 0 : No character is output 1 : Character is output

3 R signal output

selection bit (COi3) 0 : No character is output 1 : Character is output 6, 7

5 OUT signal output

control bit (COi5) 0 : Character is output 1 : Blank is output Fix this bit to “0.” R — RW RW RW RW Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.”

register to “0” (character is output). the border selection register and the character border function.

1 Border including character

Table 9. Relationship between Set Value in Border Selection Register and Character Border Function

0 Block 1 OUT output

2 Block 2 OUT output

Nothing is assigned. This bit is a write disable bit. Nothing is assigned. These bits are write disable bits.

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER (7) Multiline Display The M37224M3-XXXSP can ordinarily display 2 lines on the CRT screen by displaying 2 blocks at different vertical positions. In addi- tion, it can display up to 16 lines by using CRT interrupts. A CRT interrupt request occurs at the point at which display of each block has been completed. In other words, when a scanning line reaches the point of the display position (specified by the vertical position registers) of a certain block, the character display of that block starts, and an interrupt occurs at the point at which the scan- ning line exceeds the block. Note: A CRT interrupt does not occur at the end of display when the block is not displayed. In other words, if a block is set to off display with the display control bit of the CRT control reg- ister (address 00EA 16), a CRT interrupt request does not occur (refer to Figure 47). Fig. 47. Timing of CRT Interrupt Request Block 1 (on display) “CRT interrupt request” On display (CRT interrupt request occurs at the end of block display) Block 2 (on display) Block 1' (on display) Block 2' (on display) “CRT interrupt request” “CRT interrupt request” “CRT interrupt request” Block 1 (on display) “CRT interrupt request” Off display (CRT interrupt request does not occur at the end of block display) Block 2 (on display) Block 1' (off display) Block 2' (off display) “CRT interrupt request” No “CRT interrupt request” No “CRT interrupt request”

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER (8) CRT Output Pin Control The CRT output pins R, G, B, and OUT can also function as ports P52, P53, P54 and P55. Set the corresponding bit of the port P5 di- rection register (address 00CB16) to “0” to specify these pins as CRT output pins, or set it to “1” to specify it as an general-purpose port P5 pins. The input polarity of signals H SYNC and VSYNC and output polarity of signals R, G, B, and OUT can be specified with the bits of the CRT port control register (address 00EC16) . Set a bit to “0” to specify positive polarity; set it to “1” to specify negative polarity. The struc- ture of the CRT port control register is shown in Figure 48. Fig. 48. CRT Port Control Register b7 b6 b5 b4 b3 b2 b1 b0 CRT port control register (CRTP) [Address 00EC16] B Name Functions After resetR W CRT Port Control Register 0H SYNC input polarity switch bit (HSYC) 0 : Positive polarity 1 : Negative polarity 1 0 : Positive polarity 1 : Negative polarity

2 R/G/B output polarity switch

bit (R/G/B) 0 : Positive polarity 1 : Negative polarity 3 Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is “0.”

4 OUT output polarity

switch bit (OUT) 0 : Positive polarity 1 : Negative polarity

5 R signal output switch bit

(OP5) 0 : R signal output 1 : MUTE signal output

6 G signal output switch bit

(OP6) 0 : G signal output 1 : MUTE signal output

7 B signal output switch bit

(OP7) 0 : B signal output 1 : MUTE signal output VSYNC input polarity switch bit (VSYC) RW RW RW RW RW RW RW

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER (9) Raster Coloring Function An entire screen (raster) can be colored by setting the bits 5 to 7 of the CRT port control register. Since each of the R, G, and B pins can be switched to raster coloring output, 7 raster colors can be obtained. If the R, G, and B pins have been set to MUTE signal output, a raster coloring signal is output in the part except a no-raster colored char- acter (in Figure 49, a character “O”) during 1 horizontal scanning period. This ensures that character colors do not mix with the raster color. In this case, MUTE signal is output from the OUT1 pin. An example in which a magenta character “I” and a red character “O” are displayed with blue raster coloring is shown in Figure 49. Fig. 49. Example of Raster Coloring A'A “RED” “BLUE” H SYNC R B OUT Signals across A – A'

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER (10) Clock for Display As a clock for display to be used for CRT display, it is possible to select one of the following 4 types.

• Main clock supplied from the XIN pin
• Main clock supplied from the XIN pin divided by 1.5
• Clock from the LC or RC supplied from the pins OSC1 and OSC2.
• Clock from the ceramic resonator or quartz-crystal oscillator sup- plied from the pins OSC1 and OSC2. This clock for display can be selected for each block by the CRT clock selection register (address 00ED16). When selecting the main clock, set the oscillation frequency to 8 MHz. Fig. 50. CRT Clock Selection Register b7 b6 b5 b4 b3 b2 b1 b0 CRT clock selection register (CK) [Address 00ED B Name Functions After reset R W CRT Clock Selection Register 0, 1 CRT clock selection bits (CK0,CK1) Since the main clock is used as the clock for display, the oscillation frequency is limited. Because of this, the character size in width (horizontal) direction is also limited. In this case, pins OSC1 and OSC2 are also used as input ports P33 and P34 respectively. The clock for display is supplied by connecting the following across the pins OSC1 and OSC2.
• a ceramic resonator only for CRT display and a feedback resistor
• a quartz-crystal oscillator only for CRT display and a feedback resistor (Note) to 000000 The clock for display is supplied by connecting RC or LC across the pins OSC1 and OSC2. Functions CRT oscillation frequency = f(XIN) CRT oscillation frequency = f(XIN)/1.5 Note: It is necessary to connect other ceramic resonator or quartz-crystal oscillator across the pins X 1 1 Fix these bits to “0.” IN and XOUT . 16] RW RW

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER ROM CORRECTION FUNCTION This can correct program data in ROM. Up to 2 addresses (2 blocks) can be corrected, a program for correction is stored in the ROM cor- rection memory in RAM. The ROM memory for correction is 32 bytes 5 2 blocks. Block 1 : addresses 02C0 16 to 02DF16 Block 2 : addresses 02E016 to 02FF16 Set the address of the ROM data to be corrected into the ROM cor- rection address register. When the value of the counter matches the ROM data address in the ROM correction address, the main pro- gram branches to the correction program stored in the ROM memory for correction. To return from the correction program to the main pro- gram, the op code and operand of the JMP instruction (total of 3 bytes) are necessary at the end of the correction program. When the blocks 1 and 2 are used in series, the above instruction is not needed at the end of the block 1. The ROM correction function is controlled by the ROM correction enable register. Notes 1 : Specify the first address (op code address) of each instruction as the ROM correction address. 2 :Use the JMP instruction (total of 3 bytes) to return from the main program to the correction program. 3 :Do not set the same ROM correction address to the blocks 1 and 2. b7 b6 b5 b4 b3 b2 b1 b0 ROM correction enable register (RCR) [Address 021B16] B ROM Correction Enable Register

0 Block 1 enable bit (RC0)

0: Disabled 1: Enabled

1 Block 2 enable bit (RC1) 0: Disabled

1: Enabled to Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” RW RW RW 2,3 Fix these bits to “0.” 0 RW After reset 021716ROM correction address 1 (high-order) 021816ROM correction address 1 (low-order) 021916ROM correction address 2 (high-order) 021A16ROM correction address 2 (low-order) Fig. 51. ROM Correction Address Registers Fig. 52. ROM Correction Enable Register

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER low-order address. The internal state of microcomputer at reset are shown in Figures 5 to 8. An example of the reset circuit is shown in Figure 53. The reset input voltage must be kept 0.6 V or less until the power source voltage surpasses 4.5 V. Fig. 53. Reset Sequence Fig. 54. Example of Reset Circuit RESET CIRCUIT When the oscillation of a quartz-crystal oscillator or a ceramic reso- nator is stable and the power source voltage is 5 V ±10 %, hold the RESET pin at LOW for 2 µs or more, then return it to HIGH. Then, as shown in Figure 53, reset is released and the program starts from the address formed by using the content of address FFFF16 as the high-order address and the content of the address FFFE16 as the Power source voltage 0 V Reset input voltage 0 V 4.5 V 0.6 V Poweron Vcc RESET Vss M37224M3-XXXSP 3 0.1 mF M51953AL X IN RESET Internal RESET SYNC Address Data 32768 count of XIN clock cycle (Note 3) Reset address from the vector table ? ? 01, S 01, S-1 01, S-2 FFFE FFFF AD H ,AD L Notes 1 :: f(XIN) and f() are in the relation : f(XIN) = 2·f ( ). A question mark (?) indicates an undefined state that depends on the previous state. Immediately after a reset, timer 3 and timer 4 are connected by hardware. At this time, “FF 16” is set in timer 3 and “07 ” is set to timer 4. Timer 3 counts down overflow signal. with f(XIN)/16, and reset state is released by the timer 4

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER X IN XOUT C IN M37224M3-XXXSP C OUT 2019 CLOCK GENERATING CIRCUIT The built-in clock generating circuit is shown in Figure 57. When the STP instruction is executed, the internal clock φ stops at HIGH. At the same time, timers 3 and 4 are connected by hardware and “FF16” is set in timer 3 and “0716” is set in the timer 4. Select f(XIN)/16 as the timer 3 count source (set bit 0 of the timer 34 mode register to “0” before the execution of the STP instruction). Moreover, set the timer 3 and timer 4 interrupt enable bits to disabled (“0”) before execution of the STP instruction). The oscillator restarts when external inter- rupt is accepted. However, the internal clock φ keeps its HIGH until timer 4 overflows, allowing time for oscillation stabilization when a ceramic resonator or a quartz-crystal oscillator is used. When the WIT instruction is executed, the internal clock φ stops in the HIGH but the oscillator continues running. This wait state is re- leased when an interrupt is accepted (Note). Since the oscillator does not stop, the next instruction can be executed at once. When returning from the stop or the wait state, to accept an interrupt, set the corresponding interrupt enable bit to “1” before executing the STP or the WIT instructions. Note: In the wait mode, the following interrupts are invalid. (1) V SYNC interrupt (2) CRT interrupt (3) f(X IN)/4096 interrupt (4) Timer 1 interrupt using f(XIN)/4096 as count source (5) Timer 2 interrupt using P24/TIM2 pin input as count source (6) Timer 3 interrupt using P23/TIM3 pin input as count source (7) Timer 4 interrupt using f(XIN)/2 as count source (8) Multi-master I2C-BUS interface interrupt A circuit example using a ceramic resonator (or a quartz-crystal os- cillator) is shown in Figure 55. Use the circuit constants in accor- dance with the resonator manufacture’s recommended values. A cir- cuit example with external clock input is shown in Figure 56. Input the clock to the XIN pin, and open the XOUT pin. Fig. 57. Clock Generating Circuit Block Diagram Fig. 56. External Clock Input Circuit Example Fig. 55. Ceramic Resonator Circuit Example X IN M37224M3-XXXSP Vcc Vss External oscillation circuit Interrupt request Interrupt disable flag I Reset SQ RSTP instruction SQ R WIT instruction SQ R STP instruction Reset Internal clock 1/2 1/8 Timer 3 Timer 4 XOUTXIN T34M0 T34M2 Selection gate : Connected to black side at reset. T34M : Timer 34 mode register

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER OSC2OSC1 L C1 C2 RESET Vss Vcc Circuit example 1 RESET Vss Vcc Circuit example 2 Note : DISPLAY OSCILLATION CIRCUIT The CRT display clock oscillation circuit has a built-in clock oscilla- tion circuits, so that a clock for CRT display can be obtained simply by connecting an LC, an RC, a ceramic resonator or a quartz-crystal oscillator circuit across the pins OSC 1 and OSC 2. Select the clock for display with bits 0 and 1 of the CRT clock selection register (ad- dress 00ED16). ADDRESSING MODE The memory access is reinforced with 17 kinds of addressing modes. Refer to SERIES 740 <Software> User’s Manual for details. MACHINE INSTRUCTIONS There are 71 machine instructions. Refer to SERIES 740 <Soft- ware> User’s Manual for details. PROGRAMMING NOTES (1) The divide ratio of the timer is 1/(n+1). (2) Even though the BBC and BBS instructions are executed imme- diately after the interrupt request bits are modified (by the pro- gram), those instructions are only valid for the contents before the modification. At least one instruction cycle is needed (such as an NOP) between the modification of the interrupt request bits and the execution of the BBC and BBS instructions. (3) After the ADC and SBC instructions are executed (in the decimal mode), one instruction cycle (such as an NOP) is needed before the SEC, CLC, or CLD instruction is executed. (4) An NOP instruction is needed immediately after the execution of a PLP instruction. (5) In order to avoid noise and latch-up, connect a bypass capacitor (≈ 0.1 µF) directly between the VCC pin–VSS pin and the VCC pin– CNV SS pin, using a thick wire. DATA REQUIRED FOR MASK ORDERS The following are necessary when ordering a mask ROM produc- tion: (1) Mask ROM Order Confirmation From. (2) Mask Specification From. (3) Data to be written to ROM, in EPROM form (32-pin DIP Type 27C101, three identical copies). AUTO-CLEAR CIRCUIT When a power source is supplied, the auto-clear function will oper- ate by connecting the following circuit to the RESET pin. Fig. 59. Auto-clear Circuit Example Fig. 58. Display Oscillation Circuit Make the level change from “L” to “H” at the point at which the power source voltage exceeds the specified voltage.

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER ABSOLUTE MAXIMUM RATINGS Power source voltage VCC Input voltage CNV SS Input voltage P0 0–P07,P10–P17, P20–P27, P30–P34, OSC1, XIN, HSYNC , VSYNC , RESET Output voltage P0 6, P07, P10–P17, P20–P27, P30–P32, R, G, B, OUT, D-A, XOUT , OSC2 Output voltage P0 0–P05 Circuit current R, G, B, OUT, P1 0–P17, P20–P27, P30, P31, D-A Circuit current R, G, B, OUT, P0 6, P07, P10–P17, P20–P23, P30–P32, D-A Circuit current P0 0–P05 Circuit current P2 4–P27 Power dissipation Operating temperature Storage temperature Symbol V CC VI VI VO VO IOH IOL1 IOL2 IOL3 Pd Topr Tstg Conditions All voltages are based on VSS . Output transistors are cut off. Ratings –0.3 to 6 –0.3 to 6 –0.3 to V CC + 0.3 –0.3 to VCC + 0.3 –0.3 to 13 0 to 1 (Note 1) 0 to 2 (Note 2) 0 to 1 (Note 2) 0 to 10 (Note 3) 550 –10 to 70 –40 to 125 Unit V V V V V mA mA mA mA mW Parameter Ta = 25 °C V V V V mA mA mA mA mA MHz MHz kHz MHz Power source voltage (Note 4), During CPU, CRT operation Power source voltage HIGH input voltage P0 0–P07,P10–P17, P20–P27, P30–P34, SIN, SCLK , HSYNC , VSYNC , RESET, XIN, OSC1, TIM2, TIM3, INT1, INT2, INT3 LOW input voltage P0 0–P07,P10–P17, P20–P27, P30–P34 LOW input voltage H SYNC , VSYNC , RESET,TIM2, TIM3, INT1, INT2, INT3, XIN, OSC1, SIN, SCLK HIGH average output current (Note 1)R, G, B, OUT, D-A, P10–P17, P20–P27, P30, P31 LOW average output current (Note 2)R, G, B, OUT, D-A, P06, P07, P10–P17, P20–P27, P30–P32 LOW average output current (Note 2)P00–P05 LOW average output current (Note 3)P24–P27 Oscillation frequency (for CPU operation) (Note 5) XIN Oscillation frequency (for CRT display) (Note 5) OSC1 Input frequency TIM2, TIM3 Input frequency S CLK Symbol RECOMMENDED OPERATING CONDITIONS (Ta = –10 °C to 70 °C, VCC = 5 V ± 10 %, unless otherwise noted) VCC VSS VIH1 VIL1 VIL2 IOH IOL1 IOL2 IOL3 fCPU fCRT fhs1 fhs2 Max. 5.5 VCC

0.4 VCC

0.2 VCC

8.1 8.0 100 Min. 4.5 0.8VCC Typ. 5.0 7.9 5.0 8.0 Limits UnitParameter Notes 1:The total current that flows out of the IC must be 20 mA (max.). 2:The total input current to IC (IOL1 + IOL2 ) must be 30 mA or less. 3:The total average input current for ports P24–P27 to IC must be 20 mA or less. 4:Connect 0.1 µF or more capacitor externally between the power source pins VCC –VSS so as to reduce power source noise. Also connect 0.1 µF or more capacitor externally between the pins VCC –CNV SS . 5:Use a quartz-crystal oscillator or a ceramic resonator for the CPU oscillation circuit.

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER mA µA V V V V µA µA µA ELECTRIC CHARACTERISTICS (VCC = 5 V ± 10 %, VSS = 0 V, f(XIN) = 8 MHz, Ta = –10 °C to 70 °C, unless otherwise noted) VCC = 5.5 V, f(XIN) = 8 MHz VCC = 5.5 V, f(XIN) = 0 VCC = 4.5 V IOH = –0.5 mA VCC = 4.5 V IOL = 0.5 mA VCC = 4.5 V IOL = 10.0 mA VCC = 5.0 V VCC = 5.0 V VCC = 5.5 V VI = 5.5 V VCC = 5.5 V VI = 0 V VCC = 5.5 V VO = 12 V ICC VOH VOL VT+–VT– IIZH IIZL IOZH Limits Typ. 0.5 0.5 Min. 2.4 Max. 300 0.4 3.0 1.3 1.3 Symbol Parameter Test conditions Unit Power source current HIGH output voltage R, G, B, OUT, D-A, P10–P17, P20–P27, P30, P31 LOW output voltage R, G, B, OUT, D-A, P00–P07, P10–P17, P20–P23, P30–P32 LOW output voltage P2 4–P27 Hysteresis RESET Hysteresis (Note) H SYNC , VSYNC , TIM2, TIM3, INT1, INT2, INT3, S IN, SCLK HIGH input leak current RESET, P00–P07, P10–P17, P20–P27, P30–P34, HSYNC , VSYNC LOW input leak current RESET, P00–P07, P10–P17, P20–P27, P30–P34, HSYNC , VSYNC HIGH output leak current P0 0–P05 CRT ON CRT OFFSystem operation Stop mode Note:P06, P07, P15, P23, P24 have the hysteresis when these pins are used as interrupt input pins or timer input pins. P20–P2 2 have the hysteresis when these pins are used as serial I/O pins.

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER A-D COMPARATOR CHARACTERISTICS (VCC = 5 V ± 10 %, VSS = 0 V, f(XIN) = 8 MHz, Ta = –10 °C to 70 °C, unless otherwise noted) Resolution Absolute accuracy Max. bits LSB Min. Limits Typ. UnitTest conditionsParameterSymbol Note: When VCC = 5 V, 1 LSB = 5/64 V. D-A CONVERTER CHARACTERISTICS (VCC = 5 V ± 10 %, VSS = 0 V, f(XIN) = 8 MHz, Ta = –10 °C to 70 °C, unless otherwise noted) Resolution Absolute accuracy Setting time Output resistor Max. bits µs kΩ Min. Limits Typ. 2.5 UnitTest conditionsParameterSymbol tsu R O

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER

GZZ–SH11–11B < 6XA0 >

740 FAMILY MASK ROM CONFIRMATION FORM

SINGLE-CHIP MICROCOMPUTER M37224M3-XXXSP MITSUBISHI ELECTRIC Mask ROM number Date : Supervisorsignature Receipt Section headsignature h Customer Company name Date issued Date : TEL ( ) Note : Please fill in all items marked h . Submitted by Supervisor Issuance signature h 1. Confirmation Specify the name of the product being ordered and the type of EPROMs submitted. Three EPROMs are required for each pattern. If at least two of the three sets of EPROMs submitted contain identical data, we will produce masks based on this data. We shall assume the responsibility for errors only if the mask ROM data on the products we produce differs from this data. Thus, extreme care must be taken to verify the data in the submitted EPROMs. Checksum code for entire EPROM (hexadecimal notation) 27C101 EPROM address

000016 Product name

ASCII code : ‘M37224M3 –’000F16 FFFF 16 Set “FF16” in the shaded area. Write the ASCII codes that indicate the product name of “M37220M3–” to addresses 000016 to 000F16. (1) (2) EPROM type (indicate the type used) D000 16 Character ROM 1 107FF 16 h 2. Mark specification Mark specification must be submitted using the correct form for the type of package being ordered. Fill out the appropriate mark specification form (42P4B for M37224M3-XXXSP) and attach to the mask ROM confirmation form. Is “FF16” in the shaded area ? Are the ASCII codes that indicates the product name of “M37224M3–” to addresses 000016 to 000F16 ? EPROM data check item (confirm the EPROM data and check “3 ” the appropriate box) fi Yes fi Yes l l 1000016 10FFF 16 data ROM 12K bytes 1080016 Character ROM 2 1100016 1FFFF 16 h 3. Comments (1/3) M37224M3-XXXSP MITSUBISHI MICROCOMPUTERS SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER GZZ–SH11–22B <6XA0 > SINGLE-CHIP MICROCOMPUTER M37224M3-XXXSP MITSUBISHI ELECTRIC ‘M’= 164D 16‘3’= 33 16‘7’= 37 16‘2’= 32 16‘2’= 32 16‘4’= 34 16‘M’= 4D 16‘3’= 33 000016 000116 000216 000316 000416 000516 000616 000716 Address ‘–’= 162D 16FF 16FF 16FF 16FF 16FF 16FF 16FF 000816 000916 000A 16 000B 16 000C 16 000D 16 000E 16 000F16 Address Addresses 000016 to 000F16 store the product name, and addresses 1000016 to 10FFF16 store the character pattern. If the name of the product contained in the EPROMs does not match the name on the mask ROM confirmation form, the ROM processing is disabled. Please make sure the data is written correctly. How to input the name of the product with the ASCII code ASCII codes ‘M37224M3-’ are listed on the right. The addresses and data are in hexadecimal notation. Inputting the character ROM Input the character ROM data by dividing it into character ROM1 and character ROM2. For the character ROM data, see the next page and on. How to Write the Product Name and Character ROM Data onto EPROMs (2/3)

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER GZZ–SH11–22B< 6XA0 > SINGLE-CHIP MICROCOMPUTER M37224M3-XXXSP MITSUBISHI ELECTRIC The structure of character ROM (divided of 125 16 dots font) Example Character code “1A16” ÜÜ Example 101A0 16 to 101AF 16 b7 b6 b5 b4 b3 b2 b1 b0 b7 b6 b5 b4 b3 b2 b1 b0 A B C D E F A B C D E F F016 F016 F016 F016 F016 F016 F016 F016 F816 F816 F816 F416 F416 F416 F016 F016 Example 109A0 16 to 109AF 16 Character ROM1 Character ROM2 F16 016 416 A16 116 0416 A16 116 116 016 016 F16 016 016 016 016 016 (3/3)

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER 42P4B (42-PIN SHRINK DIP) MARK SPECIFICATION FORM

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Outline 42P4B P06/INT2/A-D4 X OUT H SYNC VSYNC P00/PWM0 P01/PWM1 P02/PWM2 P03/PWM3 P04/PWM4 P05/PWM5 P07/INT1 P23/TIM3 P24/TIM2 P25 P26 P27 D-A P32 CNV SS XIN VSS RESET P52/R P53/G P54/B P55/OUT P20/SCLK P21/SOUT P22/SIN P10 P11 P12 P13 P14 P16/A-D2 P30/A-D5/DA1 P31/A-D6/DA2 OSC1/P3 3 OSC2/P3 4 VCC P17/A-D3 M37224M3-XXXSP P15/A-D1/INT3 APPENDIX Pin Configuration (TOP VIEW)

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Memory Map 000016 00C0 16 00FF 16 013F16 06B3 16 D000 16 SFR area Not used Not used FFFF 16 FFDE 16 FF00 16 060016 Interrupt vector area Not used 1000016 10FFF 16 1FFFF 16 ROM for display (4K bytes) Special page ROM (12K bytes) RAM for display (Note) (80 bytes) Zero pageRAM (256 bytes) Note: Refer to Table 8. Contents of CRT display RAM. ROM correction memory (RAM) Block 1: addresses 02C016 to 02DF16 Block 2: addresses 02E016 to 02FF16 021716 021B 16 02C0 16 02FF 16 2 page register Not used Not used

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Memory Map of Special Function Register (SFR) n SFR Area (addresses C016 to DF16) D0 16 D1 16 D2 16 D3 16 D4 16 D5 16 D6 16 D7 16 D8 16 D9 16 DA 16 DB 16 DC 16 DD 16 DE 16 DF 16 C0 16 C1 16 C2 16 C3 16 C4 16 C5 16 C6 16 C7 16 C8 16 C9 16 CB 16 CC 16 CD 16 CE 16 CF 16 CA 16 Address Port P5 (P5) Port P5 direction register (D5) Port P3 output mode control register (P3S) DA-H register (DA-H) DA-L register (DA-L) PWM0 register (PWM0) Port P1 (P1) Port P1 direction register (D1) Port P3 (P3) Port P3 direction register (D3) Port P2 (P2) Port P2 direction register (D2) Register Port P0 (P0) Port P0 direction register (D0) PWM1 register (PWM1) PWM2 register (PWM2) PWM3 register (PWM3) PWM4 register (PWM4) PWM output control register 1 (PW) PWM output control register 2 (PN) Serial I/O mode register (SM) Serial I/O regsiter (SIO) DA1 conversion register (DA1) DA2 conversion register (DA2) P30SP31S PW0PW1PW2PW3PW4PW5PW6PW7 PN2PN3PN4 SM0SM1SM2SM3SM5SM6 0016 0016 0016 00 ???? ? ? DA1SDA2S DA10DA11DA12DA13DA14DA15 DA20DA21DA22DA23DA24DA25 DA17 DA27 0016 0016 0016 0016 0016 b7 b0 Bit allocation State immediately after reset b7 b0 : “0” immediately after reset : Undefined immediately after reset <State immediately after reset > : “1” immediately after reset : Fix this bit to “0” (do not write “1”) <Bit allocation> Function bit : No function bit : Fix this bit to “1” (do not write “0”) Name :

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER HR0HR1HR2HR3HR4HR5 CV10CV11CV12CV13CV14CV15CV16 CV20CV21CV22CV23CV24CV25CV26 CS10CS11CS20CS21 MD10MD20 CO01CO02CO03CO05 CO11CO12CO13CO15 CO21CO22CO23CO25 CO31CO32CO33CO35 CC0CC1CC2 VSYCR/G/BOUTOP5OP6OP7 HSYC CK0CK1 ADM0ADM1ADM2ADM4 ADC0ADC1ADC2ADC4 ADC3ADC5 T34M0T34M1T34M2T34M3T34M4 T12M0T12M1T12M2T12M3T12M4 CK0RE5 RE4 RE3 CM2 TM1RTM2RTM3RTM4RCRTRVSCRIT3R CK0MSR IT1RIT2RS1R TM1ETM2ETM3ETM4ECRTEVSCEIT3E IT1EIT2ES1EMSE T34M5 CK0 ????00 00 ??00 00 0 0 0016 ?00 000 00 FF16 0716 FF16 0716 00 00 ? 00 0000 00 00 0016 11 11 0016 0016 0016 0016 0016 0016 0016 0016 0016 0016 00 0 0016 FC 16 0016 0016 0016 0016 b7 b0 Bit allocation State immediately after reset b7 b0 : “0” immediately after reset : Undefined immediately after reset <State immediately after reset> : “1” immediately after reset : Fix this bit to “0” (do not write “1”) <Bit allocation> Function bit : No function bit : Fix this bit to “1” (do not write “0”) Name : F016 F116 F216 F316 F416 F516 F616 F716 F816 F916 FA 16 FB 16 FC 16 FD 16 FE 16 FF16 E016 E116 E216 E316 E416 E516 E616 E716 E816 E916 EB 16 EC 16 ED 16 EE 16 EF 16 EA 16 Address CRT control register (CO) CRT port control register (CRTP) A-D control register 1 (AD1) A-D control register 2 (AD2) Timer 1 (TM1) Vertical register 1 (CV1) Color register 0 (CO0) Color register 1 (CO1) Character size register (CS) Border selection register (MD) Register Horizontal register (HR) Vertical register 1 (CV1) Timer 2 (TM2) Timer 3 (TM3) Timer 4 (TM4) Timer 12 mode register (T12M) Timer 34 mode register (T34M) PWM5 register (PWM5) Interrupt input polarity register (RE) Test register (TEST) Interrupt request register 1 (IREQ1) Interrupt request register 2 (IREQ2) Interrupt control register 1 (ICON1) Interrupt control register 2 (ICON2) Color register 2 (CO2) Color register 3 (CO3) CRT clock selection register (CK) CPU mode register (CPUM) n SFR Area (addresses E016 to FF16)

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER 21716 21816 21916 21A16 21B16 Address Register ROM correction address 1 (high-order) n SFR Area (addresses 21716 to 21B16) ROM correction address 1 (low-order) ROM correction address 2 (high-order) ROM correction address 2 (low-order) ROM correction enable register (RCR) 00RC1RC0 0016 0016 0016 0016 ??? ?00 0 b7 b0 Bit allocation State immediately after reset b7 b0 : “0” immediately after reset : Undefined immediately after reset <State immediately after reset> : “1” immediately after reset : Fix this bit to “0” (do not write “1”) <Bit allocation> Function bit : No function bit : Fix this bit to “1” (do not write “0”) Name :

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Internal State of Processor Status Register and Program Counter at Reset b7 b0 b7 b0 Register Processor status register (PS) Bit allocation State immediately after reset Program counter (PCH ) Program counter (PCL) Contents of address FFFF16 Contents of address FFFE16 : “0” immediately after reset : Undefined immediately after reset <State immediately after reset> : “1” immediately after reset : Fix this bit to “0” (do not write “1”) <Bit allocation> Function bit : No function bit : Fix this bit to “1” (do not write “0”) Name :

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Structure of Register The figure of each register structure describes its functions, contents at reset, and attributes as follows: Values immediately after reset release Bit attributes (Note 1) (Note 2)Bits 2: Bit attributes••••••The attributes of control register bits are classified into 3 types : read-only, write-only and read and write. In the figure, these attributes are represented as follows : : Bit in which nothing is assigned Notes 1: Values immediately after reset release ?••••••Indeterminate after reset release cannot be set. b7b6 b5b4b3 b2b1b0 B After resetRW CPU Mode Register 0, 1 3, 4 Name Functions Processor mode bits (CM0, CM1) 0 0: Single-chip mode 0 1: 1 0: Not available 1 1: Fix these bits to “1.” 0Stack page selection bit (Note) (CM2) b1 b0 0: 0 page 1: 1 page 10 0 5 1Nothing is assigned. This bit is write disable bit. When this bit is read out, the value is “0.” 6, 7 0Clock switch bits (CM6, CM7) 0 0: f(XIN) = 8 MHz 0 1: f(XIN) = 12 MHz 1 0: f(XIN) = 16 MHz 1 1: Do not set b7 b6 CPU mode register (CPUM) (CM) [Address FB16] RW RW RW RW RW

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER b7 b6 b5 b4 b3 b2 b1 b0 Port P3 direction register (D3) [Address 00C716] B Name Functions After resetRW Port P3 Direction Register 0 0 : Port P3 0 input mode 1 : Port P30 output mode 1 0 : Port P31 input mode 1 : Port P31 output mode 2 0 : Port P3 2 input mode 1 : Port P32 output mode Port P3 direction register Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” RW RW RW R—3 to b7 b6 b5 b4 b3 b2 b1 b0 Port Pi direction register (Di) (i=0,1,2) [Addresses 00C116, 00C3 16, 00C516] B Name Functions After resetR W Port Pi Direction Register 0 0 : Port Pi 0 input mode 1 : Port Pi0 output mode 1 0 : Port Pi1 input mode 1 : Port Pi1 output mode 2 0 : Port Pi2 input mode 1 : Port Pi2 output mode 3 0 : Port Pi 3 input mode 1 : Port Pi3 output mode 4 0 : Port Pi 4 input mode 1 : Port Pi4 output mode 5 0 : Port Pi 5 input mode 1 : Port Pi5 output mode 6 0 : Port Pi 6 input mode 1 : Port Pi6 output mode 7 0 : Port Pi7 input mode 1 : Port Pi7 output mode Port Pi direction register RW RW RW RW RW RW RW RW Port Pi Direction Register Port P3 Direction Register Addresses 00C116, 00C316, 00C516 Address 00C716

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER b7 b6 b5 b4 b3 b2 b1 b0 Port P3 output mode control register (P3S) [address 00CD16] B Name Functions After resetR W Port P3 Output Mode Control Register 0 0 : CMOS output 1 : N-channel open-drain output 1 0 to P30 output structure selection bit (P30S) P31 output structure selection bit (P31S) Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” 0 : CMOS output 1 : N-channel open-drain output 1 : DA1 output 1 : DA2 output RW RW RW RW Port P5 Direction Register Port P3 Output Mode Control Register b7 b6 b5 b4 b3 b2 b1 b0 Port P5 direction register (D5) [Address 00CB16] B Name Functions After resetRW Port P5 Direction Register 0, 1, 6, 7 0 : CRT output (R) 1 : Output port P52 to 0 : CRT output (G) 1 : Output port P53 0 : CRT output (B) 1 : Output port P54 Port P5 direction register Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” 0 : CRT output (OUT) 1 : Output port P55 RW RW RW RW Addresses 00CB 16 Address 00CD 16

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER b7b6 b5b4b3 b2b1b0 PWM output control register 1 (PW) [Address 00D5 B After resetRW PWM Output Control Register 1 Name Functions DA, PWM count source selection bit (PW0) 0 : Count source supply 1 : Count source stop P00/PWM0 output selection bit (PW2) 0: P00 output 1: PWM0 output P01/PWM1 output selection bit (PW3) 0: P01 output 1: PWM1 output P02/PWM2 output selection bit (PW4) 0: P02 output 1: PWM2 output selection bit (PW5) 0: P03 output 1: PWM3 output selection bit (PW6) 0: P04 output 1: PWM4 output DA/PN4 output selection bit (PW1) 0 : DA output 1 : PN4 output selection bit (PW7) 0: P05 output 1: PWM5 output 16] RW RW RW RW RW RW RW RW b7b6 b5b4b3 b2b1b0 PWM output control register 2 (PN) [Address 00D6 B After resetRW PWM Output Control Register 2 0, 1 Name Functions DA output polarity selection bit (PN3) 0 : Positive polarity 1 : Negative polarity PWM output polarity selection bit (PN4) Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” DA general-purpose output bit (PN5) 0 : Output LOW 1 : Output HIGH to 0Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” 0 : Positive polarity 1 : Negative polarity 16] RW RW RW PWM Output Control Register 1 PWM Output Control Register 2 Address 00D516 Address 00D616

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER b7b6 b5b4b3 b2b1b0 Serial I/O mode register (SM) [Address 00DC16] B Name Functions After resetRW Serial I/O Mode Register 0, 1Internal synchronous clock selection bits (SM0, SM1) b1 b0 0 0: f(XIN)/4 0 1: f(XIN)/16 1 0: f(XIN)/32 1 1: f(XIN)/64 selection bit (SM2) selection bit (SM3) selection bit (SM5) 7 0 0: P20, P21 functions as port 1: SCLK , SOUT 0: External clock 1: Internal clock 0: LSB first 1: MSB first Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is “0.” Fix this bit to “0.” Serial input pin selection bit (SM6) 0: Input signal from SIN pin 1: Input signal from SOUT pin RW RW RW RW RW RW DAi Conversion Register Serial I/O Mode Register b7 b6 b5b4 b3 b2b1 b0 DAi conversion register (DAi) (i = 1 and 2) [Address 00DE16, 00DF16] B After reset R W DAi Conversion Register 0 to 5, Indeterminate Name Functions DA conversion set bits (DAi0 to DAi5) b0b1b2 b3 b4 b5 Fix this bit to “0.” 000000 00000 0000 111 11111 111111 : 1/128Vcc : 2/128Vcc : 125/128Vcc : 126/128Vcc : 127/128Vcc : 0/128Vcc RW RW Address 00DC 16 Addresses 00DE16, 00DF16

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER b7 b6 b5 b4 b3 b2 b1 b0 Horizontal position register (HR) [Address 00E016] B Name Functions After resetRW Horizontal Position Register 0to 6, 7 Horizontal display start positions (HR0 to HR5) 64 steps (0016 to 3F16) 0 0Nothing is assigned. These bits are write disable bits. When thses bits are read out, the values are “0.” RW b7 b6 b5 b4 b3 b2 b1 b0 Vertical position register i (CVi) (i = 1 and 2) [Addresses 00E116, 00E216] B Name Functions After reset R W Vertical Position Register i to Vertical display start positions128 steps (0016 to 7F16) Indeterminate (CVi : CVi0 to CVi6) Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is “0.” RW Horizontal Position Register Vertical Position Register i b7 b6 b5 b4 b3 b2 b1 b0 Character size register (CS) [Address 00E416] B Name Functions After resetR W Character Size Register 0, 1 Character size of block 1 selection bits (CS10, CS11) 00 : Minimum size 01 : Medium size 10 : Large size 11 : Do not set. Indeterminate 2,3 to7 Character size of block 2 selection bits (CS20,CS21) 00 : Minimum size 01 : Medium size 10 : Large size 11 : Do not set. Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” Indeterminate RW RW Character Size Register Address 00E116, 00E216 Address 00E416 Address 00E016

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER Border Selection Register Color Register i b7 b6 b5 b4 b3 b2 b1 b0 Border selection register (MD) [Address 00E516] B Name Functions After resetR W Border Selection Register border selection bit (MD10) 0 : Same output as R, G, B is output 1 : Border output Indeterminate 1 0 border selection bit (MD20) 0 : Same output as R, G, B is output 1 : Border output 03to Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is “0.” Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” Indeterminate RW RW b7 b6 b5 b4 b3 b2 b1 b0 Color register i (COi) (i = 0 to 3) [Addresses 00E616 to 00E916] B Name Functions After resetR W Color Register i 0 0 selection bit (COi1) 0 : No character is output 1 : Character is output selection bit (COi2) 0 : No character is output 1 : Character is output selection bit (COi3) 0 : No character is output 1 : Character is output 6, 7 control bit (COi5) 0 : Character is output 1 : Blank is output Fix this bit to “0.” R — RW RW RW RW Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” Address 00E516 Addresses 00E616 to 00E916

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER CRT Control Register CRT Port Control Register b7 b6 b5 b4 b3 b2 b1 b0 CRT control register (CC) [Address 00EA16] B Name Functions After resetR W CRT Control Register bit (CC0) (See note) 0 : All-blocks display off 1 : All-blocks display on (CC1) 0 : Block 1 display off 1 : Block 1 display on 2 0 : Block 2 display off 1 : Block 2 display on to Note: Display is controlled by logical product (AND) between the all-blocks display control bit and each block control bit. Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” Block 2 display control bit (CC2) RW RW RW b7 b6 b5 b4 b3 b2 b1 b0 CRT port control register (CRTP) [Address 00EC16] B Name Functions After resetR W CRT Port Control Register 0H SYNC input polarity switch bit (HSYC) 0 : Positive polarity 1 : Negative polarity 1 0 : Positive polarity 1 : Negative polarity bit (R/G/B) 0 : Positive polarity 1 : Negative polarity 3 Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is “0.” switch bit (OUT) 0 : Positive polarity 1 : Negative polarity (OP5) 0 : R signal output 1 : MUTE signal output (OP6) 0 : G signal output 1 : MUTE signal output (OP7) 0 : B signal output 1 : MUTE signal output VSYNC input polarity switch bit (VSYC) RW RW RW RW RW RW RW Address 00EA16 Address 00EC16

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER b7 b6 b5 b4 b3 b2 b1 b0 CRT clock selection register (CK) [Address 00ED B Name Functions After reset R W CRT Clock Selection Register 0, 1 CRT clock selection bits (CK0,CK1) Since the main clock is used as the clock for display, the oscillation frequency is limited. Because of this, the character size in width (horizontal) direction is also limited. In this case, pins OSC1 and OSC2 are also used as input ports P33 and P34 respectively. The clock for display is supplied by connecting the following across the pins OSC1 and OSC2.

• a ceramic resonator only for CRT display and a feedback resistor
• a quartz-crystal oscillator only for CRT display and a feedback resistor (Note) to 000000 The clock for display is supplied by connecting RC or LC across the pins OSC1 and OSC2. Functions CRT oscillation frequency = f(XIN) CRT oscillation frequency = f(XIN)/1.5 Note: It is necessary to connect other ceramic resonator or quartz-crystal oscillator across the pins X 1 1 Fix these bits to “0.” IN and XOUT . 16] RW RW CRT Clock Selection Register A-D Control Register 1 b7 b6 b5 b4 b3 b2 b1 b0 A-D control register 1 (AD1) [Address 00EE16] B After resetRW A-D Control Register 1 to Analog input pin selection bits (ADM0 to ADM2) Name Functions b2 b1 b0 0 0 0 : A-D1 0 0 1 : A-D2 0 1 0 : A-D3 0 1 1 : A-D4 1 0 0 : A-D5 1 0 1 : A-D6 1 1 0 : 1 1 1 :

result (ADM4) 0: Input voltage < reference voltage 1: Input voltage > reference voltage Indeterminate Do not set. 5 to 7 Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” RW Address 00ED16 Address 00EE16

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER b7 b6 b5 b4 b3 b2 b1 b0 A-D control register 2(AD2) [Address 00EF16] B After resetRW A-D Control Register 2 to 6, 7 Name Functions D-A converter set bits (ADC0 to ADC5) b0b1b2 b3 b4 b5 Nothing is assigned. These bits are write disable bits. When these bits are reed out, the values are “ 0.” 000000 00000 0000 111 11111 111111 : 3/128Vcc : 5/128Vcc : 123/128Vcc : 125/128Vcc : 127/128Vcc : 1/128Vcc RW b7b6 b5b4b3 b2b1b0 Timer 12 mode register (T12M) [Address 00F416] B After reset W Timer 12 Mode Register 5 0 Name Functions Timer 1 count source selection bit (T12M0) 0: f(XIN)/16 1: f(XIN)/4096 Timer 2 count source selection bit (T12M1) 0: Internal clock 1: External clock from TIM2 pin Timer 1 count stop bit (T12M2) 0: Count start 1: Count stop Timer 2 count stop bit (T12M3) 0: Count start 1: Count stop Timer 2 internal count source selection bit (T12M4) 0: f(XIN)/16 1: Timer 1 overflow Fix this bit to “0.” R 6,7 0Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” WR WR WR WR WR WR A-D Control Register 2 Timer 12 Mode Register Address 00EF16 Address 00F416

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER b7b6 b5b4b3 b2b1b0 Timer 34 mode register (T34M) [Address 00F516] B After resetRW Timer 34 Mode Register 6,7 0 Name Functions Timer 3 count source selection bit (T34M0) 0: f(XIN)/16 1: External clock Timer 4 internal count source selection bit (T34M1) 0: Timer 3 overflow 1: f(XIN)/16 Timer 3 count stop bit (T34M2) 0: Count start 1: Count stop Timer 4 count stop bit (T34M3) 0: Count start 1: Count stop Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” selection bit (T34M4) 0: Internal clock 1: f(XIN)/2 source selection bit (T34M5) 0: External clock from TIM3 pin 1: External clock from HSYNC pin RW RW RW RW RW RW Timer 34 Mode Register Interrupt Input Polarity Register b7 b6 b5 b4 b3 b2 b1 b0 Interrupt input polarity register(RE) [Address 00F916] B Name Functions After reset R W Interrupt Input Polarity Register INT1 polarity switch bit (RE3) 1, 2 0 0 : Positive polarity 1 : Negative polarity 0 : Positive polarity 1 : Negative polarity 0 : Positive polarity 1 : Negative polarity 000 INT2 polarity switch bit (RE4) INT3 polarity switch bit (RE5) Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is indeterminate. Fix these bits to “0.” Fix this bit to “0.” Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is “0.” Indeterminate R— RW RW RW RW RW Address 00F516 Address 00F916

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER b7b6 b5b4b3 b2b1b0 B After resetRW CPU Mode Register 0, 1 to Name Functions Processor mode bits (CM0, CM1) 0 0: Single-chip mode 0 1: 1 0: Not available 1 1: Fix these bits to “1.” 1Stack page selection bit (CM2) (See note) b1 b0 0: 0 page 1: 1 page 10 0 CPU mode register (CPUM (CM)) [Address FB16] RW RW RW Note: This bit is set to “1” after the reset release. 111 b7b6 b5b4b3 b2b1b0 Interrupt request register 1 (IREQ1) [Address 00FC B Name Functions After resetRW Interrupt Request Register 1 0 0 : No interrupt request issued 1 : Interrupt request issued Timer 1 interrupt request bit (TM1R) request bit (TM2R) request bit (TM3R) request bit (TM4R) request bit (CRTR) 5V SYNC interrupt request bit (VSCR) 0 : No interrupt request issued 1 : Interrupt request issued 0 : No interrupt request issued 1 : Interrupt request issued 0 : No interrupt request issued 1 : Interrupt request issued 0 : No interrupt request issued 1 : Interrupt request issued 0 : No interrupt request issued 1 : Interrupt request issued 0 ] 0 ] 0 ] 0 ] 0 ] 0 ] INT3 interrupt request bit (IT3R) 0 : No interrupt request issued 1 : Interrupt request issued 16] R R R R R R R 6 Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is “0.” —R0 CPU Mode Register Interrupt Request Register 1 Address 00FB16 Address 00FC16

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER b7b6 b5b4b3 b2b1b0 Interrupt request register 2 (IREQ2) [Address 00FD B Name Functions After resetRW Interrupt Request Register 2 request bit (ITIR) 0 : No interrupt request issued 1 : Interrupt request issued request bit (IT2R) request bit (SIR) 4 f(XIN)/4096 interrupt request bit (MSR) 5, 6 Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” 7 Fix this bit to “0.” 0 0 : No interrupt request issued 1 : Interrupt request issued 0 : No interrupt request issued 1 : Interrupt request issued ] : “0” can be set by software, but “1” cannot be set. 0 ] 0 ] 0 ] 0 ] 0 : No interrupt request issued 1 : Interrupt request issued 16] R R R R RW b7b6 b5b4b3 b2b1b0 Interrupt control register 1 (ICON1) [Address 00FE16] B Name Functions After resetRW Interrupt Control Register 1 enable bit (TM1E) 0 : Interrupt disabled 1 : Interrupt enabled enable bit (TM2E) enable bit (TM3E) (CRTE) 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 RW RW RW RW RW R Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is “0.” Timer 4 interrupt enable bit (TM4E) 0 : Interrupt disabled 1 : Interrupt enabled bit (VSCE) 0 : Interrupt disabled 1 : Interrupt enabled 0R W INT3 interrupt enable bit (IN3E) 0 : Interrupt disabled 1 : Interrupt enabled W Interrupt Request Register 2 Interrupt Control Register 1 Address 00FD16 Address 00FE16

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER b7 b6 b5 b4 b3 b2 b1 b0 ROM correction enable register (RCR) [Address 021B16] B ROM Correction Enable Register 0: Disabled 1: Enabled 1: Enabled to Nothing is assigned. These bits are write disable bits. When these bits are read out, the values are “0.” RW RW RW 2,3 Fix these bits to “0.” 0 RW After reset Interrupt Control Register 2 ROM Correction Enable Register b7b6 b5b4b3 b2b1b0 Interrupt control register 2 (ICON2) [Address 00FF16] B Name Functions After resetRW Interrupt Control Register 2 enable bit (IT1E) 0 : Interrupt disabled 1 : Interrupt enabled bit (IT2E) enable bit (SIE) 5 to 7 Fix these bits to “0.” 4 f(XIN)/4096 interrupt enable bit (MSE) 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 00 0 0 RW RW RW RW RW Address 00FF16 Address 021B16

© 1997 MITSUBISHI ELECTRIC CORP. New publication, effective Nov. 1997. Specifications subject to change without notice. Notes regarding these materials

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• Mitsubishi Electric Corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use.
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Rev. Rev. No. date

1.0 First Edition 9708

2.0 Information about copywright note, revision number, release data added (last page). 971130

2.1 Correct note (P43) 980731

M37221EF-XXXSP, M37221EFSP DATA SHEET (1/1) Revision Description REVISION DESCRIPTION LIST