M35047-XXXSP integrated circuit reference — Local datasheet available

IC

M35047-XXXSP

Mitsubishi Electric Sem...

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

Manufacturer: Mitsubishi Electric Sem...

Document: 50 Pages / 416Kb

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M35047-XXXSP MITSUBISHI | Alldatasheet

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Technical content

DESCRIPTION

The M35047-XXXSP/FP is a character pattern display control IC can display on the CRT display the liquid crystal display and the plasma display. It uses a silicon gate CMOS process and it housed in a 20-pin shrink DIP package (M35047-XXXSP) or a 20- pin shrink SOP package (M35047-XXXFP). For M35047-002SP/FP that is a standard ROM version of M35047-XXXSP/FP respectively, the character pattern is also mentioned.

FEATURES

RAM character:8 characters

Display locations available Cycle : division of vertical synchronization signal into 32 or 64 Duty : 25%, 50%, or 75%
Coloring for ROM character character unit)
Blanking for ROM character Character size blanking Border size blanking Matrix-outline blanking All blanking (all raster area)
Blanking for RAM character Character size blanking Matrix-outline blanking All blanking (all raster area)
Output ports 4 shared output ports (toggled between RGB output) 4 dedicated output ports
Display RAM erase function
Horizontal synchronous input frequency
Display oscillation stop function APPLICATION CRT display, Liquid crystal display, Plasma display Outline 20P4B PIN CONFIGURATION (TOP VIEW) Outline 20P2Q-A MITSUBISHI MICROCOMPUTERS M35047-XXXSP/FP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS Rev.1.1 CPOUT VSS2 AC TEST SCL SDA TCK VDD1 M35047-XXXSP VDD2 VERT HOR P5/B P3/G P1/R P0/BLNK0 VSS1 M35047-XXXFP CPOUT VSS2 AC TEST SCL SDA TCK VDD1 VDD2 VERT HOR P5/B P3/G P1/R P0/BLNK0 VSS1

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS Symbol CPOUT VSS2 AC TEST SCL SDA TCK VDD1 VSS1 P0/BLNK0 P1/R P3/G P5/B HOR VERT VDD2 Input/ Output Output Input Input Input I/O Input Output Output Output Output Output Output Output Output Input Input Function Filter output. Connect loop filter to this pin. Connect to GND. When “L”, this pin resets the internal IC circuit. Hysteresis input. Built-in pull-up resistor. Test pin. Connect to +5V. SDA pin serial data is taken in when SCL rises. Hysteresis input. This is the pin for serial input of display control register and display RAM data. Also, this pin output acknowledge signal. Hysteresis input. Nch opendrain output. This is the pin for external clock input. Please connect to +5V with the power pin. This is the output port. This is the output port. Please connect to GND using circuit earthing pin. This pin can be toggled between port pin output and BLNK0 signal output. This pin can be toggled between port pin output and R signal output. This is the output port. This pin can be toggled between port pin output and G signal output. This is the output port. This pin can be toggled between port pin output and B signal output. This pin inputs the horizontal synchronous signal. Hysteresis input. This pin inputs the vertical synchronous signal. Hysteresis input. Please connect to +5V with the power pin. Pin name Filter output Earthing pin Auto-clear input Test input Clock input Data I/O External clock Power pin Port P6 output Port P7 output Earthing pin Port P0 output Port P1 output Port P2 output Port P3 output Port P4 output Port P5 output Horizontal synchro- nous signal input Vertical synchro- nous signal input Power pin Pin Number PIN DESCRIPTION

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS BLOCK DIAGRAM SCL SDA VDD1 VDD2 AC VSS1 VSS2 TEST Clock oscillation circuit display Timing generator Polarity switching circuit Address control circuit Data control circuit Display control register Display RAM Shift register Blinking circuit Reading address control circuit Display location detection circuit H counter TCK CPOUT HOR VERT Synchronous signal switching circuit Display control circuit Port output control circuit P0/BLNK0 P1/R P3/G P5/B Input control circuit Polarity switching circuit Display character RAM Display character ROM

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0 BB BG BR BLINK B G R BB BG BR BLINK B G R BB BG BR BLINK B G R BB BG BR BLINK B G R SPACE2 SPACE1 SPACE0 TEST10 DIV10 DIV9 DIV8 DIV7 DIV6 DIV5 DIV4 DIV3 DIV2 DIV1 DIV0 EXCK1 EXCK0 RSEL1 RSEL0 DIVS2 DIVS1 DIVS0 PTC7 PTC6 PTC5 PTC4 PTC3 PTC2 PTC1 PTC0 TEST17 TEST16 TEST15 TEST14 TEST13 TEST12 TEST11 PTD7 PTD6 PTD5 PTD4 PTD3 PTD2 PTD1 PTD0 TEST3 TEST2 TEST1 TEST0 HP10 HP9 HP8 HP7 HP6 HP5 HP4 HP3 HP2 HP1 HP0 TEST20 RBLK0 TEST19 TEST18 VP10 VP9 VP8 VP7 VP6 VP5 VP4 VP3 VP2 VP1 VP0 TEST23 TEST22 TEST21 DSP11 DSP10 DSP9 DSP8 DSP7 DSP6 DSP5 DSP4 DSP3 DSP2 DSP1 DSP0 TEST24 VSZ1H1 VSZ1H0 VSZ1L1 VSZ1L0 V1SZ1 V1SZ0 LIN9 LIN8 LIN7 LIN6 LIN5 LIN4 LIN3 LIN2 TEST25 VSZ2H1 VSZ2H0 VSZ2L1 VSZ2L0 V18SZ1 V18SZ0 LIN17 LIN16 LIN15 LIN14 LIN13 LIN12 LIN11 LIN10 TEST29 HSZ21 HSZ20 HSZ11 HSZ10 BETA14 TEST28 TEST27 TEST26 FB FG FR RB RG RR TEST30 BLINK2 BLINK1 BLINK0 DSPON STOP RAMERS SYAD BLK1 BLK0 POLH POLV VMASK B/F BCOL MEMORY CONSTITUTION Address 00016 to 11F16 are assigned to the display RAM, address 12016 to 12916 are assigned to the display control registers and address 20016 to 2F116 are assigned to the RAM characters. The internal circuit is reset and all display control registers (address 12016 to 12916) are set to "0" when the AC pin level is "L". And then, RAM is not erased and be undefinited. For detail, see "DATA INPUT EXAMPLE". Memory constitution is shown in Figure 1 to 9. Fig.1 Memory constitution (Display RAM, Display Control register) ……… ……… Addresses Background coloring Blink- ing Character color Character code 00016 00116 11E16 11F16 12016 12116 12216 12316 12416 12516 12616 12716 12816 12916

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0 BS GS RS FR000B FR000A FR0009 FR0008 FR0007 FR0009 FR0005 FR0004 FR0003 FR0002 FR0001 FR0000 BS GS RS FR001B FR001A FR0019 FR0018 FR0017 FR0019 FR0015 FR0014 FR0013 FR0012 FR0011 FR0010 BS GS RS FR002B FR002A FR0029 FR0028 FR0027 FR0026 FR0025 FR0024 FR0023 FR0022 FR0021 FR0020 BS GS RS FR003B FR003A FR0039 FR0038 FR0037 FR0036 FR0035 FR0034 FR0033 FR0032 FR0031 FR0030 BS GS RS FR004B FR004A FR0049 FR0048 FR0047 FR0046 FR0045 FR0044 FR0043 FR0042 FR0041 FR0040 BS GS RS FR005B FR005A FR0059 FR0058 FR0057 FR0056 FR0055 FR0054 FR0053 FR0052 FR0051 FR0050 BS GS RS FR006B FR006A FR0069 FR0068 FR0067 FR0066 FR0065 FR0064 FR0063 FR0062 FR0061 FR0060 BS GS RS FR007B FR007A FR0079 FR0078 FR0077 FR0076 FR0075 FR0074 FR0073 FR0072 FR0071 FR0070 BS GS RS FR008B FR008A FR0089 FR0088 FR0087 FR0086 FR0085 FR0084 FR0083 FR0082 FR0081 FR0080 BS GS RS FR009B FR009A FR0099 FR0098 FR0097 FR0096 FR0095 FR0094 FR0093 FR0092 FR0091 FR0090 BS GS RS FR00AB FR00AA FR00A9 FR00A8 FR00A7 FR00A6 FR00A5 FR00A4 FR00A3 FR00A2 FR00A1 FR00A0 BS GS RS FR00BB FR00BA FR00B9 FR00B8 FR00B7 FR00B6 FR00B5 FR00B4 FR00B3 FR00B2 FR00B1 FR00B0 BS GS RS FR00CB FR00CA FR00C9 FR00C8 FR00C7 FR00C6 FR00C5 FR00C4 FR00C3 FR00C2 FR00C1 FR00C0 BS GS RS FR00DB FR00DA FR00D9 FR00D8 FR00D7 FR00D6 FR00D5 FR00D4 FR00D3 FR00D2 FR00D1 FR00D0 BS GS RS FR00EB FR00EA FR00E9 FR00E8 FR00E7 FR00E6 FR00E5 FR00E4 FR00E3 FR00E2 FR00E1 FR00E0 BS GS RS FR00FB FR00FA FR00F9 FR00F8 FR00F7 FR00F6 FR00F5 FR00F4 FR00F3 FR00F2 FR00F1 FR00F0 BS GS RS FR010B FR010A FR0109 FR0108 FR0107 FR0106 FR0105 FR0104 FR0103 FR0102 FR0101 FR0100 BS GS RS FR011B FR011A FR0119 FR0118 FR0117 FR0116 FR0115 FR0114 FR0113 FR0112 FR0111 FR0110 20016 20116 20216 20316 20416 20516 20616 20716 20816 20916 20A16 20B16 20C16 20D16 20E16 20F16 21016 21116 21216 21F16 Address DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0 BS GS RS FR100B FR100A FR1009 FR1008 FR1007 FR1006 FR1005 FR1004 FR1003 FR1002 FR1001 FR1000 BS GS RS FR111B FR111A FR1119 FR1118 FR1117 FR1116 FR1115 FR1114 FR1113 FR1112 FR1111 FR1110 22016 22116 23016 23116 23216 23F16 RAM character 1 data Fig.2 Memory constitution (RAM character 0) Fig.3 Memory constitution (RAM character 1) Can not be used Address Can not be used

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0 BS GS RS FR300B FR300A FR3009 FR3008 FR3007 FR3006 FR3005 FR3004 FR3003 FR3002 FR3001 FR3000 BS GS RS FR311B FR311A FR3119 FR3118 FR3117 FR3116 FR3115 FR3114 FR3113 FR3112 FR3111 FR3110 26016 26116 27016 27116 27216 27F16 28016 28116 29016 29116 29216 29F16 DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0 BS GS RS FR200B FR200A FR2009 FR2008 FR2007 FR2006 FR2005 FR2004 FR2003 FR2002 FR2001 FR2000 BS GS RS FR211B FR211A FR2119 FR2118 FR2117 FR2116 FR2115 FR2114 FR2113 FR2112 FR2111 FR2110 24016 24116 25016 25116 25216 25F16 Fig.6 Memory constitution (RAM character 4) Fig.5 Memory constitution (RAM character 3) Fig.4 Memory constitution (RAM character 2) DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0 BS GS RS FR400B FR400A FR4009 FR4008 FR4007 FR4006 FR4005 FR4004 FR4003 FR4002 FR4001 FR4000 BS GS RS FR411B FR411A FR4119 FR4118 FR4117 FR4116 FR4115 FR4114 FR4113 FR4112 FR4111 FR4510 Address Address Address RAM character 2 data Can not be used RAM character 3 data Can not be used RAM character 4 data Can not be used

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS 2C016 2C116 2D016 2D116 2D216 2DF16 2E016 2E116 2F016 2F116 2A016 2A116 2B016 2B116 2B216 2BF16 DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0 BS GS RS FR700B FR700A FR7009 FR7008 FR7007 FR7006 FR7005 FR7004 FR7003 FR7002 FR7001 FR7000 BS GS RS FR711B FR711A FR7119 FR7118 FR7117 FR7116 FR7115 FR7114 FR7113 FR7112 FR7111 FR7110 Fig.9 Memory constitution (RAM character 7) Fig.8 Memory constitution (RAM character 6) Fig.7 Memory constitution (RAM character 5) Address Address Address RAM character 5 data Can not be used RAM character 6 data Can not be used RAM character 7 data DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0 BS GS RS FR600B FR600A FR6009 FR6008 FR6007 FR6006 FR6005 FR6004 FR6003 FR6002 FR6001 FR6000 BS GS RS FR611B FR611A FR6119 FR6118 FR6117 FR6116 FR6115 FR6114 FR6113 FR6112 FR6111 FR6110 DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 D00 BS GS RS FR500B FR500A FR5009 FR5008 FR5007 FR5006 FR5005 FR5004 FR5003 FR5002 FR5001 FR5000 BS GS RS FR511B FR511A FR5119 FR5118 FR5117 FR5116 FR5115 FR5114 FR5113 FR5112 FR5111 FR5110

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS SCREEN CONSTITUTION The screen lines and rows are determined from each address of the display RAM . The screen constitution is shown in Figure 10. Fig.11 RAM charcter consititution Note. When the RAM character is used, it is necessary to clear all areas of the RAM character first. FRn00B FRn00A FRn009 FRn008 FRn007 FRn006 FRn005 FRn004 FRn003 FRn002 FRn001 FRn000 FRn01B FRn01A FRn019 FRn018 FRn017 FRn016 FRn015 FRn014 FRn013 FRn012 FRn011 FRn010 FRn02B FRn02A FRn029 FRn028 FRn027 FRn026 FRn025 FRn024 FRn023 FRn022 FRn021 FRn020 FRn03B FRn03A FRn039 FRn038 FRn037 FRn036 FRn035 FRn034 FRn033 FRn032 FRn031 FRn030 FRn04B FRn04A FRn049 FRn048 FRn047 FRn046 FRn045 FRn044 FRn043 FRn042 FRn041 FRn040 FRn05B FRn05A FRn059 FRn058 FRn057 FRn056 FRn055 FRn054 FRn053 FRn052 FRn051 FRn050 FRn06B FRn06A FRn069 FRn068 FRn067 FRn066 FRn065 FRn064 FRn063 FRn062 FRn061 FRn060 FRn07B FRn07A FRn079 FRn078 FRn077 FRn076 FRn075 FRn074 FRn073 FRn072 FRn071 FRn070 FRn08B FRn08A FRn089 FRn088 FRn087 FRn086 FRn085 FRn084 FRn083 FRn082 FRn081 FRn080 FRn09B FRn09A FRn099 FRn098 FRn097 FRn096 FRn095 FRn094 FRn093 FRn092 FRn091 FRn090 FRn0AB FRn0AA FRn0A9 FRn0A8 FRn0A7 FRn0A6 FRn0A5 FRn0A4 FRn0A3 FRn0A2 FRn0A1 FRn0A0 FRn0BB FRn0BA FRn0B9 FRn0B8 FRn0B7 FRn0B6 FRn0B5 FRn0B4 FRn0B3 FRn0B2 FRn0B1 FRn0B0 FRn0CB FRn0CA FRn0C9 FRn0C8 FRn0C7 FRn0C6 FRn0C5 FRn0C4 FRn0C3 FRn0C2 FRn0C1 FRn0C0 FRn0DB FRn0DA FRn0D9 FRn0D8 FRn0D7 FRn0D6 FRn0D5 FRn0D4 FRn0D3 FRn0D2 FRn0D1 FRn0D0 FRn0EB FRn0EA FRn0E9 FRn0E8 FRn0E7 FRn0E6 FRn0E5 FRn0E4 FRn0E3 FRn0E2 FRn0E1 FRn0E0 FRn0FB FRn0FA FRn0F9 FRn0F8 FRn0F7 FRn0F6 FRn0F5 FRn0F4 FRn0F3 FRn0F2 FRn0F1 FRn0F0 FRn10B FRn10A FRn109 FRn108 FRn107 FRn106 FRn105 FRn104 FRn103 FRn102 FRn101 FRn100 FRn11B FRn11A FRn119 FRn118 FRn117 FRn116 FRn115 FRn114 FRn113 FRn112 FRn111 FRn110 8 The number in the boxes show the bit address of the RAM character :n. ("n" is RAM number : 0 to 7) Dot Dot RAM Character CONSTITUTION The dot lines and dot rows of the character RAM are determined from each address and bit of the character RAM . The RAM char- acter constitution is shown in Figure 11. Fig.10 Screen constitution 00016 00116 00216 00316 00416 00516 00616 00716 00816 00916 00A16 00B16 00C16 00D16 00E16 00F16 01016 01116 01216 01316 01416 01516 01616 01716 01816 01916 01A16 01B16 01C16 01D16 01E16 01F16 02016 02116 02216 02316 02416 02516 02616 02716 02816 02916 02A16 02B16 02C16 02D16 02E16 02F16 03016 03116 03216 03316 03416 03516 03616 03716 03816 03916 03A16 03B16 03C16 03D16 03E16 03F16 04016 04116 04216 04316 04416 04516 04616 04716 04816 04916 04A16 04B16 04C16 04D16 04E16 04F16 05016 05116 05216 05316 05416 05516 05616 05716 05816 05916 05A16 05B16 05C16 05D16 05E16 05F16 06016 06116 06216 06316 06416 06516 06616 06716 06816 06916 06A16 06B16 06C16 06D16 06E16 06F16 07016 07116 07216 07316 07416 07516 07616 07716 07816 07916 07A16 07B16 07C16 07D16 07E16 07F16 08016 08116 08216 08316 08416 08516 08616 08716 08816 08916 08A16 08B16 08C16 08D16 08E16 08F16 09016 09116 09216 09316 09416 09516 09616 09716 09816 09916 09A16 09B16 09C16 09D16 09E16 09F16 0A016 0A116 0A216 0A316 0A416 0A516 0A616 0A716 0A816 0A916 0AA16 0AB16 0AC16 0AD16 0AE16 0AF16 0B016 0B116 0B216 0B316 0B416 0B516 0B616 0B716 0B816 0B916 0BA16 0BB16 0BC16 0BD16 0BE16 0BF16 0C016 0C116 0C216 0C316 0C416 0C516 0C616 0C716 0C816 0C916 0CA16 0CB16 0CC16 0CD16 0CE16 0CF16 0D016 0D116 0D216 0D316 0D416 0D516 0D616 0D716 0D816 0D916 0DA16 0DB16 0DC16 0DD16 0DE16 0DF16 0E016 0E116 0E216 0E316 0E416 0E516 0E616 0E716 0E816 0E916 0EA16 0EB16 0EC16 0ED16 0EE16 0EF16 0F016 0F116 0F216 0F316 0F416 0F516 0F616 0F716 0F816 0F916 0FA16 0FB16 0FC16 0FD16 0FE16 0FF16 10016 10116 10216 10316 10416 10516 10616 10716 10816 10916 10A16 10B16 10C16 10D16 10E16 10F16 11016 11116 11216 11316 11416 11516 11616 11716 11816 11916 11A16 11B16 11C16 11D16 11E16 11F16 Row Line 8 The hexadecimal numbers in the boxes show the display RAM address.

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS DISPLAY RAM Address 00016 to 11F16 Register Status

Contents

Set the displayed ROM character code. *RAM character is selected using the 8 bits from C7 to C0. When C7 to C0=(111111102) is set. And, RAM character code is set to R, G and B. DA Set display character A B C D E Set blinking See register BLINK2 to BLINK0 (ad- dress12916) Do not blink. Blinking BB R G B BLINK BR BG BB Set character color (character unit) * When set C7 to C0= (111111102), can be set RAM character code. BR BG B R G Color Black Red Green Yellow Blue Magenta Cyan White Color Black Red Green Yellow Blue Magenta Cyan White B R G RAM character code RAM character 0 RAM character 1 RAM character 2 RAM character 3 RAM character 4 RAM character 5 RAM character 6 RAM character 7 ____ Note. The display RAM is undefined state at the AC pin. Set character background color. (character unit) *When set C7 to C0=(111111102) and register RBLK0 (address 12416)= “1”, set coloring prohibition color. Moreover, when the blink is set, the parts other than the color set by this register are blinks. See DISPLAY FORM 2.

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS DA A B C D E REGISTERS DESCRIPTION Register Status <(S) represents space> 1 (S) 10 (S) 1 2 (S) 8 (S) 2 3 (S) 6 (S) 3 4 (S) 4 (S) 4 5 (S) 2 (S) 5 6 (S) 6 6 (S)(S) 6 (S) represents one line worth of space Leave one line worth of space in the ver- tical direction. For example, 6 (S) 6 indicates two sets of 6 lines with a line of spaces between lines 6 and 7. A line is 18 N horizontal scan lines. N is determined by the character size in the vertical direction It should be fixed to "0". Can not be used. SPACE2 Set division value (multiply value) of horizontal oscillation frequency. N1 = N1 : division value (multiply value) Σ n = 0(DIVn 2n) Set display frequency by division value (multiply value) setting. For details, see REGISTER SUPPLEMENTARY DESCRIPTION (1). Also, set the display frequency range by registers DIVS0, DIVS1, DIVS2, RSEL0 and RSEL1(address 12116) in accor- dance with the display frequency. Any of this settings above is required only when EXCK1 = 0, EXCK0 = 1 and EXCK1 = 1, EXCK0 = 1. Note. The mark around the status value means the reset status by the "L" level is input to AC pin. (1) Address 12016

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS (2) Address 12116 Register DA Status P0 output (port P0). BLNK0 output. P1 output (port P1). R signal output. P2 output (port P2). Can not be used. P3 output (port P3). G signal output. P4 output (port P4). Can not be used. P5 output (port P5). B signal output. P6 output (port P6). Can not be used. P7 output (port P7). Can not be used. For setting, see REGISTER SUPPLEMENTARY DESCRIPTION (2). Set display frequency range. EXCK0 Display clock input External synchronous (external clock) Internal synchronous Do not set External synchronous (internal clock) EXCK1 Display clock setting See REGISTER SUPPLEMENTARY DESCRIPTION (1) P0 pin output control. P1 pin output control. P2 pin output control. P3 pin output control. P4 pin output control. P5 pin output control. P6 pin output control. P7 pin output control. A B C D E Note. The mark around the status value means the reset status by the "L" level is input to AC pin.

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS (3) Address 12216 A B C D E Register DA Function "L" output or negative polarity output (BLNK0 output). "H" output or positive polarity output (BLNK0 output). "L" output or negative polarity output (R signal output). "H" output or positive polarity output (R signal output). "L" output. "H" output. "L" output or negative polarity output (G signal output). "H" output or positive polarity output (G signal output). "L" output. "H" output. "L" output or negative polarity output (B signal output). "H" output or positive polarity output (B signal output). "L" output. "H" output. "L" output. "H" output. Can not be used. It should be fixed to "1". It should be fixed to "0". Can not be used. It should be fixed to "0". Can not be used. It should be fixed to "0". Can not be used. It should be fixed to "0". Can not be used. It should be fixed to "0". Can not be used. It should be fixed to "0". Can not be used. P0 pin data control. P1 pin data control. P2 pin data control. P3 pin data control. P4 pin data control. P5 pin data control. P6 pin data control. P7 pin data control. Note. The mark around the status value means the reset status by the "L" level is input to AC pin.

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS (4) Address 12316 A B C D E If HS is the horizontal display start location, HS = T ( 2nNPn+m) T: Period of display frequency 2007 settings are possible. m : offset value differ for the setting of the register EXCK0 and EXCK1. It shown below. Σ n = 0 Register DA Function Horizontal display start location is speci- fied using the 11 bits from HP10 to HP0. HP10 to HP0 = (000000000002) and (000001001112) setting is forbidden. HS*(shown left) shows horizontal dis- play start location this is register B/F (address 12916) = "0" is set. It should be fixed to "0". Can not be used. It should be fixed to "0". Can not be used. It should be fixed to "0". Can not be used. It should be fixed to "0". Can not be used. Display area HS* VS HOR VERT Note. The mark around the status value means the reset status by the "L" level is input to AC pin. EXCK1 EXCK0 m Do not set

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS (5) Address 12416 A B C D E Register DA Status If VS is the vertical display start location, VS = H 2nVPn T: Cycle with the horizonal synchronizing pulse 2047 settings are possible. The vertical start location is specified using the 11 bits from VP10 to VP0. VP10 to VP0 = (000000000002) setting is forbidden. HS*(shown left) shows horizontal dis- play start location this is register B/F (address 12916) = "0" is set. Sets the blanking mode of RAM charac- ter. See DISPLAY FORM 2. It should be fixed to "0". Can not be used. It should be fixed to "0". Can not be used. Matrix-outline size. Charcter size. (Note 2) It should be fixed to "0". Can not be used. Display area HS* VS HOR VERT Σ n = 0 Note1. The mark around the status value means the reset status by the "L" level is input to AC pin. Note2. The part of the appointed color by BB, BG and BB of the display RAM changes that the blanking is "OFF".

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS (6) Address 12516 DSP0 DSP1 DSP2 DSP3 DSP4 DSP5 DSP6 DSP7 DSP8 DSP9 DSP10 DSP11 TEST21 TEST22 TEST23 A B C D E Register DA Status Sets the display mode of line 1. Sets the display mode of line 2. Sets the display mode of line 3. Sets the display mode of line 4. Sets the display mode of line 5. Sets the display mode of line 6. Sets the display mode of line 7. Sets the display mode of line 8. Sets the display mode of line 9. Sets the display mode of line 10. Sets the display mode of line 11. Sets the display mode of line 12. It should be fixed to "0". Can not be used. It should be fixed to "0". Can not be used. It should be fixed to "0". Can not be used. The display modes of display screen inside n+1 line by DSPn (n=0 ‘11) The display mode decided by the combination with registers BLK1 and BLK0 (address 12916). Settings are given below. For detail, see DISPLAY FORM 1 (1). BLK1 BLK0 DSPn="0" Matrix-outline border Character Border Matrix-outline DSPn="1" Matrix-outline Border Matrix-outline Charcter (At register BCOL="0") Note. The mark around the status value means the reset status by the "L" level is input to AC pin.

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS (7) Address 12616 LIN2 LIN3 LIN4 LIN5 LIN6 LIN7 LIN8 LIN9 V1SZ0 V1SZ1 VSZ1L0 VSZ1L1 VSZ1H0 VSZ1H1 TEST24 A B C D E Register DA Status H: Cycle with the horizontal synchronizing pulse V1SZ1 H: Cycle with the horizontal synchronizing pulse VSZ1L1 VSZ1L0 Vertical direction size 1H/dot 2H/dot 3H/dot 4H/dot VSZ1H1 VSZ1H0 Vertical direction size 1H/dot 2H/dot 3H/dot 4H/dot H: Cycle with the horizontal synchronizing pulse It should be fixed to "0". Can not be used. V1SZ0 Vertical direction size 1H/dot 2H/dot 3H/dot 4H/dot Character size setting in the vertical direction for the 2nd line. Character size setting in the vertical direction for the 3rd line. Character size setting in the vertical direction for the 4th line. Character size setting in the vertical direction for the 5th line. Character size setting in the vertical direction for the 6th line. Character size setting in the vertical direction for the 7th line. Character size setting in the vertical direction for the 8th line. Character size setting in the vertical direction for the 9th line. Character size setting in the vertical direction for the 1st line. (display monitor 1 to 12 line) Character size setting in the vertical direction (display monitor 1 line) at "0" state in register LIN2 to LIN17 (address 12616, 12716). Character size setting in the vertical direction (display monitor 1 line) at "1" state in register LIN2 to LIN17 (address 12616, 12716). The vertical dot size for line n in the character dot lines (18 vertical lines) is set using LINn (n = 2 to 17). Dot size can be selected between 2 types for each dot line. For dot size, see the below registers. Line 1 and lines 2 to 12 can be set independent of one another. 1st line 2nd to 12th line LINn = "0" LINn = "1" Refer to VSZ1L0 and VSZ1L1 Refer to VSZ2L0 and VSZ2L1 Refer to VSZ1H0 and VSZ1H1 Refer to VSZ2H0 and VSZ2H1 Note. The mark around the status value means the reset status by the "L" level is input to AC pin.

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS (8) Address 12716 LIN10 LIN11 LIN12 LIN13 LIN14 LIN15 LIN16 LIN17 V18SZ0 V18SZ1 VSZ2L0 VSZ2L1 VSZ2H0 VSZ2H1 TEST25 A B C D E Register DA Status H: Cycle with the horizontal synchronizing pulse VSZ2L1 H: Cycle with the horizontal synchronizing pulse H: Cycle with the horizontal synchronizing pulse VSZ2H1 VSZ2H0 Vertical direction size 1H/dot 2H/dot 3H/dot 4H/dot It should be fixed to "0". Can not be used. VSZ2L0 Vertical direction size 1H/dot 2H/dot 3H/dot 4H/dot Character size setting in the vertical direction for the 10th line. Character size setting in the vertical direction for the 11th line. Character size setting in the vertical direction for the 12th line. Character size setting in the vertical direction for the 13th line. Character size setting in the vertical direction for the 14th line. Character size setting in the vertical direction for the 15th line. Character size setting in the vertical direction for the 16th line. Character size setting in the vertical direction for the 17th line. Character size setting in the vertical direction for the 18th line. (display monitor 1 to 12 line) Character size setting in the vertical direction (display monitor for 2 to 12 line) at "0" state in register LIN2 to LIN17 (address 12616, 12716). The vertical dot size for line n in the character dot lines (18 vertical lines) is set using LINn (n = 2 to 17). Dot size can be selected between 2 types for each dot line. For dot size, see the below registers. Line 1 and lines 2 to 12 can be set independent of one another. 1st line 2nd to 12th line LINn = "0" LINn = "1" Refer to VSZ1L0 and VSZ1L1 Refer to VSZ2L0 and VSZ2L1 Refer to VSZ1H0 and VSZ1H1 Refer to VSZ2H0 and VSZ2H1 Character size setting in the vertical direction (display monitor for 2 to12 line) at "1" state in register LIN2 to LIN17(address 12616, 12716). Note. The mark around the status value means the reset status by the "L" level is input to AC pin.

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS (9) Address 12816 RR RG RB FR FG FB TEST26 TEST27 TEST28 BETA14 HSZ10 HSZ11 HSZ20 HSZ21 TEST29 A B C D E Register DA Status Sets the raster color of all blankings. Set the blanking color of the Border size, or the shadow size. Charcter size setting in the horizontal direction for the first line. T: Display frequency cycle Charcter size setting in the horizontal direction for the 2nd line to 12th line. T: Display frequency cycle Color Black Red Green Yellow Blue Magenta Cyan White RB RG RR Color Black Red Green Yellow Blue Magenta Cyan White FB FG FR Matrix-outline display (12 18 dot) Matrix-outline display (14 18 dot) It should be fixed to "0". Can not be used. It should be fixed to “0”. Can not be used. It should be fixed to “0”. Can not be used. It should be fixed to “0”. Can not be used. HSZ11 HSZ10 Horizontal direction size 1T/dot 2T/dot 3T/dot 4T/dot HSZ21 HSZ20 Horizontal direction size 1T/dot 2T/dot 3T/dot 4T/dot Note. The mark around the status value means the reset status by the "L" level is input to AC pin.

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS (10) Address 12916 BCOL B/F VMASK POLV POLH BLK0 BLK1 SYAD RAMERS STOP DSPON BLINK0 BLINK1 BLINK2 TEST30 A B C D E Register DA Status Blanking of BLK0, BLK1 All raster blanking Synchronize with the leading edge of horizontal synchronization. Synchronize with the trailing edge of horizontal synchronization. Do not mask by VERT input signal Mask by VERT input signal VERT pin is negative polarity VERT pin is positive polarity HOR pin is negative polarity HOR pin is positive polarity ( When DSPn (address 12516) = "0" ) Border display of character Shadow display of character RAM not erased RAM erased Oscillation of clock for display Stop the oscillation of clock for display Display OFF Display ON Divided into 64 of vertical synchronous signal Divided into 32 of vertical synchronous signal It should be fixed to "0". Can not be used. Sets all raster blanking Synchronize with the front porch or back porch of the horizontal synchronization signal. Set mask at phase comparison operating. Set VERT pin polarity. Set HOR pin polarity. Set blanking mode. See DISPLAY FORM 1 (1). See DISPLAY FORM 1 (2). Set blinking duty ratio. Set blinking frequency. BLINK1 BLINK0 Duty Blinking OFF 25% 50% 75% Blanking mode Matrix-outline size Character size Border size Matrix-outline size BLK1 BLK0 When register RAMERS is set to "1", do not stop the display clock. There is no need to reset because there is no register for this bit.Refer to REGISTER SUPPLEMENTARY DESCRIPTION. Note. The mark around the status value means the reset status by the "L" level is input to AC pin.

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS REGISTER SUPPLEMENTARY DESCRIPTION (1) Setting external clock input and display frequency mode Setting external clock input and display frequency mode (by use of EXCK0, EXCK1 (12116) and DIV10 to DIV0 (12016), as explained here following. 1 (External clock display) … Fosc = 20 to 70 MHz Input from the TCK pin a constant-period continuous external clock that synchronizes with the horizontal synchronous signal. And input from HOR pin a constant period continuous horizontal synchronous signal. Never stop inputting the clock while displaying. Do not have to set a display frequency because the clock just as it is entered from outside is used as the display clock. synchronous… Fosc = 20 to 100 MHz Clock input from the TCK pin is unnecessary. The multiply clock of the internally generated horizontal synchronous signal is used as the display clock. The display frequency is set by setting the multiply value of the horizontal synchronous frequency (of the display frequency) in DIV10 to DIV0 (address 12016). Also, set the display frequency range. (See the next page.) Display frequency is calculated using the below expres- sion. Display frequency =Horizontal synchronous frequency Multiply value (Internal oscillation clock display) … Fosc = 20 to 100 MHz Input from the TCK pin a constant-period continuous external clock that synchronizes with the horizontal synchronous signal. And input from HOR pin a constant- period continuous horizontal synchronous signal. Never stop inputting the clock while displaying. An internal clock which is in sync with the external input clock is used as the display clock. Because the display frequency equals the external clock frequency, set N1 (division value) that satisfies the below expressions to DIV10 to DIV0 (address 12016) for make the display frequency is equal to the external clock frequency. N1 = external clock frequency / horizontal synchronous frequency N1 = Also, set the display frequency range. (See the next page.) Fig. 12 Example of external clock input 2nDIVn Σ n = 0 Horizontal synchronous signal External clock Number of clock (N1)

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS (2) To set display frequency range Whenever setting display frequency (when EXCK1 = "0", EXCK0 = "1", or EXCK1 = "1", EXCK0 = "1"), always set the display frequency range in accordance with the display frequency. This range is set from DIVS0, DIVS1, DIVS2, RSEL0 and RSEL1 (address 12116). Frequency ranges are given here below. (3) Notes on setting display frequency To change external clock (display) frequency or horizontal syn- chronization frequency, always use the following procedures. To set EXCK1 = "0", EXCK0 = "1" (a) Turn the display OFF. … DSPON (address 12916) = "0" (b) Set the display frequency. … Set from DIV10 to DIV0(address 12016) , DIVS0, DIVS1, DIVS2, RSEL0 and RSEL1 (address 12116). (c) Wait 20 ms while the horizontal synchronization signal is being input. (d) Turn the display ON. … DSPON (address 12916) = "1" To set EXCK1 = "1", EXCK0 = "1" (a) Turn the display OFF. … DSPON (address 12916) = "0" (b) Set the display frequency. … Set from DIV10 to DIV0(address 12016) , DIVS0, DIVS1, DIVS2, RSEL0 and RSEL1 (address 12116). (c) Wait 20 ms while the horizontal synchronization signal and external clock are being input. (d) Turn the display ON. … DSPON (address 12916) = "1" RSEL1 RSEL0 DIVS1 DIVS0 Display frequency range MHz 90.00 to 100.00 80.00 to 90.50 73.33 to 80.67 66.67 to 74.00 60.00 to 67.33 53.33 to 60.67 50.00 to 54.00 45.00 to 50.50 40.00 to 45.50 36.67 to 40.33 33.33 to 37.00 30.00 to 33.67 26.67 to 30.33 25.00 to 27.75 22.50 to 25.25 20.00 to 22.75 DIVS2

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS Fig. 13 Display form DISPLAY FORM 1 M35047-XXXSP/FP has the following four display forms. (1) ROM character blanking mode Character size : Blanking same as the character size. Border size : Blanking the background as a size from character. Matrix-outline size : Blanking the background 12 18 dot. All blanking size : When set register BCOL to "1", all raster area is blanking. The display mode and blanking mode can be set line-by-line, as follows, from registers BCOL, BLK1, BLK0 (address 12916), DSP0 to DSP11 (address 12516). BCOL BLK1 BLK0 Display mode Matrix-outline border display Character display Border display Matrix-outline display Matrix-outline border display Character display Border display Matrix-outline display Blanking mode Matrix-outline size Character size Border size Matrix-outline size All blanking size Display mode Matrix-outline display Border display Matrix-outline display Character display Matrix-outline display Border display Matrix-outline display Character display Blanking mode Matrix-outline size Border size Matrix-outlinesize Character size All blanking size 12 dots (Note 2) 18 dots 12 dots 12 dots 12 dots (Note 2) Scanning <Register BCOL=“0”> (Note 1) R,GorB output BLNK0 output color setting Character color : R,G,B of display RAM (Character unit) Border color :Register FR,FG,FB (Display unit) Matrix-outline color :BR,BG,BB of display RAM (Character unit) (a) Matrix-outline and border display (Matrix-outline size) Character color : R,G,B of display RAM (Character unit) Matrix-outline color :BR,BG,BB of display RAM (Character unit) (d) Matrix-outline display (Matrix-outline size) ( ) is blanking mode. Character color : R,G,B of display RAM (Character unit) Border color :BR,BG,BB of display RAM (Character unit) (c) Border display (Border size) Character color : R,G,B of display RAM (Character unit) (b) Character display (Character size) Note 1. When register BCOL is set to "1", the raster range of the display modes set respectively by BLK1 and BLK0 are colored by registers RR, RG, and RB (address 12816). And the blanking mode is set all blanking size (all raster size) regardless of the BLK1 and BLK0 settings. Note 2. The horizontal size of the full matrix-outline size can be set to 14 dots by register BETA14 (address 12816). BLNK0 can also be output at 14 dots. Line of DSPn = "0" Line of DSPn = "1"

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS (2) Shadow display When border display mode, if set SYAD (address 12916) = "0" to "1", it change to shadow display mode. Border and shadow display are shown below. Set shadow display color by BR, BG and BB of display RAM or by register FR, FG and FB. Fig.14 Border and shadow display Register SYAD(12916 address) = “0” Border display Register SYAD(12916 address) = “1” Shadow display Note : Border display is invalid in RAM characters.

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS DISPLAY FORM 2 This IC can display both ROM character and RAM character at the same time. The display form is shown in Figure 15 and 16. Fig.15 Display form1 Continue to Next < Regiser BCOL="0", RBLK0="0"> (Note 1) Display mode Matrix-outline display Character display (Note1) Matrix-outline display Character display (Note1) Blanking mode Matrix-outline size Character size (Note2) All blanking size All blanking size RBLK0 BCOL (1) RAM character blanking mode R,GorB output BLNK0 output Scanning 12dots (Note 2) RAM Character ROM Character R,GorB output BLNK0 output Scanning Scanning Scanning 12dots (Note 2) RAM Character ROM Character 12dots (Note 2) RAM Character ROM Character 12dots (Note 2) RAM Character ROM Character Color setting (RAM character setting) (ROM character setting) R, G, B of display RAM : RAM character code No. Character color (Character unit) BR, BG, BB of display RAM : (Character unit) Display mode : Matrix-outline display (b) (Matrix- outline size) Color setting (RAM character setting) (ROM character setting) R, G, B of display RAM : RAM character code No. Character color (Character unit) BR, BG, BB of display RAM : Border color (Character unit) Display mode : Matrix-outline display (c) (Matrix- outline size) Color setting (RAM character setting) (ROM character setting) R, G, B of display RAM : RAM character code No. Character color (Character unit) BR, BG, BB of display RAM : Matrix-outline color (Character unit) Display mode : Matrix-outline display (d) (Matrix- outline size) Color setting (RAM character setting) (ROM character setting) R, G, B of display RAM : RAM character code No. Character color (Character unit) BR, BG, BB of display RAM : Matrix-outline color (Character unit) FR, FG, FB of register Border color (Display unit) Display mode : Matrix-outline display (a) (Matrix- outline size) ( ) is blanking mode. Refer to DISPLAY FORM 1 about (a)-(d). Note1: The part of the appointed color by BB, BG and BB of the display RAM changes that is not coloring. Note2: The part of the appointed color by BB, BG and BB of the display RAM changes that the blanking is "OFF"

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS Fig. 16 Display form2 < Register BCOL="0", RBLK0="1"> (Note 1) Note 1 : When register BCOL = "1", the raster range of the display modes set respectively by RBLK0 is colored by register RR, RG and RB (address 12816) . And the blanking mode is set all blanking size (all raster size) independent of the RBLK0 settings. Note 2 : The horizontal size of the full matrix-outline size can be set to 14 dots by register BETA14 (address 12816). BLNK0 can also be out- put at 14 dots. Note 3 : When display mode (setting by register BLK1, BLK0, DSPn) is Matrix-outline display or Matrix-outline border display, register RBLK0= "1" setting (coloring prohibition color setting) is invalid. 12dots (Note 2) RAM Character ROM Character 12dots (Note 2) RAM Character ROM Character 12dots (Note 2) RAM Character ROM Character 12dots (Note 2) RAM Character ROM Character R,GorB output BLNK0 output Scanning R,GorB output BLNK0 output Scanning Scanning Scanning Color setting (RAM character setting) (ROM character setting) R, G, B of display RAM : RAM character code No. Character color (Character unit) BR, BG, BB of display RAM : Coloring prohibition (Character unit) color Display mode : Character display (b) (Character size) Color setting (RAM character setting) (ROM character setting) R, G, B of display RAM : RAM character code No. Character color (Character unit) BR, BG, BB of display RAM : Coloring prohibition Border color (Character unit) color Display mode : Character display (c) (Character size) Color setting (RAM character setting) (ROM character setting) R, G, B of display RAM : RAM character code No. Character color (Character unit) BR, BG, BB of display RAM : (Note 3) Matrix-outline color (Character unit) Display mode : Matrix-outline display (d) (Matrix-outline size) (Note 3) Color setting (RAM character setting) (ROM character setting) R, G, B of display RAM : RAM character code No. Character color (Character unit) BR, BG, BB of display RAM : (Note 3) Matrix-outline color (Character unit) FR, FG, FB of register Border color (Display unit) Display mode : Matrix-outline display (a) (Matrix-outline size) (Note 3) ( ) is blanking mode. Refer to DISPLAY FORM 1 about (a)-(d).

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS (1)20016 (2)20116 (3)20216 (4)20316 (5)20416 (6)20516 (7)20616 (8)20716 (9)20816 (10)20916 (11)20A16 (12)20B16 (13)20C16 (14)20D16 (15)20E16 (16)20F16 (17)21016 (18)21116 21216 21F16 DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0 (BS) (GS) (RS) (1) (2) (3) (4) (5) (6) (7) (8) (9) (10) (11) (12) (1)20016 (2)20116 (3)20216 (4)20316 (5)20416 (6)20516 (7)20616 (8)20716 (9)20816 (10)20916 (11)20A16 (12)20B16 (13)20C16 (14)20D16 (15)20E16 (16)20F16 (17)21016 (18)21116 21216 21F16 Address For example : RAM character 0 BLUE GREEN RED Note 1 : After clearing or setting all character RAM areas, and use the RAM characters. Note 2 : The RAM character's dots are set RED, GREEN and BLUE data, which are controlled by BS, GS and RS bit. (Can be set at same time) Example of setting RAM character data (R+G+B display image) DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0 (BS) (GS) (RS) (1) (2) (3) (4) (5) (6) (7) (8) (9) (10) (11) (12) DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0 (BS) (GS) (RS) (1) (2) (3) (4) (5) (6) (7) (8) (9) (10) (11) (12) Example of setting the RED bit code data Example of setting the GREEN bit code data Example of setting the GREEN bit code data Address (1)20016 (2)20116 (3)20216 (4)20316 (5)20416 (6)20516 (7)20616 (8)20716 (9)20816 (10)20916 (11)20A16 (12)20B16 (13)20C16 (14)20D16 (15)20E16 (16)20F16 (17)21016 (18)21116 21216 21F16 Address Can not used Can not used Fig.17 Setting of the data of RAM character Can not used 1 2 3 4 5 6 7 8 9101112 (Dot) (Dot) (Dot) 1 2 3 4 5 6 7 8 9101112 (Dot) 1 2 3 4 5 6 7 8 9101112 (Dot) (Dot) 1 2 3 4 5 6 7 8 9101112 (Dot) (Dot)

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS CHARACTER FONT Images are composed on a 12 18 dot matrix, and characters can be linked vertically and horizontally with other characters to al- low the display the continuous symbols. Character code FF16 is fixed as a blank without background. Therefore, cannot register a character font in this code. Fig.18 Example of border display When the character extends to the top line of the matrix, no border is left at the top. Note: Hatching represents border. When the character extends to the bottom (18th) line of the matrix, no border is left at the bottom. 12 dots 18 dots Note: Border

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS DATA INPUT EXAMPLE Data of display RAM and display control registers can be set by the I2C-BUS serial input function. Example of data setting is shown in Figure 19 (at EXCK0 = "1", EXCK1 = "0" setting). Fig. 19 Example of data setting DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0 Remarks Address/data Address 12016 Data 12016 Data 12116 Data 12216 Data 12316 Data 12416 Data 12516 Data 12616 Data 12716 Data 12816 Data 12916 Address 20016 Data 20016 Data 2F116 Address 20016 Data 20016 Data 2F116 Address 20016 Data 20016 Data 2F116 Address00016 Data 00016 Data 11F16 Address 12916 Data 12916 System set up (Note 3) Address setting Frequency value setting Frequency range setting Output setting Horizontal display location setting Vertical display location setting Display form setting Character size setting Character size setting Color, character size setting Display OFF Be stable/Waiting time Background coloring Character color Character code 200 m sec hold Blink -ing Bit color Bit code/RED Bit code/GREEN Bit code/BLUE RED•bit code setting GREEN•bit code setting BLUE•bit code setting DAF Address setting 20 m sec hold Bit color Bit color Notes 1 : Input a continuous clock of constant period from the TCK pin. Also, input a horizontal synchronous signal into the HOR pin and a vertical synchronous signal into the VERT pin. 2 : Matrix-outline display in this data. 3 : ____ Secure the waiting time of 200ms after releasing AC, and set data from setting the display frequency (setting of the register). Address setting Address setting Address setting Address setting Character setting Display ON (Note 2) DIV10 DIV9 DIV8 DIV7 DIV6 DIV5 DIV4 DIV3 DIV2 DIV1 DIV0 RSEL1RSEL0 DIVS2 DIVS1 DIVS0 HP10 HP9 HP8 HP7 HP6 HP5 HP4 HP3 HP2 HP1 HP0 VP10 VP9 VP8 VP7 VP6 VP5 VP4 VP3 VP2 VP1 VP0 POLH POLV FR000B FR000A FR0009 FR0008 FR0007 FR0006FR0005 FR0004FR0003 FR0002 FR0001FR0000 FR711B FR711A FR7119 FR7118 FR7117 FR7116 FR7115 FR7114 FR7113 FR7112 FR7111 FR7110 FR000B FR000A FR0009 FR0008 FR0007 FR0006FR0005 FR0004FR0003 FR0002 FR0001FR0000 FR711B FR711A FR7119 FR7118 FR7117 FR7116 FR7115 FR7114 FR7113 FR7112 FR7111 FR7110 FR000B FR000A FR0009 FR0008 FR0007 FR0006FR0005 FR0004FR0003 FR0002 FR0001FR0000 FR711B FR711A FR7119 FR7118 FR7117 FR7116 FR7115 FR7114 FR7113 FR7112 FR7111 FR7110 BB BG BR BLINK B G R C1 C0 BB BG BR BLINK B G R C1 C0 POLH POLV

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS Fig.20 Example of the M35047-XXXSP/FP peripheral circuit (Internal synchronous. At EXCK1 = "0", EXCK0 = "1") Fig.21 Example of the M35047-XXXSP/FP peripheral circuit (External synchronous. At EXCK1 = "1", EXCK0 = "1") Note. CPOUT pin can be opened when use only EXCK1 = "0" and EXCK0 = "0". Synchronous signal generator Microcomputer 470PF (Note 2) 100µF 1µF 0.01µF CPOUT VSS2 AC TEST SCL SDA TCK VDD1 VDD2 VERT HOR P5/B P3/G P1/R P0/BLNK0 VSS1 Horizontal synchronors signal (5V) Vertical synchronors signal (5V) +5V +5V BLNK0 R G B Mixing video pre-amp 100µF 1µF 0.01µF Note 1: Use this 1% precision element Note 2: Use this 10% precision element M35047-XXXSP/FP 1.0kΩ(Note 1) 0.1µF(Note 2) 1µF External clock 47PF (Note 2) 100µF 1µF 0.01µF CPOUT VSS2 AC TEST SCL SDA TCK VDD1 VDD2 VERT HOR P5/B P3/G P1/R P0/BLNK0 VSS1 +5V +5V BLNK0 R G B 100µF 1µF 0.01µF M35047-XXXSP/FP Synchronous signal generator Microcomputer Microcomputer Horizontal synchronors signal (5V) Vertical synchronors signal (5V) Mixing video pre-amp Note 1: Use this 1% precision element Note 2: Use this 10% precision element 1.0kΩ(Note 1) 0.01µF(Note 2) 1µF

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS Fig.22 Start state / Stop state Fig.23 Control byte configuration DATA INPUT (1) I2C-Bus communication function This IC has a built-in data transmission interface which utilizes 2 unidirectional buses. In communications, this IC functions as a slave reception device. The IC is synchronized with the serial clock (SCL) sent from the master device and receives the data (SDA). Communications are controlled from the start/stop states. Also, always in put the control byte after attaining the start state. The below chart shows the start/stop state and control byte configuration. SCL SDA Start state Stop state Data receive Data modify enable Control byte: 7C16(Fixed) Slave address R/W (0: Written)

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS (2) Data input (Sequence) (a) Addresses are consists of 16 bits. (b) Data is consists of 16 bits. (c) Addresses and data are communicated in 8-bit units. Input the lower 8 bits before the upper 8 bits. Make input from the MSB side. (d) After the start state has been attained and the control byte (7CH) received, the next 16 bits (2 bytes) are for inputting the address. Addresses are increased in increments for every 16 bits (2 bytes) of data input thereafter. As a result, it is not necessary to input the address from the second data. Note:During external synchronous , do not stop the external clock input from the TCK pin while inputting data. Fig.24 Data input sequence ACK* (Acknowledge) : Output the acknowledge signal whenever one byte input after the start state. Output the acknowledge signal and recieve the data thereafter when match the slave address (7CH). S T A R T S P M S B A C K A C K A C K A C K A C K A C K L S B M S B L S B M S B L S B M S B L S B M S B L S B S T O P Control byte (7 CH) Lower address (N) Upper address (N) Lower data (N) Upper data (N) lower data (N + 1) SDA

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS Parameter Symbol fCLK tHIGH tLOW tR tF tHD : STA tSU : STA tHD : DAT tSU : DAT tSU : STO tBUF tSP Clock frequency HIGH period of Clock LOW period of Clock SDA & SCL rise time SDA & SCL fall time Hold time at START status Set up time at START status Data input hold time Data input setup time Set up time at STOP state Bus release time Input filter / spike suppress (SDA & SCL pin) Min. 4000 4700 4000 4700 250 4000 4700 N/A Max. 100 1000 300 N/A Min. 600 1300 20+(Note) 0.1CB 20+(Note) 0.1CB 600 600 100 600 1300 Max. 400 300 300 Unit Limits Typ. mode High-speed mode KHz ns ns ns ns ns ns ns ns ns ns ns Remarks Note. CB = total capacitance of 1 bus line. TIMING REQUIREMENTS Data input Time must be re- leased bus before next transmission Only at START state repeating generation Fig.25 Data input timing SCL SDA tSP tsu : STA tHD : STA tHD : DAT tSU : DAT tF tHIGH tLOW tR tSU : STO tBUF

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS Unit V mA V V kΩ V Min. 4.75 3.5 0.6VDD Parameter Supply voltage Supply current "H" level output voltage "L" level output voltage Pull-up resistance AC External clock input width Ta = –20 to +85°C VDD = 5.00V VDD = 4.75V, IOH = -0.4mA VDD = 4.75V, IOH = -0.05mA VDD = 4.75V, IOL = 0.4mA VDD = 4.75V, IOL = 0.05mA VDD = 4.75V, IOL = 3.0mA VDD = 5.00V 4.75V ≤ VDD ≤ 5.25V Unit V V V V V MHz kHz Parameter Supply voltage "L" level input voltage Symbol VDD VIH VIL FOSC H.sync Symbol VDD VI VO Pd Topr Tstg ABSOLUTE MAXIMUM RATINGS Parameter Supply voltage Input voltage Output voltage Power dissipation Operating temperature Storage temperature Conditions With respect to VSS. Ta = +25 °C Ratings –0.3 to +6.0 VSS –0.3 ≤ VI ≤ VDD +0.3 VSS ≤ VO ≤ VDD +300 –20 to +85 –40 to +125 Unit V V V mW Typ. 5.0 VDD VDD Min. 4.75 0.8VDD 0.7VDD 20.0 15.0 Max. 5.25 VDD VDD 0.2VDD 0.3VDD 100.0 130.0 Limits RECOMMENDED OPERATING CONDITIONS (VDD = 5.00V, Ta = 25°C, unless otherwise noted) Symbol VDD IDD VOH VOL RI VTCK Limits Max. 5.25 0.4 100 0.9VDD P0 to P7 (Note1) CPOUT P0 to P7 (Note2) CPOUT SDA Typ. 5.0 SCL, SDA "H" level input voltage AC HOR, VERT SCL, SDA AC HOR, VERT Oscillating frequency for display Horizontal synchronous signal input frequeney Notes 1. The current from the IC must not exceed – 0.4 mA/port at any of the port pins (P0 to P7). 2. The current flowing into the IC must not exceed 0.4 mA/port at any of port pins (P0 to P7). Test conditions

ELECTRICAL CHARACTERISTICS

(VDD = 5.00V, Ta = –20 to +85°C, unless otherwise noted) (VDD = 5.00V, Ta = –20 to +85°C, unless otherwise noted)

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS NOTE FOR SUPPLYING POWER (1)Timing of power supplying to AC pin The internal circuit of M35047-XXXSP/FP is reset when the level of the auto clear input pin AC is "L". This pin in hysteresis input with the pull-up resistor. The timing about power supplying of AC pin is shown in Figure 26. DATA REQUIRED FOR MASK ROM ORDERING Please send the following data for mask orders. (1) M35047-XXXSP/FP mask ROM order confirmation form (2) 20P4B mark specification form (3) 20P2Q-A mark specification form (4) ROM data : EPROMs or floppy disks *In the case of EPROMs, thres sets of EPROMs are required per pattern. *In the case of floppy disks, 3.5-inch 2HD disk (1BM format) is required per pattern. PRECAUTION FOR USE Notes on noise and latch-up In order to avoid noise and latch-up, connect a bypass capacitor (≈0.1µF) directly between the VDD1 pin and VSS1 pin, and the VDD2 pin and VSS2 pin using a heavy wire. Fig.26 Timing of power supplying to AC pin After supplying the power (VDD and VSS) to M35047-XXXSP/FP and the supply voltage becomes more than 0.8 VDD, it needs to keep VIL time; tw of the AC pin for more than 1ms. Start inputting from microcomputer after AC pin supply voltage becomes more than 0.8 VDD and keeping 200ms wait time. (2)Timing of power supplying to VDD1 and VDD2. Supply power to VDD1 and VDD2 at the same time. Note for waveform timing of the horizontal signals to the HOR pin Set horizontal synchronous signal edge* waveform timing to under 5ns and input to HOR pin. Set only the side which set by B/F register waveform timing under 5ns and input to HOR pin. *: Set front porch edge or back porch edge by B/F register. Voltage [V] VDD 0.8 x VDD 0.2 x VDD Supply voltage more than 1ms tW tS Time t [s] Data input disable VAC (AC pin input voltage) 90% 10% tf tr Horizontal synchronous signal

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS STANDARD ROM TYPE : M35047-002SP/FP M35047-002SP/FP is a standard ROM type of M35047-XXXSP/FP. The character patterns are fixed to the contents of Figure 27 to 30.

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS Fig.27 M35047-002SP/FP character patterns (1) 0016 0116 0216 0316 0416 0516 0616 0716 0816 0916 0A16 0B16 0C16 0D16 0E16 0F16 1016 1116 1216 1316 1416 1516 1616 1716 1816 1916 1A16 1B16 1C16 1D16 1E16 1F16 2016 2116 2216 2316 2416 2516 2616 2716 2816 2916 2A16 2B16 2C16 2D16 2E16 2F16 3016 3116 3216 3316 3416 3516 3616 3716 3816 3916 3A16 3B16 3C16 3D16 3E16 3F16

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS Fig.28 M35047-002SP/FP character patterns (2) 4016 4116 4216 4316 4416 4516 4616 4716 4816 4916 4A16 4B16 4C16 4D16 4E16 4F16 5016 5116 5216 5316 5416 5516 5616 5716 5816 5916 5A16 5B16 5C16 5D16 5E16 5F16 6016 6116 6216 6316 6416 6516 6616 6716 6816 6916 6A16 6B16 6C16 6D16 6E16 6F16 7016 7116 7216 7316 7416 7516 7616 7716 7816 7916 7A16 7B16 7C16 7D16 7E16 7F16

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS Fig.29 M35047-002SP/FP character patterns (3) 8016 8116 8216 8316 8416 8516 8616 8716 8816 8916 8A16 8B16 8C16 8D16 8E16 8F16 9016 9116 9216 9316 9416 9516 9616 9716 9816 9916 9A16 9B16 9C16 9D16 9E16 9F16 A016 A116 A216 A316 A416 A516 A616 A716 A816 A916 AA16 AB16 AC16 AD16 AE16 AF16 B016 B116 B216 B316 B416 B516 B616 B716 B816 B916 BA16 BB16 BC16 BD16 BE16 BF16

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS Fig.30 M35047-002SP/FP character patterns (4) C016 C116 C216 C316 C416 C516 C616 C716 C816 C916 CA16 CB16 CC16 CD16 CE16 CF16 D016 D116 D216 D316 D416 D516 D616 D716 D816 D916 DA16 DB16 DC16 DD16 DE16 DF16 E016 E116 E216 E316 E416 E516 E616 E716 E816 E916 EA16 EB16 EC16 ED16 EE16 EF16 F016 F116 F216 F316 F416 F516 F616 F716 F816 F916 FA16 FB16 FC16 FD16 FE16 FF16blank

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS GZZ-SH56-34B<92A0> MASK ROM CONFIRMATION FORM SCREEN DISPLAY IC M35047-XXXSP/FP MITSUBISHI ELECTRIC Receipt Data : Supervisor signature Section head signature Mask ROM number Company name Supervisor Date : TEL Issuance signature Subumitted by Note : Please fill in all items marked C, C Customer Data issued C 1. Confirmation Confirm the Character Font Preparation Program in Mitsubishi Sales Sites. Three EPROMs are required for each pattern if this order is performed by EPROMs. One floppy disk is required for each pattern if this order is performed by a floppy disk. Ordering by EPROMs If at least two of the three sets of EPROMs submitted contain identical data, we will produce masks based on this data. We shall assume the responsibility for errors only if the mask ROM data on the products we produce differs from this data. Thus, extreme care must be taken to verify the data in the submitted EPROMs (27512 type used). (1) The font data prepared by the Character Font Preparation Program is saved as a binary type object file (addresses 0000h to FFFFh) and a hex type object file . Three sets of these EPROMs are required. Ordering by floppy disk We will produce masks based on the mask files generated by the mask file generating utility. We shall assume the responsibility for errors only if the mask ROM data on the products we produce differs from this mask file. Thus, extreme care must be taken to verify the mask file in the submitted floppy disk. The mask files forms hex-file made by the character font preparation program in the mask file generation utility. Submit the mask file after be saved in the floppy disk. The submitted floppy disk must be 3.5-inch 2HD type and DOS/V format. And the number of the mask files must be one in one floppy disk. 2. Select the marking type (Check in the appropriate box). Special Mark and attach to the Mask ROM Confirmation Form. Standard Mark 3. Select the package type (Check in the appropriate box). 4. Comments File code (hexadecimal notation) Mask file name .MSK (equal or less than eight characters) Checksum code for entire EPROM (hexadecimal notation) Save file name M 0 4 7 R . V (equal or less than eight characters ) C C C

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS C 5. Test patterns C 6. Character patterns (See the next page)

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS 0016 0116 0216 0316 0416 0516 0616 0716 0816 0916 0A16 0B16 0C16 0D16 0E16 0F16 1016 1116 1216 1316 1416 1516 1616 1716 1816 1916 1A16 1B16 1C16 1D16 1E16 1F16 2016 2116 2216 2316 2416 2516 2616 2716 2816 2916 2A16 2B16 2C16 2D16 2E16 2F16 3016 3116 3216 3316 3416 3516 3616 3716 3816 3916 3A16 3B16 3C16 3D16 3E16 3F16

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS 4016 4116 4216 4316 4416 4516 4616 4716 4816 4916 4A16 4B16 4C16 4D16 4E16 4F16 5016 5116 5216 5316 5416 5516 5616 5716 5816 5916 5A16 5B16 5C16 5D16 5E16 5F16 6016 6116 6216 6316 6416 6516 6616 6716 6816 6916 6A16 6B16 6C16 6D16 6E16 6F16 7016 7116 7216 7316 7416 7516 7616 7716 7816 7916 7A16 7B16 7C16 7D16 7E16 7F16

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS 8016 8116 8216 8316 8416 8516 8616 8716 8816 8916 8A16 8B16 8C16 8D16 8E16 8F16 9016 9116 9216 9316 9416 9516 9616 9716 9816 9916 9A16 9B16 9C16 9D16 9E16 9F16 A016 A116 A216 A316 A416 A516 A616 A716 A816 A916 AA16 AB16 AC16 AD16 AE16 AF16 B016 B116 B216 B316 B416 B516 B616 B716 B816 B916 BA16 BB16 BC16 BD16 BE16 BF16

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS C016 C116 C216 C316 C416 C516 C616 C716 C816 C916 CA16 CB16 CC16 CD16 CE16 CF16 D016 D116 D216 D316 D416 D516 D616 D716 D816 D916 DA16 DB16 DC16 DD16 DE16 DF16 E016 E116 E216 E316 E416 E516 E616 E716 E816 E916 EA16 EB16 EC16 ED16 EE16 EF16 F016 F116 F216 F316 F416 F516 F616 F716 F816 F916 FA16 FB16 FC16 FD16 FE16 FF16blank

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS Customer’s Parts Number Note: The fonts and size of characters are standard Mitsubishi type. Mitsubishi IC catalog name and Mitsubishi lot number Notes 1 : The mark field should be written right aligned. 2 : The fonts and size of characters are standard Mitsubishi type. 3 : Customer’s Parts Number can be up to 13 characters: Only 0 to 9, A to Z, +, -, /, (, ), &, ©, . (period), and , (comma) are usable. 4 : If the Mitsubishi logo is not required, check the box be- low. Mitsubishi logo is not required 20P4B (20-PIN SDIP) MARK SPECIFICATION FORM Mitsubishi IC catalog name Please choose one of the marking types below (A, B, C), and enter the Mitsubishi IC catalog name and the special mark (if needed). A. Standard Mitsubishi Mark C. Special Mark Required B. Customer’s Parts Number + Mitsubishi IC Catalog Name Mitsubishi IC catalog name Note 1 : If the Special Mark is to be Printed, indicate the desired layout of the mark in the left figure. The layout will be du- plicated as close as possible. Mitsubishi lot number (6-digit, or 7-digit) and Mask ROM number (3-digit) are always marked. 2 : If the customer’s trade mark logo must be used in the Special Mark, check the box below. Please submit a clean original of the logo. For the new special character fonts, a clean font original (ideally logo drawing) must be submitted. Special logo required Mitsubishi lot number (6-digit or 7-digit) Mask ROM number (3-digit) Mitsubishi lot number (6-digit or 7-digit)

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS Customer s Parts Number Note: The fonts and size of characters are standard Mitsubishi type. Mitsubishi IC catalog name and Mitsubishi lot number Notes 1 : The mark field should be written right aligned. 2 : The fonts and size of characters are standard Mitsubishi type. 3 : Customer s Parts Number can be up to 10 characters: Only 0 to 9, A to Z, +, -, /, (, ), &, ', . (period), and , (comma) are usable. 4 : If the Mitsubishi logo is not required, check the box be- low. Mitsubishi logo is not required 20P2Q-A (20-PIN SSOP) MARK SPECIFICATION FORM Mitsubishi IC catalog name Please choose one of the marking types below (A, B, C), and enter the Mitsubishi IC catalog name and the special mark (if needed). B. Customer s Parts Number + Mitsubishi IC Catalog Name Mitsubishi IC catalog name Mitsubishi IC catalog name Note 1 : If the Special Mark is to be Printed, indicate the desired layout of the mark in the left figure. The layout will be du- plicated as close as possible. Mitsubishi lot number (4-digit) and Mask ROM number (3-digit) are always marked. 2 : If the customer s trade mark logo must be used in the Special Mark, check the box below. Please submit a clean original of the logo. For the new special character fonts, a clean font original (ideally logo drawing) must be submitted. Special logo required Special Mark (Customer s Trade Mark) Mitsubishi IC catalog name Mitsubishi lot number (6-digit or 7-digit) ROM number (3-digit) Mitsubishi lot number (4-digit) A. Standard Mitsubishi Mark C. Special Mark Required

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS PACKAGE OUTLINE

© 2000 MITSUBISHI ELECTRIC CORP. New publication, effective July. 2000. Specifications subject to change without notice. Notes regarding these materials These materials are intended as a reference to assist our customers in the selection of the Mitsubishi semiconductor product best suited to the customer’s application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Mitsubishi Electric Corporation or a third party. Mitsubishi Electric Corporation assumes no responsibility for any damage, or infringement of any third-party’s rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Mitsubishi Electric Corporation without notice due to product improvements or other reasons. It is therefore recommended that customers contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Mitsubishi Electric Corporation assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Mitsubishi Electric Corporation by various means, including the Mitsubishi Semiconductor home page (http://www.mitsubishichips.com). When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Mitsubishi Electric Corporation assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. Mitsubishi Electric Corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. The prior written approval of Mitsubishi Electric Corporation is necessary to reprint or reproduce in whole or in part these materials. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. Please contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor for further details on these materials or the products contained therein. Keep safety first in your circuit designs! Mitsubishi Electric Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of non-flammable material or (iii) prevention against any malfunction or mishap. HEAD OFFICE: 2-2-3, MARUNOUCHI, CHIYODA-KU, TOKYO 100-8310, JAPAN MITSUBISHI MICROCOMPUTERS M35047-XXXSP/FP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

Rev. Rev. No. date 1.0 First Edition 980402 1.1 P47 20P2Q-A (20-PIN SSOP) MARK SPECIFICATION FORM 000707 B: Note 4 added REVISION DESCRIPTION LIST M35047-XXXSP/FP DATA SHEET (1/1) Revision Description

Product Information

M35047-XXXSP specifications and overview.

Summary

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

Description

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

Source title M35047-XXXSP Datasheet(PDF) - Mitsubishi Electric Semiconductor

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