LTR-91400 LITEON | Alldatasheet

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LITE-ON Technology Corp. / Optoelectronics No.90,Chien 1 Road, Chung Ho, New Taipei City 23585, Taiwan, R.O.C. Tel: 886-2-2222-6181 Fax: 886-2-2221-1948 / 886-2-2221-0660 http://www.liteon.com/opto Optical Sensor Product Data Sheet LTR-91400 Spec No.: DS86-2016-0050 Effective Date: 09/14/2016 Revision: - BNS-OD-FC001/A4 BNS-OD-FC001/A4 BNS-OD-FC001/A4 BNS-OD-FC001/A4

Part No. : LTR-91400 BNS-OD-FC002/A4

Description

LTR-91400 is an integrated low voltage I 2C ambient light sensor [ALS], gesture sensor [GS] and proximity sensor [PS], with built -in emitter in a single miniature chipled lead -free surface mount package. This sensor converts light intensity to a digital output signal capable of direct I2C interface. The gesture sensor provides object motion direction information based on the reflected IR light detected by the 4 photodiodes for East, West, North and South direction. Besides, ambient light sensor provides a linear response over a wide dynamic range and is well suited to applications under high ambient brightness. With built -in proximity sensor (emitter and detector), it offers the feature to detect object at a user configurable distance. The senso r supports an interrupt feature that removes the need to poll the sensor for a reading which improves system efficiency. The sensor also supports several features that help to minimize the occurrence of false triggering. This CMOS design and factory -set on e time trimming capability ensure minimal sensor -to-sensor variations for ease of manufacturability to the end customers. Application To control brightness of the display panel, and/or detection of object or motion in mobile, computing, and consumer devices.

Features

 I2C interface (Standard mode @100kHz or Fast mode @400kHz)  Gesture, Ambient Light, and Proximity Sensing in one ultra-small ChipLED package  Very low power consumption with sleep mode capability  Operating voltage ranges: 2.4V to 3.6V  Operating temperature ranges: -30 to +70 ºC  Programmable interrupt function for ALS, PS, and GS.  Built-in temperature compensation circuit  RoHS and Halogen free compliant  GS Features  4 photodiodes for East, West, North and South direction  32 dataset storage FIFO  8-bit effective resolution  Programmable LED drive settings  Programmable crosstalk correction  ALS Features  16-bits effective resolution  Wide dynamic range of 1:15,000,000 with linear response  Close to human eye spectral response  Automatic rejection for 50Hz/60Hz lighting flicker  PS Features  Built-in LED driver and detector  11-bit effective resolution  Programmable LED drive settings  Programmable crosstalk correction  High Ambient Light Suppression

Part No. : LTR-91400 BNS-OD-FC002/A4

Ordering Information

Part Number Packaging Type Package Quantity LTR-91400 Tape and Reel 8-pins Chip-led package 8000

Part No. : LTR-91400 BNS-OD-FC002/A4 1. Outline Dimensions Note: 1. All dimensions are in millimeters

Part No. : LTR-91400 BNS-OD-FC002/A4 2. Functional Block Diagram LTR-91400 contains 5 integrated photodiodes ( 1 for ambient light and 4 photodiodes for East, West , North, and South direction) for respective photocurrent measurement. The photodiode currents are converted to digital values by ADCs. The sensor also included a driver circuit for an external IRLED, as well as some peripheral circuits such as an internal oscillator, a current source, voltage reference, and internal fuses to store trimming information.

Part No. : LTR-91400 BNS-OD-FC002/A4 3. Application Circuit Note: It is a must that VDD and VLED to be separated. I/O Pins Configuration Table Pin I/O Type Symbol Description

1 Supply VDD Power Supply Voltage

2 IN SCL I2C serial data

3 Ground GND Power Supply Ground. All voltages are referenced to GND 4 IN LEDA LED Anode. Connect to VLEDA on PCB 5 NC LEDK LED Cathode. Connect to LDR pin when using internal LED driver circuit

6 OUT LDR Proximity IR LED driver

7 OUT INT Interrupt

8 IN/OUT SDA I2C serial clock

Recommended Application Circuit Components Component Recommended Value Rp1, Rp2, Rp3 [1] 1 k to 10 k C1, C2 1uF ± 20%, X7R Ceramic

Part No. : LTR-91400 BNS-OD-FC002/A4 Notes: [1] Selection of pull-up resistors value is dependent on bus capacitance values. For more details, please refer to I2C Specifications: http://www.nxp.com/documents/user_manual/UM10204.pdf 4. Rating and Specification 4.1. Absolute Maximum Rating at Ta=25° C Parameter Symbol Rating Unit Supply Voltage VDD 3.8 V Digital Voltage Range SCL, SDA, INT -0.5 to 3.8 V Digital Output Current SCL, SDA, INT -1 to 20 mA Storage Temperature Tstg -40 to 85 C Note: Exceeding these ratings could cause damage to the sensor. All voltages are with respect to ground. Currents are positive into, negative out of the specified terminal. 4.2. Recommended Operating Conditions Parameter Symbol Min. Typ. Max. Unit Supply Voltage VDD 2.4 3.6 V LED Supply Voltage VLED 2.5 4.35 V Interface Bus Power Supply Voltage VIO 1.7 3.6 V I2C Bus Input Pin High Voltage VIH_SCL, VIH _SDA 1.2 V I2C Bus Input Pin Low Voltage VIL_SCL, VIL_SDA 0.6 V Operating Temperature Tope -30 70 C 4.3. Electrical Specifications (VDD = 3.0V, Ta=25° C, unless otherwise noted) Parameter Min. Typ. Max Unit Condition Active Supply Current 1 210 uA ALS in active mode ALS integration time = 100ms ALS measurement repeat rate = 400ms Active Supply Current 2 100 uA PS in active mode , 25% Duty Cycle , 8us Pulse Width, 100mA, 8 Pulses PS measurement repeat rate = 100ms Not including VLED current Active Supply Current 3 450 uA GS+PS in active mode, 25% Duty Cycle, 8us Pulse Width, 100mA, 8 Pulses PS measurement repeat rate = 100ms Full 32 dataset, GS wait time = 0ms Standby Current 5 uA Standby / Sleep Mode Initial Startup Time 100 ms Min wait time after power up (supply ramp -up to 2.4V) before sending I2C commands

Part No. : LTR-91400 BNS-OD-FC002/A4 Wakeup Time from Standby 10 ms Max wait time after turning device from stand -by to active before measurements starts Leakage Current -5 5 uA SDA, SCL, INT pins 4.4. Characteristics ALS Ambient Light Sensor Parameter Min. Typ. Max. Unit Condition Full ADC Resolution 16 bits Dark Count 0 10 count Lux = 0, Tope=25° C ADC Ch0 Count Gain X128 34000 count Lux=100, White LED, CCT~5K ALS Lux Accuracy -20 20 % 50/60 Hz flicker noise error -5 5 % 4.5. Characteristics Proximity Sensor Parameter Min. Typ. Max. Unit Condition Full ADC Resolution 11 bits LED peak wavelength 940 nm Detection Distance 50 mm Under dark tinted window 25% Duty Cycle, 8us Pulse Width, 100mA, 2 Pulses, 18% Gray Card LED Pulse Width 8 us LED Duty Cycle 25 % LED Peak Current 12.5 300 mA Programmable LED current Measurement repeat rate 6.125 800 msec Number of LED Pulses 1 15 Pulses Ambient Light Suppression 50K lux Direct Sunlight 4.6. Characteristics Gesture Sensor Parameter Min. Typ. Max. Unit Condition Full ADC Resolution 8 bits LED peak wavelength 940 nm FIFO RAM 32 set Sets of 4 bytes Detection Distance 10 cm With recommended optical design LED Pulse Width 8 us LED Duty Cycle 25 % LED Peak Current 12.5 300 mA

Part No. : LTR-91400 BNS-OD-FC002/A4 4.8. Startup Sequence Supply VDD to Sensor (Sensor in Standby Mode) I2C Command (Write) To enable sensor to Active Mode Initial Startup Time Wait 100 ms (min) Sensor is Active and starts measurement Wakeup Time from Standby Wait 10 ms (min) Wakeup Time from Standby: Time after I2C command is sent, to the start of ALS/PS/GS integration.

Part No. : LTR-91400 BNS-OD-FC002/A4 All specifications are at VBus = 1.7V, Tope = 25C, unless otherwise noted. Parameter Symbol Min. Max. Unit SCL clock frequency SCLf 100 400 kHz Bus free time between a STOP and START condition BUFt 1.3 us Hold time (repeated) START condition. After this period, the first clock pulse is generated S TAHDt ; 0.6 us LOW period of the SCL clock LOWt 1.3 us HIGH period of the SCL clock HIGHt 0.6 us Set-up time for a repeated START condition STASUt ; 0.6 us Set-up time for STOP condition S TOSUt ; 0.6 us Rise time of both SDA and SCL signals rt 30 300 ns Fall time of both SDA and SCL signals ft 30 300 ns Data hold time DATHDt ; 30 s Data setup time DATSUt ; 100 ns Pulse width of spikes which must be suppressed by the input filter SPt 0 50 ns Definition of timing for I2C bus

Part No. : LTR-91400 BNS-OD-FC002/A4 5. Principle of Operation 5.1. I2C Protocol 5.1.1. I2C Write Protocol (type 1) Slave address W AS Register Address A P 7 1 11 8 1 1 Slave ID (Write) SCL 1 2 3 4 5 6 7 8 9 SDA S S S S S S S 1 2 3 4 5 6 7 8 9 A A A A A A A A Slave address Register AddressA AS PW Slave ID (Write) 5.1.2. I2C Write Protocol (type 2) Slave address W AS Register Address A P 7 1 11 8 1 1 Register Command A 8 1 Slave ID (Write) SCL 1 2 3 4 5 6 7 8 9 SDA S S S S S S S 1 2 3 4 5 6 7 8 9 A A A A A A A A Slave address Register AddressA AS 1 2 3 4 5 6 7 8 9 A A A A A A A A Register Command A PW Slave ID (Write)

Part No. : LTR-91400 BNS-OD-FC002/A4 5.1.3. I2C Read Protocol S Slave address R A N 7 1 1 8 1 Register Command P Slave ID (Read) SCL 1 2 3 4 5 6 7 8 9 SDA S S S S S S S 1 2 3 4 5 6 7 8 9 C C C C C C C C Slave address Register CommandA NS PR Slave ID (Read) 5.1.4. I2C Read (Combined format) Protocol Slave address W AS Register Address A Sr 7 1 11 8 1 1 Slave address R A N 7 1 1 8 1 Register Command P Slave ID (Write) Slave ID (Read) SCL 1 2 3 4 5 6 7 8 9 SDA S S S S S S S 1 2 3 4 5 6 7 8 9 A A A A A A A A Slave address Register AddressA AS SrW 1 2 3 4 5 6 7 8 9 C C C C C C C C Register CommandA N P 1 2 3 4 5 6 7 8 9 S S S S S S S Slave address AR Slave ID (Write) Slave ID (Read) A Acknowledge (0 for an ACK) N Non-Acknowledge(1 for an NACK) S Start condition Sr Repeated Start condition P Stop condition W Write (0 for writing) R Read (1 for read) Slave-to-master Master-to-Slave

Part No. : LTR-91400 BNS-OD-FC002/A4 5.2. I2C Slave Address The 7 bits slave address for this sensor is 0x23H. A read/write bit should be appended to the slave address by the master device to properly communicate with the sensor. I2C Slave Address Command Type (0x23H) (0x23H) (0x23H) Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Write 0 1 0 0 0 1 1 0 0x46H Read 0 1 0 0 0 1 1 1 0x47H

Part No. : LTR-91400 BNS-OD-FC002/A4 6. Register Set Address R / W Register Name Description Reset Value 0x80 RW ALS_CTRL ALS operation mode control, and SW reset 0x00 0x81 RW PS_CTRL PS operation mode control 0x40 0x82 RW GS_CTRL GS operation mode control 0x00 0x83 RW ALS_MEAS_RATE ALS measurement rate in active mode 0x0B 0x84 RW ALS _THRES_UP_LSB ALS interrupt upper threshold, LSB 0xFF 0x85 RW ALS _THRES_UP_MSB ALS interrupt upper threshold, MSB 0xFF 0x86 RW ALS _THRES_LOW_LSB ALS interrupt lower threshold, LSB 0x00 0x87 RW ALS _THRES_LOW_MSB ALS interrupt lower threshold, MSB 0x00 0x88 RW PS_LED PS LED settings 0x70 0x89 RW PS_MEAS_RATE PS measurement rate settings 0x40 0x8A RW RESERVED RESERVED 0x00 0x8B RW PS_XTALK_NE_LSB Crosstalk correction on PS North East detector, LSB 0x00 0xCB RW PS_XTALK_NE_MSB Crosstalk correction on PS North East detector, MSB 0x00 0x8C RW PS_XTALK_SW_LSB Crosstalk correction on PS South West detector, LSB 0x00 0xCC RW PS_XTALK_SW_MSB Crosstalk correction on PS South West detector, MSB 0x00 0x8D RW PS_THRES_UP_LSB PS interrupt upper threshold, LSB 0xFF 0xCD RW PS_THRES_UP_MSB PS interrupt upper threshold, MSB 0x07 0x8E RW PS_THRES_LOW_LSB PS interrupt lower threshold, LSB 0x00 0xCE RW PS_THRES_LOW_MSB PS interrupt lower threshold, MSB 0x00 0x8F RW INTERTUPT_PERSIST PS and ALS interrupt persist settings 0x00 0x90 RW GS_LED GS LED settings 0x70 0x91 RW GS_WAIT GS wait time settings 0x00 0x92 RW GS_PERSIST GS interrupt persist settings 0x00 0x93 RW GS_ENTRY_LSB GS entry threshold value (1st entry), LSB 0xFF 0xC3 RW GS_ENTRY_MSB GS entry threshold value (1st entry), MSB 0x07 0x94 RW GS_EXIT GS exit threshold value 0x00 0x95 RW GS_GATE GS Gate after the 1st entry 0x00 0x96 RW GS_ XTALK_N Crosstalk correction on GS North detector 0x00 0x97 RW GS_ XTALK_S Crosstalk correction on GS South detector 0x00 0x98 RW GS_ XTALK_E Crosstalk correction on GS East detector 0x00 0x99 RW GS_ XTALK_W Crosstalk correction on GS West detector 0x00 0x9A R PART_ID Part Number ID and revision IDs 0xC1 0x9B R MANUFACT_ID Manufacturer ID 0x05 0x9C R ALS_STATUS ALS new data status 0x00 0x9D R PS_STATUS PS new data status 0x00

Part No. : LTR-91400 BNS-OD-FC002/A4 0x9E R GS_STATUS GS new data status 0x00 0xA0 ~ 0xA3 R RESERVED RESERVED 0x00 0xA4 R ALS_CH0_LSB ALS measurement CH0 data, LSB 0x00 0xA5 R ALS_CH0_MSB ALS measurement CH0 data, MSB 0x00 0xA6 R ALS_CH1_LSB ALS measurement CH1 data, LSB 0x00 0xA7 R ALS_CH1_MSB ALS measurement CH1 data, MSB 0x00 0xA8 – 0xAF R RESERVED RESERVED 0x00 0xB0 R PS_DATA_LSB PS measurement data, LSB 0x00 0xB1 R PS_DATA_MSB PS measurement data, MSB 0x00 0xB2 R GS_FIFO_ADDR GS FIFO address pointer 0x00 0xB3 R GS_FIFO_ACCESS_N GS North data 0x00 0xB4 R GS_FIFO_ACCESS_S GS South data 0x00 0xB5 R GS_FIFO_ACCESS_E GS East data 0x00 0xB6 R GS_FIFO_ACCESS_W GS West data 0x00

Part No. : LTR-91400 BNS-OD-FC002/A4 6.1. ALS_CTRL Register (Address: 0x80) (Read/Write) The ALS_CTRL register controls ALS operation modes as well as the soft (SW) reset for the whole chip. At any mode (stand-by or active), the I2C circuitry is always active. Field Bits Default Description Reserved 7:6 00 -- ALS_INT 5 0 ALS Interrupt Enable. When ALS Interrupt is enabled, Interrupt is given when CLEAR channel exceed specified ALS Threshold.

0 Disable (default)

1 Enable

ALS_GAIN 4:2 000

000 Gain 1X (default)

001 Gain 4X

010 Gain 16X

011 Gain 64X

100 Gain 128X

101 Gain 256X

SW_RST 1 0 Reset registers to default values, with sensor into standby mode.

0 No action (default)

1 Reset Registers to default values

ALS_MODE 0 0 0 Stand-by mode (default)

1 Active mode

6.2. PS_CTRL Register (Address: 0x81) (Read/Write) This register controls the Proximity Sensor (PS) operation modes. 0x80 ALS_CTRL (default = 0x00) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reserved ALS_INT ALS_GAIN SW_RST ALS_MODE 0x81 PS_CTRL (default = 0x40) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 NEAR/FAR_ Status_EN Reserved PS_Offset _EN PS_GAIN PS_MODE PS_INT

Part No. : LTR-91400 BNS-OD-FC002/A4 Field Bits Default Description NEAR / FAR_Status_EN 7 0

0 Disable NEAR/FAR Status reporting (default)

1 Enable NEAR/FAR Status reporting

Reserved 6:5 10 -- -- PS_Offset_EN 4 0 For crosstalk correction feature. When enabled, PS DATA will be subtracted with PS_XTALK register data.

0 Disabled (default)

1 Enabled

PS_GAIN 3:2 00

00 X1 (default)

PS_MODE 1 0 0 Stand-by mode (default) PS_INT 0 0 6.3. GS_CTRL Register (Address: 0x82) (Read/Write) This register controls the Gesture Sensor (GS) operation modes. Field Bits Default Description Reserved 7 0 -- GS_Force Start 6 0 0 GS force start disable (based on threshold setting at register address 0x93)

1 GS force start enable (ignore threshold value)

GS_FIFO Reset 5 0 0 FIFO not reset

1 FIFO reset

GS_Offset_EN 4 0 For crosstalk correct ion feature. When enabled, GS DATA will be subtracted with GS_XTALK register data. GS_GAIN 3:2 00 GS_MODE 1 0

0 Stand-by mode (default)

GS_INT 0 0 0x82 GS_CTRL (default = 0x00) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reserved GS_Force Start GS_FIFO Reset GS_Offset _EN GS_GAIN GS_MODE GS_INT

Part No. : LTR-91400 BNS-OD-FC002/A4 6.4. ALS_MEAS_RATE Register (Address: 0x83) (Read/Write) This register controls the integration time and timing of the periodic measurement of the ALS in active mode. Field Bits Default Description Reserved 7:5 000 -- ALS Integration Time 4:3 01 00 50ms 01 100ms (default) 10 200ms 11 400ms ALS Measurement Rate 2:0 011 000 50ms 001 100ms 010 200ms 011 400ms (default) 1XX 800ms 6.5. ALS_THRES_UP Registers (Address: 0x84 ~ 0x85) (Read/Write) These registers are used to set the upper limit of the interrupt threshold for ALS. Interrupt functions compare the value in the ALS_THRES_UP registers to the measured data in the ALS_DATA register. The data format should be the same as that of ALS_DATA register. Field Register Default Description ALS_THRES_UP_LSB 0x84 1111 1111 ALS least significant byte of the upper interrupt threshold, bit 0 is the LSB of the 16-bit data ALS_THRES_UP_MSB 0x85 1111 1111 ALS most significant byte of the upper interrupt threshold, bit 7 is the MSB of the 16-bit data 6.6. ALS_THRES_LOW Register (Address: 0x86 ~ 0x87) (Read/Write) These registers are used to set the lower limit of the interrupt threshold for ALS. Interrupt functions compare the value in the ALS_THRES_LOW registers to the measured data in the ALS_DATA register. The data format should be the same as that of ALS_DATA register. 0x83 ALS_MEAS_RATE (default = 0x0B) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reserved ALS Integration Time ALS Measurement Rate

Part No. : LTR-91400 BNS-OD-FC002/A4 Field Register Default Description ALS_THRES_LOW_LSB 0x86 0000 0000 ALS least significant byte of the lower interrupt threshold, bit 0 is the LSB of the 16-bit data ALS_THRES_LOW_MSB 0x87 0000 0000 ALS most significant byte of the lower interrupt threshold, bit 7 is the MSB of the 16-bit data 6.7. PS_LED Register (Address: 0x88) (Read/Write) This register sets the PS LED Boost and the Drive Strength. Field Bits Default Description Reserved 7:4 0111 Must write 0101 PLED_BOOST 3:2 00 00 1x (default) 01 1.5x 10 2x 11 3x PLED_DRIVE 1:0 00 00 100mA (default) 01 50mA 10 25mA 11 12.5mA 6.8. PS_MEAS_RATE Register (Address: 0x89) (Read/Write) This register controls PS measurement time and number of PS LED Pulses. Field Bits Default Description PS Measurement Time 7:5 010 000 6.125ms 001 50ms 010 100ms (default) 011 200ms 100 400ms 101 800ms 0x88 PS_LED (default = 0x70) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reserved PLED_BOOST PLED_DRIVE 0x89 PS_MEAS_RATE (default = 0x40) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 PS Measurement Time Reserved PS number of LED pulses

Part No. : LTR-91400 BNS-OD-FC002/A4 110 12.5ms 111 25ms Reserved 4 0 Must write 1 PS number of LED pulses 3:0 0000 Specifies PS LED number of pulses. If PS number of pulse set to 0, the pulse count will be 1 6.9. PS_XTALK_NE Registers (Address: 0x8B, 0xCB) (Read/Write) These registers provide crosstalk correction on PS North+East detectors pair. Field Register Default Description PS_XTALK_NE_LSB 0x8B 0000 0000 PS North+East Data will subtract this value, LSB PS_XTALK_NE_MSB 0xCB 000 PS North+East Data will subtract this value, MSB. 6.10. PS_XTALK_SW Registers (Address: 0x8C, 0xCC) (Read/Write) These registers provide crosstalk correction on PS South+West detectors pair. Field Register Default Description PS_XTALK_SW_LSB 0x8C 0000 0000 PS South+West Data will subtract this value, LSB. PS_XTALK_SW_MSB 0xCC 000 PS South+West Data will subtract this value, MSB. 6.11. PS_THRES_UP Register (Address: 0x8D, 0xCD) (Read/Write) This register is used to set the upper limit of the absolute interrupt threshold value. Interrupt functions compare the value in the PS_THRES_ UP registers to measured data value in PS_DATA registers. The data format for PS_THRES_UP must be the same as that of PS_DATA registers. Field Register Default Description PS_THRES_UP_LSB 0x8D 1111 1111 PS upper interrupt threshold value, LSB PS_THRES_UP_MSB 0xCD 111 PS upper interrupt threshold value, MSB 6.12. PS_THRES_LOW Register (Address: 0x8E, 0xCE) (Read/Write) This register is used to set the lower limit of the absolute interrupt threshold value. Interrupt functions compare the value in the PS_THRES_LOW registers to measured data value in PS_DATA registers. The data format for PS_THRES_LOW must be the same as that of PS_DATA registers. Field Register Default Description PS_THRES_LOW_LSB 0x8E 0000 0000 PS lower interrupt threshold value, LSB

Part No. : LTR-91400 BNS-OD-FC002/A4 PS_THRES_LOW_MSB 0xCE 000 PS lower interrupt threshold value, MSB 6.13. INTERRUPT PERSIST Register (Address: 0x8F) (Read/Write) This register sets the N number of times the measurement is out of the threshold range settings before asserting the INTERRUPT pin. Field Bits Default Description PS_PERSIST 7:4 0000

0000 Every PS value out of threshold range (default)

0001 1 consecutive PS values out of threshold range 1111 15 consecutive PS values out of threshold range ALS_PERSIST 3:0 0000

0000 Every ALS value out of threshold range (default)

0001 1 consecutive ALS values out of threshold range …. …. 1111 15 consecutive ALS values out of threshold range 6.14. GS_LED Register (Address: 0x90) (Read/Write) This register sets the GS LED Boost and the Drive Strength. Field Bits Default Description Reserved 7:4 0111 Must write 0101 GLED_BOOST 3:2 00 00 1x (default) 01 1.5x 10 2x 11 3x GLED_DRIVE 1:0 00 00 100mA (default) 01 50mA 10 25mA 11 12.5mA 0x8F INTERRUPT PERSIST (default = 0x00) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 PS_PERSIST ALS_PERSIST 0x90 GS_LED (default = 0x70) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reserved GLED_BOOST GLED_DRIVE

Part No. : LTR-91400 BNS-OD-FC002/A4 6.15. GS_WAIT Register (Address: 0x91) (Read/Write) This register controls GS wait time and number of GS LED Pulses. Field Bits Default Description Reserved 7 0 -- GS Wait Time 6:4 000 000 0ms (default) 001 2ms 010 4ms 011 6ms 100 10ms 101 14ms 110 18ms 111 22ms GS Number of LED pulses 3:0 0000 Specifies GS LED number of pulses. If GS number of pulse set to 0, the pulse count will be 1. 6.16. GS_PERSIST Register (Address: 0x92) (Read/Write) This register set the occurrence of gesture exit. Field Bits Default Description Reserved 7:4 0000 -- GS PERSIST 3:2 00 00 1st gesture exit occurrence will exit gesture detections. 01 2nd gesture exit occurrence will exit gesture detections. 10 3rd gesture exit occurrence will exit gesture detections. 11 4th gesture exit occurrence will exit gesture detections. Reserved 1:0 00 -- 0x91 GS_WAIT (default = 0x00) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reserved GS Wait Time GS Number of LED pulses 0x92 GS_PERSIST (default = 0x00) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reserved GS_PERSIST Reserved

Part No. : LTR-91400 BNS-OD-FC002/A4 6.17. GS_ENTRY Register (Address: 0x93, 0xC3) (Read/Write) This register compares with Proximity value PS_DATA, to determine if were to enter the gesture integration. GS_ENTRY to be greater than Xtalk level. Example: Xtalk = 100, set GS_ENTRY = 150. Setting GS_Entry to 0x00 will force sensor to enter gesture integration as long as GS_MODE is enabled. Please refer to GS state machine (Page 28) for more details. Field Register Default Description GS_ENTRY_LSB 0x93 1111 1111 GS entry threshold value, LSB GS_ENTRY_MSB 0xC3 111 GS entry threshold value, MSB 6.18. GS_EXIT Register (Address: 0x94) (Read/Write) This register compares with Gesture value to determine if were to exit the gesture integration. Please refer to GS state machine (Page 28) for more details. Field Register Default Description GS_EXIT 0x94 0000 0000 GS exit threshold value. 0xFF Prevent gesture event detection GS exit threshold value. Recommended to be same level to GS entry threshold value. Example: GS_EXIT = GS_ENTRY 0x00 Force sensor to complete 32 GS datasets. (default) 6.19. GS_GATE Register (Address: 0x95) (Read/Write) After entry threshold (value in GS_ENTRY) is exceeded, this register provides additional gate before final entry into the GS machine. This register is the threshold value of considering there is a gesture event when the absolute delta count of either W-E or N-S exceeding the threshold value. Field Register Default Description GS_GATE 0x95 0000 0000 GS threshold value. 0xFF Prevent gesture event detection …. GS threshold value. 0x00 Always trigger gesture event even if there is no gesture event. (default)

Part No. : LTR-91400 BNS-OD-FC002/A4 6.20. GS_XTALK Registers (Address: 0x96 ~ 0x99) (Read/Write) These registers provide crosstalk correction for the detectors. Field Register Default Description GS_XTALK_N 0x96 0000 0000 GS North Data will subtract this value. GS_XTALK_S 0x97 0000 0000 GS South Data will subtract this value. GS_XTALK_E 0x98 0000 0000 GS East Data will subtract this value. GS_XTALK_W 0x99 0000 0000 GS West Data will subtract this value. 6.21. PART_ID Register (Address: 0x9A) (Read Only) This register defines the part number of the device. Field Bits Default Description Part ID 7:4 1100 Part Number ID Reserved 3:0 0001 -- 6.22. MANUFACT_ID Register (Address: 0x9B) (Read Only) This register defines the manufacturer identification. Field Register Default Description MANUFACT_ID 0x9B 05H Manufacturer ID 0x9A PART_ID (default = 0xC1) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Part ID Reserved

Part No. : LTR-91400 BNS-OD-FC002/A4 6.23. ALS_STATUS Register (Address: 0x9C) (Read Only) This register stores information about ALS interrupt status as well as ALS data status. Field Bits Default Description Reserved 7:6 00 -- ALS Data Valid 5 0 0 ALS Data is Valid (default)

1 ALS Data is Invalid

Gain Range 4:2 000

100 Gain128X

0 Interrupt signal INACTIVE (default)

1 Interrupt signal ACTIVE

0 OLD data (data already read), (default)

1 NEW data (first time data is read)

6.24. PS_STATUS Register (Address: 0x9D) (Read Only) This register stores information about PS interrupt status as well as PS data status. Field Bits Default Description Reserved 7:5 000 -- NEAR_Status 4 0

0 Not detecting object (default)

1 Object is near (PS count > high threshold)

FAR_Status 3 0

1 Object is far (PS count < low threshold)

0 PS Data is Valid (default)

1 PS Data is Invalid

PS Interrupt 1 0 0 Interrupt signal INACTIVE (default) 0x9C ALS_STATUS (default = 0x00) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reserved ALS Data Valid ALS Data Gain Range ALS Interrupt Status ALS Data Status 0x9D PS_STATUS (default = 0x00) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reserved NEAR_Status FAR_Status PS Data Valid PS Interrupt Status PS Data Status

Part No. : LTR-91400 BNS-OD-FC002/A4 Status 1 Interrupt signal ACTIVE PS Data Status 0 0 6.25. GS_STATUS Register (Address: 0x9E) (Read Only) This register stores information about GS_FIFO, GS interrupt status as well as GS data status. Please refer to GS state machine (Page 28) for more details. Field Bits Default Description GS_FIFO Empty 7 0 0 GS FIFO is empty (default)

1 GS FIFO is not empty

GS_FIFO Full 6 0 0 GS FIFO is not full (default) 1 GS FIFO is full. GS Data Valid 5 0 0 GS Data is Valid (default)

1 GS Data is Invalid

Status 4 0 0 Interrupt signal INACTIVE (default) GS Data Status 3 0 0 OLD data (data already read), (default) Reserved 2:0 000 -- 6.26. ALS_DATA Registers (Address: 0xA4 ~ 0xA7) (Read Only) These registers store ALS Channel measurement results. Field Address Bits Description ALS_CH0 _LSB 0xA4 0000 0000 ALS CH0 low byte data, bit 0 is LSB of the 16-bit data ALS_CH0_MSB 0xA5 0000 0000 ALS CH0 high byte data, bit 7 is MSB of the 16-bit data ALS_CH1 _LSB 0xA6 0000 0000 ALS CH1 low byte data, bit 0 is LSB of the 16-bit data ALS_CH1_MSB 0xA7 0000 0000 ALS CH1 high byte data, bit 7 is MSB of the 16-bit data 0x9E GS_STATUS (default = 0x00) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 GS_FIFO Empty GS_FIFO Full GS Data Valid GS Interrupt Status GS Data Status Reserved

Part No. : LTR-91400 BNS-OD-FC002/A4 6.27. PS_DATA Register (Address: 0xB0, 0xB1) (Read Only) This register stores 11-bits PS measurement results. Field Register Default Description PS_Data_LSB 0xB0 0000 0000 PS measurement data, LSB. PS_Data_MSB 0xB1 000 PS measurement data, MSB. 6.28. GS_FIFO_ADDR Register (Address: 0xB2) (Read Only) This register defines GS_FIFO address pointer, to indicate how many four-byte dataset are remaining for read over I2C. Every dataset read will decrement this poi nter by 1. After finish reading, this pointer will become zero and interrupt will be cleared. Then, IC will automatically start the next GS motion detection. Field Address Default Description Reserved 7:6 00 -- GS_FIFO_ADDR 5:0 000000 GS FIFO address pointer. This register indicates how many 4 - bytes dataset is still not read in GS FIFO. 6.29. GS_FIFO_ACCESS Registers (Address: 0xB3 ~ 0xB6) (Read only) These registers define GS_FIFO data access registers. These registers are to be read sequentially from 0xB3 to 0xB6, and repeat the sequence for the next dataset. Field Register Default Description GS_NDATA 0xB3 0000 0000 GS North directional data GS_SDATA 0xB4 0000 0000 GS South directional data GS_EDATA 0xB5 0000 0000 GS East directional data GS_WDATA 0xB6 0000 0000 GS West directional data 0xB2 GS_FIFO_ADDR (default = 0x00) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reserved GS_FIFO_ADDR

Part No. : LTR-91400 BNS-OD-FC002/A4 7. Application Information 7.1. ALS Lux Conversion Lux_Calc is the calculated lux reading. Ch0 and Ch1 is the digital representation (output ADC) of ambient light level stored in the registers (Address: 0xA4-0xA7) regardless of light sources. Table 1 shows the scale factors at different ALS Range and Integration Time: General Lux equation, Simplified equation based on clear window, Where, Window Factor, WF = 1 IR Factor, IRFac = 0 ALS Gain GAIN ALS Integration Time (ms) INT X1 1 100 1 X4 4 200 2 X16 16 300 3 X64 64 400 4 X128 128 X256 256 Table 1 Note: The WF and IRfac will need to be derived if window is being used.

Part No. : LTR-91400 BNS-OD-FC002/A4 7.2. State Machine Below diagram illustrates the LTR-91400 top level state machine operation. Flow Diagram 1.1 : LTR-91400 top level state machine operation.

Part No. : LTR-91400 BNS-OD-FC002/A4 Below illustrates the LTR-91400 details state machine operation on Gesture Mode enabling.

Part No. : LTR-91400 BNS-OD-FC002/A4 7.3. Operating modes Stand-by Mode The device is by default in stand -by mode after power -up. No measurement activity done in either ALS , PS or GS. I2C communication is allowed to be able to read/write to the registers. Th e device can be reset from MCU by setting appropriate register control (SW reset). Start -up sequence is exactly the same as that when power -on reset is triggered. Active Mode The ALS and PS can only run in active mode sequentially. Measurement data is e xpected to be available within a known fixed time. Below illustrates ALS and PS measurement sequence. ALS / PS measure Idle MCU changes operation mode to Active Mode MCU reads measurement dataMeasurement data should be available within the maximum measurement time of respective sensor Chip starts new measurement ALS / PS measure Periodic measurement according to measurement repeat time parameter of respective sensor in stand-alone mode (timing derived from internal clock) Idle MCU reads measurement data Chip starts new measurement Periodic measurement according to measurement repeat time parameter of respective sensor in stand-alone mode (timing derived from internal clock) Stand-by mode Wake- up time NOTE: If repeating rate smaller than measurement/integration time, measurement will repeat according to measurement time.

Part No. : LTR-91400 BNS-OD-FC002/A4 Below illustrates GS measurement sequence. PS measure Idle MCU changes GS operation mode to Active Mode MCU reads measurement dataMeasurement data should be available within the maximum measurement time of respective sensor Chip starts new measurement Periodic measurement according to measurement repeat time parameter of respective sensor Idle MCU reads measurement data Chip starts new measurement Periodic measurement according to measurement repeat time parameter of respective sensor Stand-by mode Wake- up time GS measure up to 32 dataset PS measure GS measure up to 32 dataset GS#1 GS#2 GS#NGS#N-1GS#3Wait Time Wait Time Wait Time NOTE: If repeating rate smaller than measurement/integration time, measurement will repeat according to measurement time. N = number of dataset. N is up to 32 dataset or lower if GS exit threshold is met. 7.4. Interrupt Features Interrupt function is active if ALS or PS measurements are outside of the upper and lower absolute threshold levels set in the appropriate threshold register. Only newly measured data is compared to the threshold levels set such that old data will not cause triggering of the INT pin if in case the threshold levels are changed in between measurements. The status of interrupt can be monitored directly through the interrupt (INT) pin or by checking contents of the interrupt register. Interrupt pin can either be enabled or disabled. The status of the ALS and PS interrupt pin/register is updated after each measurement cycle. It will reset back when corresponding data register is read or new data is out of threshold range, whichever come first. The status of the GS interrupt/pin register once triggered will keep its value unless data from the SRAM is flushed out by the user. Latest GS data will be discarded if SRAM is full. Interrupt pin IO requirements are exactly the same as those of the I2C bus pins SDA and SCL.

Part No. : LTR-91400 BNS-OD-FC002/A4 Below is the Interrupt pin illustration for absolute threshold on default setting. Below is the Interrupt pin illustration for absolute threshold with enabling NTF/FTN_Status reporting in register address 0x81 [bit 7].

Part No. : LTR-91400 BNS-OD-FC002/A4 8. Pseudo Codes Examples SLAVE Addresses Slave_Addr = 0x23 // Slave address ALS_CTRL Register // This defines the operating modes of the ALS. Default setting is 0x00 in Standby mode. Register_Addr = 0x80 // ALS_CTRL register Command = 0x01 // ALS in Active Mode // ALS in Active Mode, ALS Interrupt Enable, Command = 0x21 WriteByte(Slave_Addr, Register_Addr, Command); ALS_MEAS_RATE Register // This controls the ALS integration time and measurement rate. // Default setting of the register is 0x0B (Integration time 100ms and Measurement rate of 400ms) Register_Addr = 0x83 // ALS_MEAS_RATE register Command = 0x0B // Integration 100ms, Measurement rate =400ms // For Integration tme = 400ms, Meas rate =800ms, Command =0x1C // For Integration tme = 100ms, Meas rate =800ms, Command =0x0C WriteByte(Slave_Addr, Register_Addr, Command) ALS_THRES Registers // The ALS_THRES_UP and ALS_THRES_LOW registers determine the upper and lower limits // of the interrupt threshold value. // Following example illustrates the settings of the ALS threshold window of decimal values of // 1000 (upper threshold) and 200 (lower threshold) // Set ALS Upper threshold for Interrupt, example 1000 (decimal) Data1 = 1000 >> 8 // To convert decimal 1000 into two eight bytes register values Data0 = 1000 & 0xFF Register_Addr = 0x84 // ALS_THRES_UP_0 Register address WriteByte(Slave_Addr, Register_Addr, Data0) Register_Addr = 0x85 // ALS_THRES_UP_1 Register address WriteByte(Slave_Addr, Register_Addr, Data1) // Set ALS Lower threshold for Interrupt, example 200 (decimal) Data1 = 200 >> 8 // To convert decimal 200 into two eight bytes register values Data0 = 200 & 0xFF . Register_Addr = 0x86 // ALS_THRES_LOW_0 Register address WriteByte(Slave_Addr, Register_Addr, Data0) Register_Addr = 0x87 // ALS_THRES_LOW_1 Register address WriteByte(Slave_Addr, Register_Addr, Data1) ALS_STATUS Register (Read Only) // This Register contains the information on ALS Data valid, ALS Interrupt and ALS data status. Register_Addr = 0x9C // ALS_STATUS register address Data = ReadByte(Slave_Addr, Register_Addr) ALS_Data_Valid = Data & 0x20 // If 0x20 ALS Data is invalid (discard) // If 0x00 ALS Data is valid (usable)

Part No. : LTR-91400 BNS-OD-FC002/A4 ALS_Interrupt_Status = Data & 0x02 // If 0x02 ALS Interrupt condition fulfilled // If 0x00 ALS Interrupt condition not fulfilled ALS_Data_Status = Data & 0x01 // If 0x01 New Data // If 0x00 Old (previously read) Data ALS_CH0 DATA Registers (Read Only) // The register 0xA4 contains ALS_CH0_Data lower byte data. // The register 0xA5 contains ALS_CH0_Data upper byte data. //These registers should be read as a group, with the lower address being read first. Register_Addr = 0xA4 // ALS_CH0 DATA lower byte address Data1=ReadByte(Slave_Addr, Register_Addr) Register_Addr = 0xA5 // ALS_CH0 DATA upper byte address Data2=ReadByte(Slave_Addr, Register_Addr) ALS_CH0_Data = (Data2 << 8) | Data1 // Combining lower and upper bytes to give 16-bit ALS_CH0 data ALS_CH1 DATA Registers (Read Only) // The register 0xA6 contains ALS_CH1_Data lower byte data. // The register 0xA7 contains ALS_CH1_Data upper byte data. //These registers should be read as a group, with the lower address being read first. Register_Addr = 0xA6 // ALS_CH1 DATA lower byte address Data1=ReadByte(Slave_Addr, Register_Addr) Register_Addr = 0xA7 // ALS_CH1 DATA upper byte address Data2=ReadByte(Slave_Addr, Register_Addr) ALS_CH1_Data = (Data2 << 8) | Data1 // Combining lower and upper bytes to give 16-bit ALS_CH1 data PS_CTRL Register // This defines the operating modes of the PS. Default settings is 0x00 in Standby mode. Register_Addr = 0x81 // PS_CTRL register Command = 0x02 // PS in Active Mode // PS in Active Mode, Enable PS Interrupt, Command = 0x03 WriteByte(Slave_Addr, Register_Addr, Command); PS_LED Register // This defines the PS LED Pulse Duty, Pulse width, Boost and Drive Strength. // Default setting of the register is 0x70 Register_Addr = 0x88 // PS_LED register Command = 0x50 // Pulse Duty=25%, Pulse Width=8us, Drive=100mA WriteByte(Slave_Addr, Register_Addr, Command) PS_MEAS_RATE Register // This controls the PS measurement rate. // Default setting of the register is 0x40 Register_Addr = 0x89 // PS_MEAS_RATE register Command = 0x52 // Meas Rate = 100ms, PS 11 Bit , LED =2 pulses WriteByte(Slave_Addr, Register_Addr, Command)

Part No. : LTR-91400 BNS-OD-FC002/A4 PS_THRES_UP Registers // PS_THRES_UP registers determines the upper limit of the interrupt threshold value // Register 0x8D sets PS Interrupt upper limit, lower byte data (PS_THRES_UP_LSB) // Register 0xCD sets PS Interrupt upper limit, 3 bits of upper byte data (PS_THRES_UP_MSB) //These registers should be read as a group, with the lower address being read first. // Following example illustrates the setting of the PS dynamic threshold with hysteresis interruption for // decimal value 200 (for NEAR detection) Upper_Threshold_Value=200 // Example 200 (decimal) Data1 = Upper_Threshold _Value >> 8 // Shift right to extract the upper byte Data0 = Upper_Threshold & 0xFF // Mask to extract lower byte. Register_Addr = 0x8D // PS_THRES_UP_LSB Register address WriteByte(Slave_Addr, Register_Addr, Data0) Register_Addr = 0xCD // PS_THRES_UP_MSB Register address WriteByte(Slave_Addr, Register_Addr, Data1) PS_THRES_LOW Registers // PS_THRES_LOW registers determines the lower limit of the interrupt threshold value // Register 0x8E sets PS Interrupt lower limit, lower byte data (PS_THRES_LOW_LSB) // Register 0xCE sets PS Interrupt lower limit, 3 bits of upper byte data (PS_THRES_LOW_MSB) //These registers should be read as a group, with the lower address being read first. // Following example illustrates the setting of the PS dynamic threshold with hysteresis interruption for // decimal value 50 (for FAR detection) Lower_Threshold_Value=50 // Example 50 (decimal) Data1 = Lower _Threshold _Value >> 8 // Shift right to extract the upper byte Data0 = Lower _Threshold & 0xFF // Mask to extract lower byte. Register_Addr = 0x8E // PS_THRES_LOW_LSB Register address WriteByte(Slave_Addr, Register_Addr, Data0) Register_Addr = 0xCE // PS_THRES_LOW_MSB Register address WriteByte(Slave_Addr, Register_Addr, Data1) PS_STATUS Register (Read Only) // This Register contains the information on FTN, NTF, PS Data valid, PS Interrupt and PS data status. Register_Addr = 0x9D // PS_STATUS register address Data = ReadByte(Slave_Addr, Register_Addr) FTN = Data & 0x10 // If 0x10 FTN object detected // If 0x00 FTN object not detected NTF = Data & 0x08 // If 0x08 NTF object detected // If 0x00 NTF object not detected PS_Data_Valid = Data & 0x04 // If 0x04 PS Data is invalid (discard) // If 0x00 PS Data is valid (usable) PS_Interrupt_Status = Data & 0x02 // If 0x02 PS Interrupt condition fulfilled // If 0x00 PS Interrupt condition not fulfilled PS_Data_Status = Data & 0x01 // If 0x01 New Data // If 0x00 Old (previously read) Data

Part No. : LTR-91400 BNS-OD-FC002/A4 PS_DATA Registers (Read Only) //The register 0xB0 contains PS_Data lower byte data. //The register 0xB1 contains PS_Data 3 bits of upper byte data //These registers should be read as a group, with the lower address being read first. Register_Addr = 0xB0 // PS_DATA lower byte address Data0=ReadByte(Slave_Addr, Register_Addr) Register_Addr = 0xB1 // PS_DATA upper byte address Data=ReadByte(Slave_Addr, Register_Addr) Data1=Data&0x03 // Mask with 0x03 to extract data PS_Data = (Data1 << 8) | Data0 // Shift and combine lower and upper bytes to give 11-bit PS data GS_CTRL Register // This defines the operating modes of the GS. Default setting is 0x00 in Standby mode. Register_Addr = 0x82 // GS_CTRL register Command = 0x02 // GS in Active Mode // GS in Active Mode, Enable GS Interrupt, Command = 0x03 WriteByte(Slave_Addr, Register_Addr, Command); GS_LED Register // This defines the GS LED Pulse Duty, Pulse Width, Boost and Drive Strength. // Default setting is 0x70 Register_Addr = 0x90 // GS_LED register Command = 0x50 // Drive=100mA // Drive=50mA, Command =0x51 WriteByte(Slave_Addr, Register_Addr, Command) GS_WAIT Register // This controls the GS wait time and number of GS LED pulses. // Default setting of the register is 0x00 (No wait) Register_Addr = 0x91 // GS_WAIT register Command = 0x00 // Command = 0x00, GS LED pulses =1 WriteByte(Slave_Addr, Register_Addr, Command) GS_XTALK Register // This subtracts the register contents from the appropriate detector // Default setting of the register is 0x00 (No wait) Register_Addr = 0x96 // GXTALK_N , North detector // Register_Addr = 0x97 GXTALK_S, south // Register_Addr = 0x98 GXTALK_E, east // Register_Addr = 0x99 GXTALK_W, west Command = 0x20 // Will subtract 0x20 from North detector // thus 0xB3 (GS_NDATA) will have 0x20 less WriteByte(Slave_Addr, Register_Addr, Command)

Part No. : LTR-91400 BNS-OD-FC002/A4 GS_ENTRY Registers //GS_ENTRY compare with PS_DATA, to determine if were to enter the gesture integration. //The register 0x93 contains GS_ENTRY lower byte data (GS_ENTRY_LSB) //The register 0xC3 contains 3 bits of GS_ENTRY upper byte data (GS_ENTRY_MSB) //To set GS Entry Value GS_Entry_Value=100 Data1 = GS_Entry_Value >> 8 // Shift right to extract the upper byte Data0 = GS_Entry_Value & 0xFF // Mask to extract lower byte. Register_Addr = 0x93 // GS_ENTRY_LSB Register address WriteByte(Slave_Addr, Register_Addr, Data0) Register_Addr = 0xC3 // GS_ENTRY_MSB Register address WriteByte(Slave_Addr, Register_Addr, Data1) GS_EXIT / GS_GATE Registers // GS_EXIT compare with Gesture value, to determine if were to exit the gesture integration. // GS_GATE is the threshold value of considering there is a gesture event when the absolute delta count of // either W-E or N-S exceeding the threshold value. // To set GS Exit value Register_Addr = 0x94 // GS_EXIT Register address Command = 0x00 // GS threshold value to EXIT gesture integration WriteByte(Slave_Addr, Register_Addr, Data) // To set GS GATE Register_Addr = 0x95 // GS_THRES Register address Command = 0x00 // Always trigger gesture event // Prevent gesture event detection, command = 0xFF WriteByte(Slave_Addr, Register_Addr, Data) GS_STATUS Register (Read Only) // This Register contains the information on GS FIFO, Data, Interrupt and data status. Register_Addr = 0x9E // GS_STATUS register address Data = ReadByte(Slave_Addr, Register_Addr) GS_FIFO_Empty = Data & 0x80 // If 0x80 GS_FIFO not empty // If 0x00 GS_FIFO empty GS_FIFO_Full = Data & 0x40 // If 0x40 GS_FIFO full // If 0x00 GS_FIFO not full GS_Data_Valid = Data & 0x20 // If 0x20 GS Data is invalid (discard) // If 0x00 GS Data is valid (usable) GS_Interrupt_Status = Data & 0x10 // If 0x10 GS Interrupt condition fulfilled // If 0x00 GS Interrupt condition not fulfilled GS_Data_Status = Data & 0x08 // If 0x08 New Data // If 0x00 Old (previously read) Data

Part No. : LTR-91400 BNS-OD-FC002/A4 GS_FIFO Registers (Read Only) // This Register defines GS_FIFO address pointer, NData, SData, EData and WData Register_Addr = 0xB2 // GS_FIFO_ADDR register address Data = ReadByte(Slave_Addr, Register_Addr) Register_Addr = 0xB3 // GS_NDATA register address Data = ReadByte(Slave_Addr, Register_Addr) Register_Addr = 0xB4 // GS_SDATA register address Data = ReadByte(Slave_Addr, Register_Addr) Register_Addr = 0xB5 // GS_EDATA register address Data = ReadByte(Slave_Addr, Register_Addr) Register_Addr = 0xB6 // GS_WDATA register address Data = ReadByte(Slave_Addr, Register_Addr) INTERRUPT_PERSIST Register // This register sets the PS and ALS persist level. // The default setting is 0x00. Interrupt at every ALS and PS reading outside set thresholds. Register_Addr = 0x8F // INTERRUPT_PERSIST register Command = 0x00 // Interrupt for every ALS and PS value outside threshold // Subsequent 2 ALS and every PS value, outside threshold range, Command=0x01 // Subsequent 2 ALS and PS values, outside threshold range, Command=0x11 // Subsequent 8 ALS and subsequent 11 PS values, outside threshold range, Command=0xA7 // Subsequent 11 ALS and subsequent 8 PS values, outside threshold range, Command=0x7A WriteByte(Slave_Addr, Register_Addr, Command)

Part No. : LTR-91400 BNS-OD-FC002/A4 9. Recommended Leadfree Reflow Profile 50 100 150 200 250 300 t-TIME (SECONDS) 120 150 180 200 230 255 T - TEMPERATURE (° C) R3 R4 217 MAX 260C 60 sec to 90 sec Above 217 C HEAT UP SOLDER PASTE DRY SOLDER REFLOW COOL DOWN Process Zone Symbol T Maximum T/time or Duration Heat Up P1, R1 25C to 150C 3C/s Solder Paste Dry P2, R2 150C to 200C 100s to 180s Solder Reflow P3, R3 P3, R4 200C to 260C 260C to 200C 3C/s -6C/s Cool Down P4, R5 200C to 25C -6C/s Time maintained above liquidus point , 217C > 217C 60s to 90s Peak Temperature 260C - Time within 5C of actual Peak Temperature > 255C 20s Time 25C to Peak Temperature 25C to 260C 8mins It is recommended to perform reflow soldering no more than twice.

Part No. : LTR-91400 BNS-OD-FC002/A4 10. Moisture Proof Packaging All LTR-91400 are shipped in moisture proof package. Once opened, moisture absorption begins. This part is compliant to JEDEC J-STD-033A Level 3. 10.1. Time from Unsealing to Soldering After removal from the moisture barrier bag, the parts should be stored at the recommended storage conditions and soldered within seven days. When the moisture barrier bag is opened and the parts are exposed to the recommended storage conditions for more than seven days, the parts must be baked before reflow to prevent damage to the parts. 10.1.1. Recommended Storage Conditions Storage Temperature 10C to 30C Relative Humidity Below 60% RH 10.1.2. Baking Conditions Package Temperature Time In Reels 60C 48 hours In Bulk 100C 4 hours Baking should only be done once.

Part No. : LTR-91400 BNS-OD-FC002/A4 11. Recommended Land Pattern and Metal Stencil Aperture 11.1. Recommended Metal Stencil Aperture It is recommended that the metal stencil used for solder paste printing has a thickness (t) of 0.11mm (0.004 inches / 4 mils) or 0.127mm (0.005 inches / 5 mils). The stencil aperture opening is recommended to be 0.3mm x 0.65mm which has the same dimension as the land pattern. This is to ensure adequate printed solder paste volume and yet no shorting. Note: 1. All dimensions are in millimeters 2.45 2.25 t Aperture Opening

Part No. : LTR-91400 BNS-OD-FC002/A4 12. Package Dimension for Tape and Reel Notes: 1. 10 sprocket hole pitch cumulative tolerance ± 0.20. 2. Material : Black Conductive Polystyrene Alloy. 3. All dimensions meet E1A-481-C requirements. 4. Thickness : 0.30 ± 0.05mm. 12.1. Package Dimension of Reel Notes: 1. All dimensions are in millimeters (inches) 2. Empty component pockets sealed with top cover tape 3. 13 inch reel - 8000 pieces per reel

Part No. : LTR-91400 BNS-OD-FC002/A4 4. In accordance with ANSI/EIA 481-1-A-1994 specifications Revision Table: Version Update Page Date

1.0 Datasheet as created Total 43 13-Jul-15

1.1 Updated interrupt plot on page 32 32 14-Jan-16