Power Management

LTM4615

Linear Technology

Triple Output, Low Voltage DC/DC Module Regulator

Manufacturer: Linear Technology

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FEATURES

APPLICATIONS

DESCRIPTION

Triple Output, Low Voltage DC/DC µModule Regulator The L TM®4615 is a complete 4A dual output switching mode DC/DC power supply plus an additional 1.5A VLDO (very low dropout) linear regulator . Included in the package are the switching controllers, power FETs, inductors, a 1.5A regulator and all support components. The dual 4A DC/DC converters operate over an input voltage range of 2.375V to 5.5V , and the VLDO operates from a 1.14V to 3.5V input. The L TM4615 supports output voltages ranging from 0.8V to 5V for the DC/DC converters, and 0.4V to 2.6V for the VLDO. The three regulator output voltages are set by a single resistor for each output. Only bulk input and output capacitors are needed to complete the design. The low proﬁ le package (2.82mm) enables utilization of unused space on the bottom of PC boards for high density point of load regulation. High switching frequency and a current mode architecture enables a very fast transient response to line and load changes without sacriﬁ cing stability. The device supports output voltage tracking for supply rail sequencing. Additional features include overvoltage protection, foldback overcurrent protection, thermal shutdown and programmable soft-start. The power module is offered in a space saving and thermally enhanced 15mm × 15mm × 2.82mm LGA package. The L TM4615 is Pb-free and RoHS compliant. n Telecom and Networking Equipment n Industrial Power Systems n Low Noise Applications n FPGA, SERDES Power n Dual 4A Output Power Supply with 1.5A VLDO™ n Short-Circuit and Overtemperature Protection n Power Good Indicators Switching Regulators Section—Current Mode Control n Input Voltage Range: 2.375V to 5.5V n 4A DC Typical, 5A Peak Output Current Each n 0.8V Up to 5V Output Each, Parallelable n ± 2% Total DC Output Error n Output Voltage T racking n Up to 95% Efﬁ ciency n Programmable Soft-Start VLDO Section n VLDO, 1.14V to 3.5V Input Range n VLDO, 0.4V to 2.6V , 1.5A Output n VLDO, 40dB Supply Rejection at fSW n ± 1% Total DC Output Error n Small and Very Low Proﬁ le Package: 15mm × 15mm × 2.82mm 1.2V at 4A, 1.5V at 4A and 1V at 1A DC/DC μModule® Regulator Efﬁ ciency vs Output Current PGOOD1 PGOOD1 FB1 TRACK1 RUN/SS1 LDO_IN EN3 GND1 GND2 L TM4615 GND3 V IN1 VIN2 VOUT1 VIN 1.2V VIN 3V TO 5.5V 10k 10k 100μF 6.3V 100μF 6.3V 22μF 6.3V 10μF 6.3V 22μF 6.3V 10μF 10μF 6.3V 10μF 6.3V VOUT1 1.2V VOUT2 1.5V PGOOD2 PGOOD2 FB2 TRACK2 V IN RUN/SS2 LDO_OUT FB3 PGOOD3 PGOOD3 VOUT2 5.76k 10k

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3.32k 10k LOAD CURRENT (A) EFFICIENCY (%)

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VIN = 3.3V VOUT2 1.5V VOUT3 (VIN = 1.2V) VOUT1 1.2V L, L T , L TC, L TM, Linear Technology, the Linear logo and μModule are registered trademarks of Linear Technology Corporation. VLDO is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 5481178, 6580258, 6304066, 6127815, 6498466, 6611131, 6724174.

PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS Switching Regulators COMP1, COMP2, RUN/SS1, RUN/SS2 V Very Low Dropout Regulator Internal Operating Temperature Range (Note 1) LGA PACKAGE 144-LEAD (15mm s 15mm s 2.8mm) TOP VIEW 12345678 1 0 91 1 1 2 L K J H G F E D C B M A TJMAX = 125°C, θJC-BOTTOM = 2-3°C/W , θJA = 15°C/W , θJC-TOP = 25°C/W , wt = 1.61g

ELECTRICAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Switching Regulator Section: per Channel V IN(DC) Input DC Voltage Range l 2.375 5.5 V VOUT(DC) Output DC Voltage Range l 0.8 5.0 V VOUT(DC) Output Voltage C IN = 22μF , COUT = 100μF , RFB = 5.76k, VIN = 2.375V to 5.5V , IOUT = 0A to 4A (Note 6) 0°C ≤ T J ≤ 125°C l 1.460 1.45 1.49 1.49 1.12 1.512 V V VIN(UVLO) Undervoltage Lockout Threshold I OUT = 0A 1.6 2 2.3 V The l denotes the speciﬁ cations which apply over the full internal operating temperature range, otherwise speciﬁ cations are at TA = 25°C. VIN = 5V , LDO_IN = 1.2V unless otherwise noted. Per Typical Application Figure 12. LEAD FREE FINISH TRAY PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE L TM4615EV#PBF L TM4615EV#PBF L TM4615V 144-Lead (15mm × 15mm × 2.8mm) LGA –40°C to 125°C L TM4615IV#PBF L TM4615IV#PBF L TM4615V 144-Lead (15mm × 15mm × 2.8mm) LGA –40°C to 125°C Consult L TC Marketing for parts speciﬁ ed with wider operating temperature ranges. *The temperature grade is identiﬁ ed by a label on the shipping container . For more information on lead free part marking, go to: http://www.linear .com/leadfree/ This product is only offered in trays. For more information go to: http://www.linear .com/packaging/ ORDER INFORMATION (See Pin Functions, Pin Conﬁ guration Table)

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS IINRUSH(VIN) Input Inrush Current at Start-Up I OUT = 0A, CIN = 22μF , COUT = 100μF , VOUT = 1.5V , V IN = 5.5V 0.35 A IQ(VIN) Input Supply Bias Current V IN = 2.375V , VOUT = 1.5V , Switching Continuous VIN = 5.5V , VOUT = 1.5V , Switching Continuous Shutdown, RUN = 0, VIN = 5V 71 2 mA mA μA IS(VIN) Input Supply Current V IN = 2.375V , VOUT = 1.5V , IOUT = 4A VIN = 5.5V , VOUT = 1.5V , IOUT = 4A 3.2 1.48 A A IOUT(DC) Output Continuous Current Range V IN = 5.5V , VOUT = 1.5V (Note 6) 0 4 A ΔVOUT(LOAD + LINE) VOUT Load and Line Regulation Accuracy V OUT = 1.5V , 0A to 4A (Note 6) V IN = 2.375V to 5.5V l ±1.0 ±1.3 ±1.30 ±1.6 V OUT(AC) Output Ripple Voltage I OUT = 0A, COUT = 100μF V IN = 5V , VOUT = 1.5V 12 mV P-P fs Output Ripple Voltage Frequency I OUT = 4A, VIN = 5V , VOUT = 1.5V 1.25 MHz ΔVOUT(START) Turn-On Overshoot C OUT = 100μF , VOUT = 1.5V , RUN/SS = 10nF , IOUT = 0A V IN = 3.3V V IN = 5V mV mV tSTART Turn-On Time C OUT = 100μF , VOUT = 1.5V , IOUT = 1A Resistive Load, TRACK = VIN and RUN/SS = Float V IN = 5V 0.5 ms ΔVOUT(LS) Peak Deviation for Dynamic Load Load: 0% to 50% to 0% of Full Load, COUT = 100μF , VIN = 5V , VOUT = 1.5V 25 mV tSETTLE Settling Time for Dynamic Load Step Load: 0% to 50% to 0% of Full Load, VIN = 5V , VOUT = 1.5V 10 μs IOUT(PK) Output Current Limit C OUT = 100μF , VIN = 5V , VOUT = 1.5V 8 A VFB Voltage at FB Pin I OUT = 0A, VOUT = 1.5V l 0.790 0.786 0.8 0.8 0.807 0.809 V V IFB 0.2 μA VRUN RUN Pin On/Off Threshold 0.6 0.75 0.9 V ITRACK TRACK Pin Current 0.2 μA VTRACK(OFFSET) Offset Voltage TRACK = 0.4V 30 mV VTRACK(RANGE) T racking Input Range 0 0.8 V RFBHI Resistor Between VOUT and FB Pins 4.96 4.99 5.02 kΩ ΔVPGOOD PGOOD Range ±7.5 % RPGOOD PGOOD Resistance Open-Drain Pull-Down 90 150 Ω VLDO Section V LDO_IN Operating Voltage (Note 3) l 1.14 3.5 V IIN(LDO_IN) Operating Current I OUT = 0mA, VOUT = 1V , EN3 = 1.2V 1 mA IIN(SHDN) Shutdown Current EN3 = 0V , LDO_IN = 1.5V 0.6 20 μA VBOOST3 BOOST3 Output Voltage EN3 = 1.2V 4.8 5 5.2 V VBOOST3(UVLO) Undervoltage Lockout 4.3 V ELECTRICAL CHARACTERISTICS The l denotes the speciﬁ cations which apply over the full internal operating temperature range, otherwise speciﬁ cations are at TA = 25°C. VIN = 5V , LDO_IN = 1.2V unless otherwise noted. Per Typical Application Figure 12.

ELECTRICAL CHARACTERISTICS The l denotes the speciﬁ cations which apply over the full internal operating temperature range, otherwise speciﬁ cations are at TA = 25°C. VIN = 5V , LDO_IN = 1.2V unless otherwise noted. Per Typical Application Figure 12. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VFB3 FB3 Internal Reference Voltage 1mA ≤ I OUT ≤ 1.5A, 1.14V ≤ VLDO_IN ≤ 3.5V , BOOST3 = 5V , 1V ≤ VOUT ≤ 2.59V l 0.397 0.395 0.4 0.4 0.404 0.405 V V V LDO_OUT Output Voltage Range 0.4 2.6 V VDO Dropout Voltage V LDO_IN = 1.5V , VFB3 = 0.38V , IOUT = 1.5A (Note 4) 100 250 mV LDO_RHI LDO Top Feedback Resistor 4.96 4.99 5.02 kΩ IOUT Output Current V EN3 = 1.2V l 1.5 A ILIM Output Current Limit (Note 5) 2.5 A en Output Voltage Noise Frequency = 10Hz to 1MHz, I LOAD = 1A 300 μRMS VIH_EN3 EN3 Input High Voltage 1.14V ≤ V LDO_IN ≤ 3.5V l 1V VIL_EN3 EN3 Input Low Voltage 1.14V ≤ V LDO_IN ≤ 3.5V 0.4 V IIN_EN3 EN3 Input Current –1 1 μA VOL_PGOOD3 PGOOD Low Voltage I PGOOD3 = 2mA 0.1 0.4 V PGOOD Threshold Output Threshold Relative to VFB3 PGOOD3 High to Low PGOOD3 Low to High –14 –12 –10 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The L TM4615E is guaranteed to meet performance speciﬁ cations over the 0°C to 125°C internal operating temperature range. Speciﬁ cations over the –40°C to 125°C internal operating temperature range are assured by design, characterization and correlation with statistical process controls. The L TM4615I is guaranteed to meet speciﬁ cations over the full internal operating temperature range. Note that the maximum ambient temperature is determined by speciﬁ c operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. Note 3: Minimum operating voltage required for regulation is: V IN ≥ VOUT(MIN) + VDROPOUT Note 4: Dropout voltage is the minimum input to output differential needed to maintain regulation at a speciﬁ ed output current. In dropout the output voltage will be equal to V IN – VDROPOUT . Note 5: The IC has overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperatures will exceed 125°C when overtemperature is activated. Continuous overtemperature activation can impair long-term reliability. Note 6: See output current derating curves for different V IN, VOUT and TA.

TYPICAL PERFORMANCE CHARACTERISTICS Efﬁ ciency vs Output Current VIN = 2.5V Efﬁ ciency vs Output Current VIN = 3.3V Efﬁ ciency vs Output Current VIN = 5V Minimum Input Voltage at 4A Load Load Transient Response OUTPUT CURRENT (A) 100

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EFFICIENCY (%) VOUT = 1.8V VOUT = 1.5V VOUT = 1.2V VOUT = 0.8V OUTPUT CURRENT (A) 100

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EFFICIENCY (%) VOUT = 2.5V VOUT = 1.8V VOUT = 1.5V VOUT = 1.2V VOUT = 0.8V OUTPUT CURRENT (A) EFFICIENCY (%) 12 34

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VOUT = 3.3V VOUT = 2.5V VOUT = 1.8V VOUT = 1.5V VOUT = 1.2V VOUT = 0.8V VIN (V) VOUT (V) 0.5 1.5 2.0 2.5 3.5 0.5 2.5 3.5

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1.0 3.0 2 4.5 5.551 1.5 34 VOUT = 3.3V VOUT = 2.5V VOUT = 1.8V VOUT = 1.5V VOUT = 1.2V VOUT = 0.8V ILOAD 2A/DIV VOUT 20mV/DIV VIN = 5V VOUT = 1.2V COUT = 100μF, 6.3V CERAMICS 20μs/DIV

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VIN = 5V VOUT = 1.5V COUT = 100μF, 6.3V CERAMICS 20μs/DIV

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Load Transient Response Load Transient ResponseLoad Transient Response ILOAD 2A/DIV VOUT 20mV/DIV VIN = 5V VOUT = 1.8V COUT = 100μF, 6.3V CERAMICS 20μs/DIV

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VIN = 5V VOUT = 2.5V COUT = 100μF, 6.3V CERAMICS 20μs/DIV

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VIN = 5V VOUT = 3.3V COUT = 100μF, 6.3V CERAMICS 20μs/DIV

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TYPICAL PERFORMANCE CHARACTERISTICS Start-Up Start-Up VFB vs Temperature Current Limit Foldback Short-Circuit Protection 1.5V Short, No Load VFB3 vs Temperature Dropout Voltage vs Input Voltage Ripple Rejection VOUT 1V/DIV IIN 1A/DIV VIN = 5V VOUT = 2.5V COUT = 100μF NO LOAD (0.01μF SOFT-START CAPACITOR) 200μs/DIV

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VIN = 5V VOUT = 2.5V COUT = 100μF 4A LOAD (0.01μF SOFT-START CAPACITOR) 200μs/DIV

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TEMPERATURE (°C) –50

794 VFB (mV)

–25 50 0 25 125 10075

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OUTPUT CURRENT (A) VOUT (V) 0.6 0.8 1.0 6 8

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0.4 0.2 45 7 1.2 1.4 1.6 VIN = 5V VIN = 3.3V VIN = 2.5V VOUT = 1.5V VOUT 0.5V/DIV IIN 4A/DIV 20μs/DIV

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1.5V Short, 4A Load VOUT 0.5V/DIV IIN 1A/DIV 100μs/DIV

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TEMPERATURE (°C) –50 –25 404 403 402 401 400 399 398 397 396 75 10005 0 25 125 FB3 VOLTAGE (mV) 1mA 1.5A VBOOST3 = 5V VLDO_IN = 1.5V VLDO_OUT =1.2V

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VLDO_IN (V) 1.2 200 180 160 140 120 100 DROPOUT (mV) –40°C 25°C 85°C 125°C VFB3 = 0.38V ILDO_OUT =1.5A

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VLDO_IN (V) 1.2 RIPPLE REJECTION (dB) 1MHz 100kHz 10kHz VBOOST3 = 5V VLDO_OUT =1.2V IOUT = 800mA COUT = 10μF VLDO

TYPICAL PERFORMANCE CHARACTERISTICS Ripple Rejection Output Current Limit Delay from Enable to Power Good

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FREQUENCY (Hz) 100 1000001000 10000 1000000 1E+07 RIPPLE REJECTION (dB) VBOOST3 = 5V VLDO_IN = 1.5V VLDO_OUT =1.2V IOUT = 800mA COUT = 10μF

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VLDO_IN (V) 1.0 ILDO_OUT (A) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 CURRENT LIMIT THERMAL LIMIT VLDO_OUT = 0V TA = 25°C

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VLDO_IN (V) 1.0 DELAY (ms) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 –40°C 25°C 85°C VLDO_OUT = 0.8V RLDO_OUT = 8Ω Output Load T ransient Response IN Supply Transient Response

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ILDO_OUT 1.5A 2mA VLDO_OUT AC 20mV/DIV 50μs/DIVVLDO_OUT = 1.5V COUT = 10μF VLDO_IN = 1.7V VBOOST3 = 5V

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VLDO_IN 1.5V VLDO_OUT AC 10mV/DIV 10μs/DIVVLDO_OUT = 1.2V ILDO_OUT = 800mA COUT = 10μF VBOOST3 = 5V TA = 25°C BOOST3/OUT Start-Up BOOST3 Ripple and Feedthrough to VLDO_OUT

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VLDO_OUT HI LO 200μs/DIVTA = 25°C RLDO_OUT = 1Ω VLDO_IN = 1.7V 1.5V

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VLDO_OUT AC 5mV/DIV 20μs/DIVVLDO_OUT = 1.2V VLDO_IN = 1.5V ILDO_OUT = 1A COUT = 10μF TA = 25°C

VIN1, VIN2 (J1-J5, K1-K5); (C1-C6, D1-D5): Power Input Pins. Apply input voltage between these pins and GND pins. Recommend placing input decoupling capacitance directly between V IN pins and GND pins. VOUT1, V OUT2 (K9-K12, L9-L12, M9-M12); (C9-C12, D9-D12, E11-E12): Power Output Pins. Apply output load between these pins and GND pins. Recommend placing output decoupling capacitance directly between these pins and GND pins. Review Table 4. GND1, GND2, (H1, H7-H12, J6-J12, K6-K8 L1, L7-L8, M1-M8); (A1-A12, B1, B7-B12, C7-C8, D6-D8, E1, E8-E10): Power Ground Pins for Both Input and Output Returns. TRACK1, TRACK2 (L3, E3): Output Voltage T racking Pins. When the module is conﬁ gured as a master output, then a soft-start capacitor is placed on the RUN/SS pin to ground to control the master ramp rate, or an external ramp can be applied to the master regulator’s track pin to control it. Slave operation is performed by putting a resistor divider from the master output to the ground, and connecting the center point of the divider to this pin on the slave regulator . If tracking is not desired, then connect the TRACK pin to V IN. Load current must be present for tracking. See the Applications Information section. FB1, FB2 (L6, E6): The Negative Input of the Switching Regulators’ Error Ampliﬁ er . Internally, these pins are con- nected to VOUT with a 4.99k precision resistor . Different output voltages can be programmed with an additional resistor between the FB and GND pins. T wo power modules can current share when this pin is connected in parallel with the adjacent module’s FB pin. See the Applications Information section. FB3 (F6): The Negative Input of the LDO Error Ampliﬁ er . Internally the pin is connected to LDO_OUT with a 4.99k resistor . Different output voltages can be programmed with an additional resistor between the FB3 and GND pins. See the Applications Information section. COMP1, COMP2 (L5, E5): Current Control Threshold and Error Ampliﬁ er Compensation Point. The current comparator threshold increases with this control voltage. T wo power modules can current share when this pin is connected in parallel with the adjacent module’s COMP pin. Each channel has been internally compensated. See the Applications Information section. PGOOD1, PGOOD2 (L4, E4): Output Voltage Power Good Indicator . Open-drain logic output that is pulled to ground when the output voltage is not within ±7.5% of the regulation point. RUN/SS1, RUN/SS2 (L2, E2): Run Control and Soft-Start Pin. A voltage above 0.8V will turn on the module, and below 0.5V will turn off the module. This pin has a 1M resistor to V IN and a 1000pF capacitor to GND. See the Applications Information section for soft-start information. SW1, SW2 (H2-H6, B2-B6): The switching node of the circuit is used for testing purposes. This can be connected to copper on the board for improved thermal performance. LDO_IN (G1-G4): VLDO Input Power Pins. Place input capacitor close to these pins. LDO_OUT (G9-G12): VLDO Output Power Pins. Place output capacitor close to these pins. Minimum 1mA load is necessary for proper output voltage accuracy. BOOST3 (E7): Boost Supply for Driving the Internal VLDO NMOS Into Full Enhancement. The pin is use for testing the internal boost converter . The output is typically 5V . GND3 (F1-F5, F7, F9-F12, G6-G8): The power ground pins for both input and output returns for the internal VLDO. PGOOD3 (G5): VLDO Power Good Pin. EN3 (F8): VLDO Enable Pin.

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Figure 1. Simpliﬁ ed L TM4615 Block Diagram of Each Switching Regulator Channel and the VLDO DECOUPLING REQUIREMENTSTA = 25°C. Use Figure 1 conﬁ guration for each channel.

L TM4615 POWER MODULE DESCRIPTION Dual Switching Regulator Section The L TM4615 is a standalone dual nonisolated switching mode DC/DC power supply with an additional onboard 1.5A VLDO. It can deliver up to 4A of DC output current for each channel with few external input and output capacitors. This module provides two precisely regulated output voltages programmable via one external resistor for each channel from 0.8V DC to 5V DC over a 2.375V to 5.5V input voltage. The VLDO is an independent 1.5A linear regulator that can be powered from either switching converter . The typical application schematic is shown in Figure 12. The L TM4615 has two integrated constant frequency cur- rent mode regulators, with built-in power MOSFETs with fast switching speed. The typical switching frequency is 1.25MHz. With current mode control and internal feedback loop compensation, these switching regulators have suf- ﬁ cient stability margins and good transient performance under a wide range of operating conditions, and with a wide range of output capacitors, even all ceramic output capacitors. Current mode control provides cycle-by-cycle fast current limit. Besides, current limiting is provided in an overcurrent condition with thermal shutdown. In addition, internal overvoltage and undervoltage comparators pull the open- drain PGOOD outputs low if the particular output feedback voltage exits a ±7.5% window around the regulation point. Furthermore, in an overvoltage condition, internal top FET , M1, is turned off and bottom FET , M2, is turned on and held on until the overvoltage condition clears, or current limit is exceeded. Pulling each speciﬁ c RUN pin below 0.8V forces the spe- ciﬁ c regulator controller into its shutdown state, turning off both M1 and M2 for each power stage. At low load current, each regulator works in continuous current mode by default to achieve minimum output voltage ripple. The TRACK/SS pins are used for power supply tracking and soft-start programming for each speciﬁ c regulator . See the Applications Information section. The L TM4615 is internally compensated to be stable over the operating conditions. Table 4 provides a guideline for input and output capacitance for several operating condi- tions. The Linear Technology μModule Power Design Tool will be provided for transient and stability analysis. The FB pins are used to program the speciﬁ c output volt- age with a single resistor to ground. VLDO Section The VLDO (very low dropout) linear regulator operates from a 1.14V to 3.5V input. The VLDO uses an internal NMOS transistor as the pass device in a source-follower conﬁ guration. The BOOST3 pin is the output of an inter- nal boost converter that supplies the higher supply drive to the pass device for low dropout enhancement. The internal boost converter operates on very low current, thus optimizing high efﬁ ciency for the VLDO in close to dropout operation. An undervoltage lockout comparator on the LDO ensures that the boost voltage is greater than 4.2V before enabling the LDO, otherwise the LDO is disabled. The LDO provides a high accuracy output capable of supply 1.5A of output current with a typical drop out of 100mV . A single ceramic 10μF capacitor is all that is required for output capacitor bypassing. A low reference voltage allows the VLDO to have lower output voltages than the commonly available LDO. The device also includes current limit and thermal over- load protection. The NMOS follower architecture has fast transient response without the traditional high drive cur- rents in dropout. The VLDO includes a soft-start feature to prevent excessive current on the input during start-up. When the VLDO is enabled, the soft-start circuitry gradu- ally increases the 0.4V reference voltage over a period of approximately 200μs.

Figure 12. External component selection is primarily requirements for a particular application. Table 1. FB Resistor Table vs Various Output Voltages included inside the module for each regulator channel. long inductive leads or traces. input capacitance due to high inductance traces or leads. ripple current for the 4A maximum current is 2A or less. to 2A ripple current rating. capacitor , low ESR polymer capacitor or ceramic capacitor . The typical output capacitance range is 66μF to 100μF . the voltage droop and overshoot during a 2A/μs transient. capacitance to maximize transient performance.

in steady-state operation, but also in transient. around 150°C for each channel. accurate 4.99k resistor for the internal top feedback resistor . Figure 2 shows an example of coincident tracking.

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Figure 2. Dual Outputs (1.5V and 1.2V) with Tracking

TRACK1 is the track ramp applied to the slave’s track pin. has reached its ﬁ nal value. master’s output slew rate in Volts/Time. VTRACK. Therefore RTB = 4.99k and RTA = 10k in Figure 2. Figure 3. Output Voltage Coincident Tracking will reach it ﬁ nal value before the master output. for tracking to operate properly during power-down. monitor a ±7.5% window around the regulation point. already been internally compensated for all output voltages. pins must be tied together in parallel operation. sharing. This will balance the thermals on the design. N is the number of paralleled channels.

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used in parallel at the output. with DC bias and temperature, thus more preferred. cycle in and out of this mode with no latchup or damage. held below the regulation voltage. Figure 4. Reverse Current Limit for VLDO

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but further thermal analysis will be required for the VLDO. a 5°C margin window relative to the maximum 125°C. Figure 5. 1.2V Power Loss Figure 6. 3.3V Power Loss 30°C divided 1.9W equals a 15.7°C/W thermal resistance. under the Pin Conﬁ guration diagram.

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Figure 7. 1.2V No Heat Sink Figure 8. 1.2V Heat Sink Figure 9. 3.3V No Heat Sink Figure 10. 3.3V Heat Sink

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provided to protect each unit from catastrophic failure.

Use large PCB copper areas for high current path, including V IN, GND and VOUT. It helps to minimize the PCB conduction loss and thermal stress.
Place high frequency ceramic input and output capaci- tors next to the V IN, GND and V OUT pins to minimize high frequency noise.
Place a dedicated power ground layer underneath the unit.
To minimize the via conduction loss and reduce module thermal stress, use multiple vias for interconnection between the top layer and other power layers.
Do not put via directly on pads unless the via is capped. Figure 11 gives a good example of the recommended layout. M CIN1 GND1 CONTROL GND2 SW2 GND1 VIN1 GND1 SW1 CONTROL LD0_IN GND3 GND2 GND2 GND2 GND3 GND1 LDO_OUT VOUT2 VOUT1 VIN2 GND2

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Figure 11. Recommended PCB Layout

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Figure 12. Typical 3V to 5.5VIN, 1.5V and 1.2V at 4A and 1V at 1A Design Table 4. Output Voltage Response vs Component Matrix (Refer to Figure 12) 0A to 2.5A Load Step Typical Measured Values *Bulk capacitance is optional if VIN has very low input impedance.

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Figure 13. L TM4615 Parallel 1.2V at 8A Design, 1V at 1A Design

Figure 14. 3.3V and 2.5V at 4A with Output Voltage T racking Design, 1.8V at 1A

4615 F14

144-Lead (15mm × 15mm × 2.82mm) (Reference L TC DWG # 05-08-1816 Rev A) NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 2. ALL DIMENSIONS ARE IN MILLIMETERS LAND DESIGNATION PER JESD MO-222, SPP-010 5. PRIMARY DATUM -Z- IS SEATING PLANE 6. THE TOTAL NUMBER OF PADS: 144 DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE SYMBOL aaa bbb eee TOLERANCE 0.10 0.10 0.05 2.72 – 2.92 DETAIL B DETAIL B SUBSTRATE MOLD CAP 0.27 – 0.37 2.45 – 2.55 bbb Z Z BSC PACKAGE TOP VIEW BSC PAD 1 CORNER X Y aaa Z aaa Z DETAIL A 13.97 BSC 1.27 BSC 13.97 BSC 0.12 – 0.28 PACKAGE BOTTOM VIEW3 PADS SEE NOTES SUGGESTED PCB LAYOUT TOP VIEW 0.0000 0.6350 0.6350 1.9050 1.9050 3.1750 3.1750 4.4450 4.4450 5.7150 5.7150 6.9850 6.9850 6.9850 5.7150 5.7150 4.4450 4.4450 3.1750 3.1750 1.9050 1.9050 0.6350 0.6350 0.0000 6.9850 LGA 144 0308 REV A L TMXXXXXX mModule TRAY PIN 1 BEVEL PACKAGE IN TRAY LOADING ORIENTATION COMPONENT PIN “A1” DIA 0.630 PAD 1 3x, C (0.22 x45°) DETAIL A 0.630 ±0.025 SQ. 143x S YXeee L K J H G F E D C B M A 1234567810 91112

Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However , no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. PACKAGE DESCRIPTION L TM4615 Component LGA Pinout PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION A1 GND2 B1 GND2 C1 V IN2 D1 V IN2 E1 GND2 F1 GND3 A2 GND2 B2 SW2 C2 V IN2 D2 V IN2 E2 RUN/SS2 F2 GND3 A3 GND2 B3 SW2 C3 V IN2 D3 V IN2 E3 TRACK2 F3 GND3 A4 GND2 B4 SW2 C4 V IN2 D4 V IN2 E4 PGOOD2 F4 GND3 A5 GND2 B5 SW2 C5 V IN2 D5 V IN2 E5 COMP2 F5 GND3 A6 GND2 B6 SW2 C6 V IN2 D6 GND2 E6 FB2 F6 FB3 A7 GND2 B7 GND2 C7 GND2 D7 GND2 E7 BOOST3 F7 GND3 A8 GND2 B8 GND2 C8 GND2 D8 GND2 E8 GND2 F8 EN3 A9 GND2 B9 GND2 C9 V OUT2 D9 V OUT2 E9 GND2 F9 GND3 A10 GND2 B10 GND2 C10 V OUT2 D10 V OUT2 E10 GND2 F10 GND3 A11 GND2 B11 GND2 C11 V OUT2 D11 V OUT2 E11 V OUT2 F11 GND3 A12 GND2 B12 GND2 C12 V OUT2 D12 V OUT2 E12 V OUT2 F12 GND3 PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION G1 LDO_IN H1 GND1 J1 V IN1 K1 V IN1 L1 GND1 M1 GND1 G2 LDO_IN H2 SW1 J2 V IN1 K2 V IN1 L2 RUN/SS1 M2 GND1 G3 LDO_IN H3 SW1 J3 V IN1 K3 V IN1 L3 TRACK1 M3 GND1 G4 LDO_IN H4 SW1 J4 V IN1 K4 V IN1 L4 PGOOD1 M4 GND1 G5 PGOOD3 H5 SW1 J5 V IN1 K5 V IN1 L5 COMP1 M5 GND1 G6 GND3 H6 SW1 J6 GND1 K6 GND1 L6 FB1 M6 GND1 G7 GND3 H7 GND1 J7 GND1 K7 GND1 L7 GND1 M7 GND1 G8 GND3 H8 GND1 J8 GND1 K8 GND1 L8 GND1 M8 GND1 G9 LDO_OUT H9 GND1 J9 GND1 K9 V OUT1 L9 V OUT1 M9 V OUT1 G10 LDO_OUT H10 GND1 J10 GND1 K10 V OUT1 L10 V OUT1 M10 V OUT1 G11 LDO_OUT H11 GND1 J11 GND1 K11 V OUT1 L11 V OUT1 M11 V OUT1 G12 LDO_OUT H12 GND1 J12 GND1 K12 V OUT1 L12 V OUT1 M12 V OUT1

Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear .com © LINEAR TECHNOLOGY CORPORATION 2009 LT 0709 • PRINTED IN USA RELATED PARTS PART NUMBER DESCRIPTION COMMENTS L TM4600HV 10A DC/DC μModule 4.5V ≤ V IN ≤ 28V , 0.6V ≤ VOUT ≤ 5V , LGA Package L TM4600HVMP Military Plastic 10A DC/DC μModule Guaranteed Operation from –55°C to 125°C Ambient, LGA Package L TM4601/L TM4601A 12A DC/DC μModule with PLL, Output T racking/Margining and Remote Sensing Synchronizable PolyPhase Operation, L TM4601-1/L TM4601A-1 Version Has No Remote Sensing, LGA Package L TM4602 6A DC/DC μModule Pin Compatible with the L TM4600, LGA Package L TM4603 6A DC/DC μModule with PLL and Output T racking/ Margining and Remote Sensing Synchronizable, PolyPhase Operation, L TM4603-1 Version Has No Remote Sensing, Pin Compatible with the L TM4601, LGA Package L TM4604A Low V IN 4A DC/DC μModule 2.375V ≤ VIN ≤ 5.5V , 0.8V ≤ VOUT ≤ 5V , 9mm × 15mm × 2.3mm L TM4605 5A to 12A Buck-Boost μModule 4.5V ≤ VIN ≤ 20V , 0.8V ≤ VOUT ≤ 16V , 15mm × 15mm × 2.8mm L TM4607 5A to 12A Buck-Boost μModule 4.5V ≤ VIN ≤ 36V , 0.8V ≤ VOUT ≤ 25V , 15mm × 15mm × 2.8mm L TM4608A Low V IN 8A DC/DC Step-Down μModule 2.7V ≤ VIN ≤ 5.5V , 0.6V ≤ VOUT ≤ 5V , 9mm × 15mm × 2.8mm L TM4614 Dual 4A Low V IN DC/DC μModule 2.375V ≤ VIN ≤ 5.5V , 0.8V ≤ VOUT ≤ 5V , 15mm × 15mm × 2.8mm L TM4616 Dual 8A Low V IN DC/DC μModule Current Share Input or Output, Similar to L TM4608, 15mm × 15mm × 2.8mm L TM8022 High V IN 1A DC/DC Step-Down μModule 3.6V ≤ VIN ≤ 36V , 0.8V ≤ VOUT ≤ 10V , 11.25mm × 9mm × 2.8mm L TM8023 High V IN 2A DC/DC Step-Down μModule 3.6V ≤ VIN ≤ 36V , 0.8V ≤ VOUT ≤ 10V , 11.25mm × 9mm × 2.8mm PolyPhase is a registered trademark of Linear Technology Corporation. PACKAGE PHOTOGRAPH

Product Information

LTM4615 specifications and overview.

Summary

Triple Output, Low Voltage DC/DC Module Regulator

Description

Triple Output, Low Voltage DC/DC Module Regulator

Source title LTM4615_15 Datasheet(PDF) - Linear Technology

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