LTM4605 LINER | Alldatasheet

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VIN (V) 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 EFFICIENCY (%) POWER LOSS (W)

4605 TA01b

VOUT = 12V ILOAD = 5A f = 200kHz TYPICAL APPLICATION

FEATURES

APPLICATIONS

DESCRIPTION

High Effi ciency Buck-Boost DC/DC µModule The L TM®4605 is a high effi ciency switching mode buck- boost power supply. Included in the package are the switching controller , power FETs, and support components. Operating over an input voltage range of 4.5V to 20V , the L TM4605 supports an output voltage range of 0.8V to 16V , set by a resistor . This high effi ciency design delivers up to 5A continuous current in boost mode (12A in buck mode). Only the inductor , sense resistor , bulk input and output capacitors are needed to fi nish the design. The low profi le package enables utilization of unused space on the bottom of PC boards for high density point of load regulation. The high switching frequency and current mode architecture enable a very fast transient response to line and load changes. The L TM4605 can be frequency synchronized with an external clock to reduce undesirable frequency harmonics. Fault protection features include overvoltage and foldback current protection. The DC/DC μModule™ is offered in a small and thermally enhanced 15mm × 15mm × 2.8mm LGA package. The L TM4605 is Pb-free and RoHS compliant. 12V/5A Buck-Boost DC/DC μModule with 4.5V to 20V Input n Single Inductor Architecture Allows VIN Above, Below or Equal to VOUT n Wide V IN Range: 4.5V to 20V n Wide V OUT Range: 0.8V to 16V n 5A DC Typical (12A DC Typical at Buck Mode) n High Effi ciency Up to 98% n Current Mode Control n Power Good Output Signal n Phase-Lockable Fixed Frequency: 200kHz to 400kHz n Ultra-Fast T ransient Response n Current Foldback Protection n Output Overvoltage Protection n Small, Low Profi le Surface Mount LGA Package (15mm × 15mm × 2.8mm) n Telecom, Servers and Networking Equipment n Industrial and Automotive Equipment n High Power Battery-Operated Devices Effi ciency and Power Loss vs Input Voltage VOUT FCB RUN SW1 SW2 RSENSE SENSE–SS VFBSGND PLLIN L TM4605 4.7μH 7.15k 10μF 35V 330μF 25V

4605 TA01

V IN PGND VIN 4.5V TO 20V 0.1μF 10μF 35V ON/OFF SENSE+ 6mΩ L, L T , L TC and L TM are registered trademarks of Linear Technology Corporation. Burst Mode is a registered trademark of Linear Technology Corporation. μModule is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners.

PIN CONFIGURATIONABSOLUTE MAXIMUM RATINGS Operating Temperature Range (See Table 6. Pin Assignment) LGA PACKAGE 141-LEAD (15mm s 15mm s 2.8mm) BANK 2 BANK 1 BANK 3 BANK 4 BANK 5 BANK 6 TOP VIEW 12345678 1 0 91 1 1 2 L K J H G F E D C B M A TJMAX = 125°C, θJP = 4°C/W WEIGHT = 1.5g ORDER INFORMATION ELECTRICAL CHARACTERISTICS The l denotes the specifi cations which apply over the –40°C to 85°C temperature range, otherwise specifi cations are at TA = 25°C, VIN = 12V . Per typical application (front page) confi guration. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Input Specifi cations VIN(DC) Input DC Voltage l 4.5 20 V VIN(UVLO) Undervoltage Lockout Threshold V IN Falling l 3.4 4 V IQ(VIN) Input Supply Bias Current Normal Standby Shutdown Supply Current V RUN = 0V , VSTBYMD > 2V VRUN = 0V , VSTBYMD = Open 2.8 1.6 35 60 mA mA μA LEAD FREE FINISH PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE L TM4605EV#PBF L TM4605V 141-Lead (15mm × 15mm × 2.8mm) LGA –40°C to 85°C L TM4605IV#PBF L TM4605V 141-Lead (15mm × 15mm × 2.8mm) LGA –40°C to 85°C Consult L TC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi ed by a label on the shipping container . For more information on lead free part marking, go to: http://www.linear .com/leadfree/ This product is only offered in trays. For more information go to: http://www.linear .com/packaging/

ELECTRICAL CHARACTERISTICS The l denotes the specifi cations which apply over the –40°C to 85°C temperature range, otherwise specifi cations are at TA = 25°C, VIN = 12V . Per typical application (front page) confi guration. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Output Specifi cations IOUTDC Output Continuous Current Range (See Output Current Derating Curves for Different V IN, VOUT and TA) VIN = 12V , VOUT = 5V VIN = 6V , VOUT = 12V A A ΔVFB/VFB(NOM) Reference Voltage Line Regulation Accuracy VIN = 4.5V to 20V , VCOMP = 1.2V (Note 3) 0.002 0.02 % ΔVFB/VFB(LOAD) Load Regulation Accuracy V COMP = 1.2V to 0.7V VCOMP = 1.2V to 1.8V (Note 3) l l 0.15 –0.15 0.5 –0.5 Switch Section M1 tr Turn-On Time (Note 4) Drain to Source Voltage V DS = 12V , Bias Current ISW = 10mA 50 ns M1 tf Turn-Off Time Drain to Source Voltage V DS = 12V , Bias Current ISW = 10mA 40 ns M3 tr Turn-On Time Drain to Source Voltage V DS = 12V , Bias Current ISW = 10mA 25 ns M3 tf Turn-Off Time Drain to Source Voltage V DS = 12V , Bias Current ISW = 10mA 20 ns M2, M4 tr Turn-On Time Drain to Source Voltage V DS = 12V , Bias Current ISW = 10mA 20 ns M2, M4 tf Turn-Off Time Drain to Source Voltage V DS = 12V , Bias Current ISW = 10mA 20 ns t1d M1 Off to M2 On Delay (Note 4) Drain to Source Voltage V DS = 12V , Bias Current ISW = 10mA 50 ns t2d M2 Off to M1 On Delay Drain to Source Voltage V DS = 12V , Bias Current ISW = 10mA 50 ns t3d M3 Off to M4 On Delay Drain to Source Voltage V DS = 12V , Bias Current ISW = 10mA 50 ns t4d M4 Off to M3 On Delay Drain to Source Voltage V DS = 12V , Bias Current ISW = 10mA 50 ns Mode T ransition 1 M2 Off to M4 On Delay Drain to Source Voltage V DS = 12V , Bias Current ISW = 10mA 220 ns Mode T ransition 2 M4 Off to M2 On Delay Drain to Source Voltage V DS = 12V , Bias Current ISW = 10mA 220 ns M1 RDS(ON) Static Drain-to-Source On- Resistance Bias Current ISW = 3A 6.5 mΩ M2 RDS(ON) Static Drain-to-Source On- Resistance Bias Current ISW = 3A 8 12 mΩ M3 RDS(ON) Static Drain-to-Source On- Resistance Bias Current ISW = 3A 8 12 mΩ M4 RDS(ON) Static Drain-to-Source On- Resistance Bias Current ISW = 3A 8 12 mΩ Oscillator and Phase-Locked Loop fNOM Nominal Frequency V PLLFL TR = 1.2V 260 300 330 kHz fLOW Lowest Frequency V PLLFL TR = 0V 170 200 220 kHz fHIGH Highest Frequency V PLLFL TR = 2.4V 340 400 440 kHz RPLLIN PLLIN Input Resistance 50 kΩ IPLLFL TR Phase Detector Output Current f PLLIN < fOSC fPLLIN > fOSC –15 μA μA

Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The L TM4605E is guaranteed to meet performance specifi cations from 0°C to 85°C. Specifi cations over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. The L TM4605I is guaranteed over the –40°C to 85°C temperature range. Note 3: The L TM4605 is tested in a feedback loop that servos V COMP to a specifi ed voltage and measures the resultant VFB. Note 4: Turn-on and turn-off time are measured using 10% and 90% levels. T ransition delay time is measured using 50% levels. Note 5: 100% tested at wafer level only. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Control Section VFB Feedback Reference Voltage V COMP = 1.2V l 0.792 0.8 0.808 V VRUN RUN Pin ON/OFF Threshold 1 1.6 2.2 V ISS Soft-Start Charging Current V RUN = 2.2V 1 1.7 μA VSTBYMD(START) Start-Up Threshold V STBYMD Rising 0.4 0.7 V VSTBYMD(KA) Keep-Active Power On Threshold V STBYMD Rising, VRUN = 0V 1.25 V VFCB Forced Continuous Threshold 0.76 0.8 0.84 V IFCB Forced Continuous Pin Current V FCB = 0.85V –0.3 –0.2 –0.1 μA VBURST Burst Inhibit (Constant Frequency) Threshold Measured at FCB Pin 5.3 5.5 V DF(BOOST , MAX) Maximum Duty Factor % Switch M4 On 99 % DF(BUCK, MAX) Maximum Duty Factor % Switch M1 On 99 % tON(MIN, BUCK) Minimum On-Time for Synchronous Switch in Buck Operation Switch M1 (Note 5) 200 250 ns RFBHI Resistor Between V OUT and VFB pins 99.5 100 100.5 kΩ Internal VCC Regulator INTVCC Internal VCC Voltage V IN > 7V , VEXTVCC = 5V l 5.7 6 6.3 V ΔVLDO/VLDO Internal VCC Load Regulation I CC = 0mA to 20mA, VEXTVCC = 5V 0.3 2 % VEXTVCC EXTVCC Switchover Voltage I CC = 20mA, VEXTVCC Rising l 5.4 5.6 V ΔVEXTVCC(HYS) EXTVCC Switchover Hysteresis 300 mV ΔVEXTVCC EXTVCC Switch Drop Voltage I CC = 20mA, VEXTVCC = 6V 60 150 mV Current Sensing Section V SENSE(MAX) Maximum Current Sense Threshold Boost Mode Buck Mode l l –95 160 –130 190 –150 mV mV VSENSE(MIN, BUCK) Minimum Current Sense Threshold Discontinuous Mode –6 mV ISENSE Sense Pins Total Source Current V SENSE– = VSENSE+ = 0V –380 μA PGOOD ΔVFBH PGOOD Upper Threshold V FB Rising 5.5 7.5 10 % ΔVFBL PGOOD Lower Threshold V FB Falling –5.5 –7.5 –10 % ΔVFB(HYS) PGOOD Hysteresis V FB Returning 2.5 % VPGL PGOOD Low Voltage I PGOOD = 2mA 0.2 0.3 V IPGOOD PGOOD Leakage Current V PGOOD = 5V 1 μA ELECTRICAL CHARACTERISTICS The l denotes the specifi cations which apply over the –40°C to 85°C temperature range, otherwise specifi cations are at TA = 25°C, VIN = 12V . Per typical application (front page) confi guration.

LOAD CURRENT (A) EFFICIENCY (%) 36 1 2 9

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18VIN TO 2.5VOUT 12VIN TO 2.5VOUT 5VIN TO 2.5VOUT 100 LOAD CURRENT (A) 0.01 EFFICIENCY (%) 100 0.1 1 10

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LOAD CURRENT (A) 0.01 EFFICIENCY (%) 100 0.1 1 10

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LOAD CURRENT (A) 0.01 EFFICIENCY (%) 0.1 1 100 10

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LOAD CURRENT (A) EFFICIENCY (%) 36 1 2 9

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LOAD CURRENT (A) EFFICIENCY (%) 36 1 2 9

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18VIN TO 3.3VOUT 12VIN TO 3.3VOUT 5VIN TO 3.3VOUT 100 TYPICAL PERFORMANCE CHARACTERISTICS Effi ciency vs Load Current 6VIN to 12VOUT Effi ciency vs Load Current 12V IN to 12VOUT Effi ciency vs Load Current 18V IN to 12VOUT Effi ciency vs Load Current 3.3μH Inductor (CCM) Effi ciency vs Load Current 1.5μH Inductor (CCM) Effi ciency vs Load Current 1.5μH Inductor (CCM) T ransient Response from IN to 12VOUT T ransient Response from 12V IN to 12VOUT T ransient Response from 18V IN to 12VOUT (Refer to Figure 16) LOAD STEP: 0A TO 3A AT CCM OUTPUT CAPS: 4x 22μF CERAMIC CAPS AND 2x 180μF ELECTROL YTIC CAPS 2x 15mΩ SENSING RESISTORS 200μs/DIV

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LOAD STEP: 0A TO 3A AT CCM OUTPUT CAPS: 4x 22μF CERAMIC CAPS AND 2x 180μF ELECTROL YTIC CAPS 2x 15mΩ SENSING RESISTORS 200μs/DIV

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LOAD STEP: 0A TO 4A AT CCM OUTPUT CAPS: 4x 22μF CERAMIC CAPS AND 2x 180μF ELECTROL YTIC CAPS 2x 15mΩ SENSING RESISTORS 200μs/DIV

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0.22μF SOFT-START CAP OUTPUT CAPS: 4x 22μF CERAMIC CAPS AND 2x 180μF ELECTROL YTIC CAPS 2x 15mΩ SENSING RESISTORS 50ms/DIV

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0.22μF SOFT-START CAP OUTPUT CAPS: 4x 22μF CERAMIC CAPS AND 2x 180μF ELECTROL YTIC CAPS 2x 15mΩ SENSING RESISTORS 50ms/DIV

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TYPICAL PERFORMANCE CHARACTERISTICS Start-Up with 6VIN to 12VOUT at IOUT = 5A Start-Up with 18VIN to 12VOUT at IOUT = 5A Short Circuit with 6VIN to 12VOUT at IOUT = 5A Short Circuit with 18VIN to 12VOUT at IOUT = 5A OUTPUT CAPS: 4x 22μF CERAMIC CAPS AND 2x 180μF ELECTROL YTIC CAPS 2x 15mΩ SENSING RESISTORS 20μs/DIV

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OUTPUT CAPS: 4x 22μF CERAMIC CAPS AND 2x 180μF ELECTROL YTIC CAPS 2x 15mΩ SENSING RESISTORS 100μs/DIV

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VIN (Bank 1): Power Input Pins. Apply input voltage be- tween these pins and PGND pins. Recommend placing input decoupling capacitance directly between V IN pins and PGND pins. VOUT (Bank 5): Power Output Pins. Apply output load between these pins and PGND pins. Recommend placing output decoupling capacitance directly between these pins and PGND pins. PGND (Bank 6): Power Ground Pins for Both Input and Output Returns. SW1, SW2 (Bank 4, Bank 2): Switch Nodes. The power inductor is connected between SW1 and SW2. R SENSE (Bank 3): Sensing Resistor Pin. The sensing resis- tor is connected from this pin to PGND. SENSE+ (Pin A4): Positive Input to the Current Sense and Reverse Current Detect Comparators. SENSE– (Pin A5): Negative Input to the Current Sense and Reverse Current Detect Comparators. EXTVCC (Pin F6): External VCC Input. When EXTVCC exceeds 5.7V , an internal switch connects this pin to INTVCC and shuts down the internal regulator so that the controller and gate drive power is drawn from EXTV CC. Do not exceed 7V at this pin and ensure that EXTVCC < VIN. INTVCC (Pin F5): Internal 6V Regulator Output. This pin is for additional decoupling of the 6V internal regulator . PLLIN (Pin B9): External Clock Synchronization Input to the Phase Detector . This pin is internally terminated to SGND with a 50k resistor . The phase-locked loop will force the rising bottom gate signal of the controller to be synchronized with the rising edge of PLLIN signal. PLLFL TR (Pin B8): The lowpass fi lter of the phase-locked loop is tied to this pin. This pin can also be used to set the frequency of the internal oscillator with an AC or DC voltage. See the Applications Information section for details. SS (Pin A6): Soft-Start Pin. Soft-start reduces the input power sources’ surge currents by gradually increasing the controller’s current limit. STBYMD (Pin A10): LDO Control Pin. Determine whether the internal LDO remains active when the controller is shut down. See Operations section for details. If the STBYMD pin is pulled to ground, the SS pin is internally pulled to ground to disable start-up and thereby providing a single control pin for turning off the controller . An internal de- coupling capacitor is tied to this pin. V FB (Pin B6): The Negative Input of the Error Amplifi er . Internally, this pin is connected to VOUT with a 100k preci- sion resistor . Different output voltages can be programmed with an additional resistor between V FB and SGND pins. See the Applications Information section. FCB (Pin A9): Forced Continuous Control Input. The voltage applied to this pin sets the operating mode of the module. When the applied voltage is less than 0.8V , the forced continuous current mode is active in boost operation and the skip cycle mode is active in buck operation. When the pin is tied to INTV CC, the constant frequency discontinuous current mode is active in buck or boost operation. See the Applications Information section. SGND (Pin A7): Signal Ground Pin. This pin connects to PGND at output capacitor point. COMP (Pin B7): Current Control Threshold and Error Amplifi er Compensation Point. The current comparator threshold increases with this control voltage. The voltage ranges from 0V to 2.4V . PGOOD (Pin B5): Output Voltage Power Good Indicator . Open drain logic output that is pulled to ground when the output voltage is not within ±10% of the regulation point, after a 25μs power bad mask timer expires. RUN (Pin A8): Run Control Pin. A voltage below 1.6V will turn off the module. There is a 100k resistor between the RUN pin and SGND in the module. Do not apply more than 6V to this pin. See Applications Information section.

Figure 1. Simplifi ed L TM4605 Block Diagram

to 200kHz or tied to 2.4V to yield approximately 400kHz. ing the oscillator to its minimum frequency. Figure 2. Frequency vs PLLFL TR Pin Voltage a clock on the PLLIN pin to turn on the phase lock loop. the regulator , the phase-lock loop function is disabled. the different operation modes. Table 2. Different Operating Modes variable “sleep” interval depending upon the load current. buck mode for one cycle to discharge inductor current. provide low noise, constant frequency operation.

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For a buck converter , the switching duty-cycle can be estimated as: D V V OUT IN Without considering the inductor current ripple, the RMS current of the input capacitor can be estimated as: I I DDCIN RMS OUT MAX ()  ()=− η 1 In the above equation, η is the estimated effi ciency of the power module. C IN can be a switcher-rated electrolytic aluminum capacitor , OS-CON capacitor or high volume ceramic capacitors. Note the capacitor ripple current rat- ings are often based on temperature and hours of life. This makes it advisable to properly derate the input capacitor , or choose a capacitor rated at a higher temperature than required. Always contact the capacitor manufacturer for derating requirements. Output Capacitors In boost mode, the discontinuous current shifts from the input to the output, so the output capacitor C OUT must be capable of reducing the output voltage ripple. For boost and buck modes, the steady ripple due to charg- ing and discharging the bulk capacitance is given by: V IV V CRIPPLE BOOST OUT MAX OUT IN MIN OUT () ( )  −() VfOUT V VV V LC VRIPPLE BUCK OUT IN MAX OUT OUT ()   −()

8 IIN MAX f()  2

The steady ripple due to the voltage drop across the ESR (effective series resistance) is given by: V I ESRESR BUCK L MAX,( ) =Δ V I ESRESR BOOST L MAX,( ) = The L TM4605 is designed for low output voltage ripple. The bulk output capacitors defi ned as C OUT are chosen with low enough ESR to meet the output voltage ripple and transient requirements. C OUT can be a low ESR tanta- lum capacitor , a low ESR polymer capacitor or a ceramic capacitor . Multiple capacitors can be placed in parallel to meet the ESR and RMS current handling requirements. The typical capacitance is 300μF . Additional output fi ltering may be required by the system designer , if further reduction of output ripple or dynamic transient spike is required. Table 3 shows a matrix of different output voltages and output capacitors to minimize the voltage droop and overshoot at a current transient. Inductor Selection The inductor is chiefl y decided by the required ripple cur- rent and the operating frequency. The inductor current ripple ΔI L is typically set to 20% to 40% of the maximum inductor current. In the inductor design, the worst cases in continuous mode are considered as follows: L VV V Vf IBOOST IN OUT MAX IN OUT MAX OUT −() () ( MMAX Ripple) % L VV V Vf IBUCK OUT IN MAX OUT IN MAX OUT M −() () ( AAX Ripple) % where: f is operating frequency, Hz Ripple% is allowable inductor current ripple, % V OUT(MAX) is maximum output voltage, V V IN(MAX) is maximum input voltage, V V OUT is output voltage, V I OUT(MAX) is maximum output load current, A The inductor should have low DC resistance to reduce the I2R losses, and must be able to handle the peak inductor current without saturation. To minimize radiated noise, use a toroid, pot core or shielded bobbin inductor . Please refer to Table 3 for the recommended inductors for dif- ferent cases.

RSENSE Selection and Maximum Output Current RSENSE is chosen based on the required inductor current. Since the maximum inductor valley current at buck mode is much lower than the inductor peak current at boost mode, different sensing resistors are suggested to use in buck and boost modes. The current comparator threshold sets the peak of the inductor current in boost mode and the maximum inductor valley current in buck mode. In boost mode, the allowed maximum average load current is: I mV R IV VOUT MAX BOOST SENSE LI N (, ) =−⎛ 160 Δ OOUT where ΔIL is peak-to-peak inductor ripple current. In buck mode, the allowed maximum average load cur- rent is: I mV R I OUT MAX BUCK SENSE L (, ) =+130 Δ The maximum current sensing RSENSE value for the boost mode is: R mV V I SENSE MAX BOOST IN OUT MAX BOO (, ) 2 160

2 SST OUT L INVI V)  +Δ

The maximum current sensing RSENSE value for the buck mode is: R mV IISENSE MAX BUCK OUT MAX BUCK (, ) (, ) –= 2 130 2 Δ LL A 20% to 30% margin on the calculated sensing resistor is usually recommended. Please refer to Table 3 for the rec- ommended sensing resistors for different applications. Soft-Start The SS pin provides a means to soft-start the regulator . A capacitor on this pin will program the ramp rate of the output voltage. A 1.7μA current source will charge up the external soft-start capacitor . This will control the ramp of the internal reference and the output voltage. The total soft-start time can be calculated as: t VC µASOFTSTART SS= 24 When the RUN pin falls below 1.6V , then soft-start pin is reset to allow for proper soft-start control when the regula- tor is enabled again. Current foldback and force continuous mode are disabled during the soft-start process. The soft- start function can also be used to control the output ramp up time, so that another regulator can be easily tracked. Do not apply more than 6V to the SS pin. Run Enable The RUN pin is used to enable the power module. The pin can be driven with a logic input, and not exceed 6V . The RUN pin can also be used as an undervoltage lockout (UVLO) function by connecting a resistor from the input supply to the RUN pin. The equation: VU V L O Rk k V_ . = + 100 100 16 Power Good The PGOOD pin is an open drain pin that can be used to monitor valid output voltage regulation. This pin monitors a ±7.5% window around the regulation point, and tracks with margining. COMP Pin This pin is the external compensation pin. The module has already been internally compensated for most output voltages. A spice model will be provided for other control loop optimization. Fault Conditions: Current Limit and Overcurrent Foldback L TM4605 has a current mode controller , which inherently limits the cycle-by-cycle inductor current not only in steady state operation, but also in transient. Refer to Table 3. To further limit current in the event of an overload condi- tion, the L TM4605 provides foldback current limiting. If the

output voltage falls by more than 70%, then the maximum output current is progressively lowered to about 30% of its full current limit value for boost mode and about 40% for buck mode. Standby Mode (STBYMD) The standby mode (STBYMD) pin provides several choices for start-up and standby operational modes. If the pin is pulled to ground, the SS pin is internally pulled to ground, preventing start-up and thereby providing a single control pin for turning off the controller . If the pin is left open or decoupled with a capacitor to ground, the SS pin is internally provided with a starting current, permitting external control for turning on the controller . If the pin is connected to a voltage greater than 1.25V , the internal regulator (INTV CC) will be on even when the controller is shut down (RUN pin voltage <1.6V). In this mode, the onboard 6V linear regulator can provide power to keep-alive functions such as a keyboard controller . INTV CC and EXTVCC An internal P-channel low dropout regulator produces 6V at the INTVCC pin from the VIN supply pin. INTVCC powers the control chip and internal circuitry within the module. The L TM4605 also provides the external supply voltage pin EXTVCC. When the voltage applied to EXTVCC rises above 5.7V , the internal regulator is turned off and an internal switch connects the EXTV CC pin to the INTVCC pin thereby supplying internal power . The switch remains close as long as the voltage applied to EXTV CC remains above 5.5V . This allows the MOSFET driver and control power to be derived from the output when (5.7V < V OUT < 7V) and from the internal regulator when the output is out of regulation (start- up, short-circuit). If more current is required through the EXTV CC switch than is specifi ed, an external Schottky diode can be interposed between the EXTVCC and INTVCC pins. Ensure that EXTVCC ≤ VIN. The following list summarizes the three possible connec- tions for EXTVCC: 1. EXTVCC left open (or grounded). This will cause INTVCC to be powered from the internal 6V regulator at the cost of a small effi ciency penalty. 2. EXTV CC connected directly to V OUT (5.7V < V OUT < 7V). This is the normal connection for a 6V regulator and provides the highest effi ciency. 3. EXTV CC connected to an external supply. If an external supply is available in the 5.5V to 7V range, it may be used to power EXTV CC provided it is compatible with the MOSFET gate drive requirements. Thermal Considerations and Output Current Derating In different applications, the L TM4605 operates in a variety of thermal environments. The maximum output current is limited by the environmental thermal condition. Suffi cient cooling should be provided to ensure reliable operation. When the cooling is limited, proper output current de-rating is necessary, considering ambient temperature, airfl ow, input/ output condition, and the need for increased reliability. The power loss curves in Figures 5 and 6 can be used in coordination with the load current derating curves in Figures 7 to 12 for calculating an approximate θ JA for the module. Column designation delineates between no heatsink, and a BGA heatsink. Each of the load current derating curves will lower the maximum load current as a function of the increased ambient temperature to keep the maximum junction temperature of the power module at 115°C maximum. This will allow a safe margin to work at the maximum operating temperature below 125°C. Each of the derating curves and the power loss curve that corresponds to the correct output voltage can be used to solve for the approximate θ JA of the condition. A complete explanation of the thermal characteristics is provided in the thermal application note for the L TM4605. DESIGN EXAMPLES Buck Mode Operation As a design example, use input voltage V IN = 12V to 20V , VOUT = 12V and f = 400kHz. Set the PLLFL TR pin at 2.4V or more for 400kHz frequency and connect FCB to ground for continuous current mode operation. If a divider is used to set the frequency as shown in Figure 14, the bottom resistor R3 is recommended not to exceed 1k.

all inputs, the 3.3μH inductor can be selected. the sensing resistor as 8mΩ. ability to handle the large RMS current into the converter . the input voltage of 20V with the current ripple at 3.5A. Set the PLLFL TR pin and RFB as in buck mode. Figure 4. shows the current ripple ratio at different input all inputs, the 3.3μH inductor can be selected. Figure 3. Current Ripple Ratio at Different Inputs for Buck Mode

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the sensing resistor as 7mΩ. compromised by long inductive leads or traces. voltage of 5V with the peak inductor current at 14A. resistor used in the wide input mode operation. provided to protect each unit from catastrophic failure. Figure 4. Current Ripple Ratio at Different Inputs for Boost Mode

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Table 3. Typical Components (f = 400kHz) may decrease the maximum load current.

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Figure 7. 5VIN to 12VOUT without Heatsink Figure 8. 5V IN to 12VOUT with Heatsink Figure 9. 5VIN to 16VOUT without Heatsink Figure 10. 5V IN to 16VOUT with Heatsink Figure 5. 5VIN Power Loss Figure 6. 20V IN Power Loss

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Figure 11. 20VIN to 12VOUT without Heatsink Figure 12. 20V IN to 12VOUT with Heatsink

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  • Use large PCB copper areas for high current path, includ- ing V IN, RSENSE, SW1, SW2, PGND and VOUT. It helps to minimize the PCB conduction loss and thermal stress.
  • Place high frequency input and output ceramic capaci- tors next to the VIN, PGND and VOUT pins to minimize high frequency noise
  • Route SENSE – and SENSE+ leads together with minimum PC trace spacing. Avoid sense lines passing through noisy areas, such as switch nodes.
  • Place a dedicated power ground layer underneath the unit.
  • To minimize the via conduction loss and reduce module thermal stress, use multiple vias for interconnection between the top layer and other power layers
  • Do not put vias directly on pads, unless the vias are capped.
  • Use a separated SGND ground copper area for com- ponents connected to signal pins. Connect the SGND to PGND underneath the unit.

Figure 13. gives a good example of the recommended Figure 13. Recommended PCB Layout

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Figure 14. Buck Mode Operation with 12V to 20V Input

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Figure 15. Boost Mode Operation with 4.5V to 12V Input

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Figure 16. Wide Input Mode with 4.5V to 20V Input, 12V at 5A Output

Figure 18. T wo-Phase Parallel, 12V at 10A Design

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4605 TA05

Figure 17. 5V at 12A Design with Low Switching Noise (Optional)

Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However , no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. PACKAGE DESCRIPTION NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 2. ALL DIMENSIONS ARE IN MILLIMETERS LAND DESIGNATION PER JESD MO-222, SPP-010 5. PRIMARY DATUM -Z- IS SEATING PLANE 6. THE TOTAL NUMBER OF PADS: 141 DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE SYMBOL aaa bbb eee TOLERANCE 0.10 0.10 0.05 2.72 – 2.92 DETAIL B DETAIL B SUBSTRATE MOLD CAP 0.27 – 0.37 2.45 – 2.55 bbb Z Z BSC PACKAGE TOP VIEW BSC PAD 1 CORNER X Y aaa Z aaa Z DETAIL A 13.97 BSC 1.27 BSC 13.97 BSC 0.12 – 0.28 PACKAGE BOTTOM VIEW PAD 1 PADS SEE NOTES DETAIL A 0.630 ±0.025 SQ. 141x S YXeee SUGGESTED PCB LAYOUT TOP VIEW 0.0000 0.6350 0.6350 1.9050 1.9050 3.1750 3.1750 4.4450 4.4450 5.7150 5.7150 6.9850 6.9850 6.9850 5.7150 5.7150 4.4450 4.4450 3.1750 3.1750 1.9050 1.9050 0.6350 0.6350 0.0000 6.9850 LGA 141 1007 REV A LTMXXXXXX μModule TRAY PIN 1 BEVEL PACKAGE IN TRAY LOADING ORIENTATION COMPONENT PIN “A1” L K J H G F E D C B M A 1234567810 91112 141-Lead (15mm × 15mm × 2.82mm) (Reference L TC DWG # 05-08-1815 Rev A)

Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2007 LT 0108 REV A • PRINTED IN USA RELATED PARTS PART NUMBER DESCRIPTION COMMENTS L TC2900 Quad Supply Monitor with Adjustable Reset Timer Monitors Four Supplies; Adjustable Reset Timer L TC2923 Power Supply T racking Controller T racks Both Up and Down; Power Supply Sequencing L TC3780 36V Buck-Boost Controller Synchronous Operation, Single Inductor L TC3785 10V Buck-Boost Controller Synchronous Operation, No R SENSE™, 2.7V ≤ VIN ≤ 10V , 2.7V ≤ VOUT ≤ 10V L T3825/L T3837 Synchronous Isolated Flyback Controllers No Optocoupler Required; 3.3V , 12A Output; Simple Design L TM4600 10A DC/DC μModule Basic 10A DC/DC μModule L TM4601/ L TM4601A 12A DC/DC μModule with PLL, Output T racking/ Margining and Remote Sensing Synchronizable, PolyPhase Operation to 48A, L TM4601-1 Version has no Remote Sensing L TM4602 6A DC/DC μModule Pin Compatible with the L TM4600 L TM4603 6A DC/DC μModule with PLL and Output T racking/ Margining and Remote Sensing Synchronizable, PolyPhase Operation, L TM4603-1 Version has no Remote Sensing, Pin Compatible with the L TM4601 L TM4604 4A Low Voltage DC/DC μModule 2.375 ≤ V IN ≤ 5V , 0.8V ≤ VOUT ≤ 5V , 9mm × 15mm × 2.3mm Package No RSENSE is a T rademark of Linear Technology Corporation. PACKAGE DESCRIPTION Pin Assignment Table 6 (Arranged by Pin Number) PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME A1 PGND C1 PGND E1 V OUT G1 V OUT J1 SW1 L1 SW1 A2 PGND C2 PGND E2 V OUT G2 V OUT J2 SW1 L2 SW1 A3 PGND C3 PGND E3 PGND G3 V OUT J3 SW1 L3 SW1 A4 SENSE + C4 PGND E4 PGND G4 V OUT J4 SW1 L4 SW1 A5 SENSE – C5 PGND E5 PGND G5 R SENSE J5 R SENSE L5 R SENSE A6 SS C6 PGND E6 PGND G6 R SENSE J6 R SENSE L6 R SENSE A7 SGND C7 PGND E7 PGND G7 R SENSE J7 R SENSE L7 SW2 A8 RUN C8 PGND E8 PGND G8 R SENSE J8 SW2 L8 SW2 A9 FCB C9 PGND E9 PGND G9 R SENSE J9 SW2 L9 SW2 A10 STBYMD C10 PGND E10 PGND G10 R SENSE J10 V IN L10 V IN A11 PGND C11 PGND E11 PGND G11 R SENSE J11 V IN L11 V IN A12 PGND C12 PGND E12 PGND G12 R SENSE J12 V IN L12 V IN B1 PGND D1 PGND F1 V OUT H1 V OUT K1 SW1 M1 SW1 B2 PGND D2 PGND F2 V OUT H2 V OUT K2 SW1 M2 SW1 B3 PGND D3 PGND F3 V OUT H3 V OUT K3 SW1 M3 SW1 B4 PGND D4 PGND F4 V OUT H4 V OUT K4 SW1 M4 SW1 B5 PGOOD D5 PGND F5 INTV CC H5 R SENSE K5 R SENSE M5 R SENSE B6 V FB D6 PGND F6 EXTV CC H6 R SENSE K6 R SENSE M6 R SENSE B7 COMP D7 PGND F7 – H7 R SENSE K7 SW2 M7 SW2 B8 PLLFL TR D8 PGND F8 – H8 R SENSE K8 SW2 M8 SW2 B9 PLLIN D9 PGND F9 – H9 R SENSE K9 SW2 M9 SW2 B10 PGND D10 PGND F10 R SENSE H10 R SENSE K10 V IN M10 V IN B11 PGND D11 PGND F11 R SENSE H11 R SENSE K11 V IN M11 V IN B12 PGND D12 PGND F12 R SENSE H12 R SENSE K12 V IN M12 V IN