LTM4604A

LTM4608A_1 LINER | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 26

Technical content

FEATURES

APPLICATIONS

DESCRIPTION

Low VIN, 8A DC/DC µModule Regulator with Tracking, Margining, and Frequency Synchronization The L TM®4608A is a complete 8A switch mode DC/DC power supply with ±1.75% total output voltage error. In- cluded in the package are the switching controller , power FETs, inductor and all support components. Operating over an input voltage range of 2.7V to 5.5V , the L TM4608A supports an output voltage range of 0.6V to 5V , set by a single external resistor . This high efficiency design delivers up to 8A continuous current (10A peak). Only bulk input and output capacitors are needed to complete the design. The low profile package (2.8mm) enables utilization of unused space on the back side of PC boards for high density point-of-load regulation. The 0.630mm LGA pads with 1.27mm pitch simplify PCB layout by providing stan- dard trace routing and via placement. The high switching frequency and current mode architecture enable a very fast transient response to line and load changes without sacrificing stability. The device supports frequency syn - chronization, programmable multiphase and/or spread spectrum operation, output voltage tracking for supply rail sequencing and voltage margining. Fault protection features include overvoltage protection, overcurrent protection and thermal shutdown. The power module is offered in a compact and thermally enhanced 9mm × 15mm × 2.8mm surface mount LGA package. The L TM4608A is Pb-free and RoHS compliant. 2.7V to 5.5V Input to 1.8V Output DC/DC µModule® Regulator n Complete Standalone Power Supply n ±1.75% Total DC Output Error (–55°C to 125°C) n 2.7V to 5.5V Input Voltage Range n 8A DC, 10A Peak Output Current n 0.6V Up to 5V Output n Output Voltage T racking and Margining n Power Good T racks Margining n Multiphase Operation n Parallel Current Sharing n Onboard Frequency Synchronization n Spread Spectrum Frequency Modulation n Overcurrent/Thermal Shutdown Protection n Current Mode Control/Fast T ransient Response n Selectable Burst Mode® Operation n Up to 95% Efficiency n Output Overvoltage Protection n Small, Low Profile 9mm × 15mm × 2.8mm n Telecom, Networking and Industrial Equipment n Storage Systems n Point of Load Regulation Efficiency vs Load Current L, L T , L TC, L TM, Linear Technology, the Linear logo, Burst Mode, µModule and PolyPhase are registered trademarks and L TpowerCAD is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 5481178, 6580258, 6304066, 6127815, 6498466, 6611131. LOAD CURRENT (A) EFFICIENCY (%) 100 2 4 6 8 4608A TA01b VOUT = 1.8V VIN = 5V VIN = 3.3V VIN SVIN SW RUN PLLLPF TRACK V OUT FB ITH ITHM PGOOD MGN CLKOUT GND CLKIN CLKIN 4.87k 4608A TA01a 100µF10µF PGOOD VOUT VOUT 1.8V VIN 2.7V TO 5.5V L TM4608A SGND

PIN CONFIGURATIONABSOLUTE MAXIMUM RATINGS PGOOD, PLLLPF, CLKIN, PHMODE, MODE . –0.3V to VIN Internal Operating Temperature Range (Note 1) ORDER INFORMATION

ELECTRICAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VIN(DC) Input DC Voltage l 2.7 5.5 V VOUT(DC) Output Voltage, Total Variation with Line and Load CIN = 10µF × 1, COUT = 100µF Ceramic, 100µF POSCAP , RFB = 6.65k, MODE = 0V VIN = 2.7V to 5.5V , IOUT = IOUT(DC)MIN to IOUT(DC)MAX (Note 3) l 1.472 1.464 1.49 1.49 1.508 1.516 V V Input Specifications V IN(UVLO) Undervoltage Lockout Threshold SVIN Rising SVIN Falling 2.05 1.85 2.2 2.0 2.35 2.15 V V The l denotes the specifications which apply over the full internal operating temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 5V unless otherwise noted. See Figure 1. LEAD FREE FINISH TRAY PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE L TM4608AEV#PBF L TM4608AEV#PBF L TM4608AV 68-Lead (15mm × 9mm × 2.8mm) LGA –40°C to 125°C L TM4608AIV#PBF L TM4608AIV#PBF L TM4608AV 68-Lead (15mm × 9mm × 2.8mm) LGA –40°C to 125°C L TM4608AMPV#PBF L TM4608AMPV#PBF L TM4608AMPV 68-Lead (15mm × 9mm × 2.8mm) LGA –55°C to 125°C Consult L TC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container . For more information on lead free part marking, go to: http://www.linear .com/leadfree/ This product is only offered in trays. For more information go to: http://www.linear .com/packaging/ LGA PACKAGE 68-LEAD (15mm × 9mm × 2.8mm) A GND SW FB GND RUN SGND B C D E F G GND V OUT VIN TOP VIEW CLKOUT PLLLPFCLKIN SVINPHMODE MODE BSEL MGN PGOOD ITHM TRACK ITH TJMAX = 125°C, θJA = 25°C/W , θJCbottom = 7°C/W , θJCtop = 50°C/W , WEIGHT = 1.0g

ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full internal operating temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 5V unless otherwise noted. See Figure 1. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS IQ(VIN) Input Supply Bias Current VIN = 3.3V , No Switching, MODE = VIN VIN = 3.3V , No Switching, MODE = 0V VIN = 3.3V , VOUT = 1.5V , Switching Continuous 400 1.15 µA mA mA VIN = 5V , No Switching, MODE = VIN VIN = 5V , No Switching, MODE = 0V VIN = 5V , VOUT = 1.5V , Switching Continuous 450 1.3 µA mA mA Shutdown, RUN = 0, V IN = 5V 1 µA IS(VIN) Input Supply Current VIN = 3.3V , VOUT = 1.5V , IOUT = 8A VIN = 5V , VOUT = 1.5V , IOUT = 8A 4.5 2.93 A A Output Specifications I OUT(DC) Output Continuous Current Range (Note 3) VOUT = 1.5V VIN = 3.3V , 5.5V VIN = 2.7V A A OUT(LINE) VOUT ∆VOUT(LOAD) VOUT Load Regulation Accuracy VOUT = 1.5V (Note 3) VIN = 3.3V , 5.5V , ILOAD = 0A to 8A VIN = 2.7V , ILOAD = 0A to 5A l l 0.3 0.3 0.75 0.75 V OUT(AC) Output Ripple Voltage IOUT = 0A, COUT = 100µF X5R Ceramic, VIN = 5V , VOUT = 1.5V mVP-P fS Switching Frequency IOUT = 8A, VIN = 5V , VOUT = 1.5V 1.25 1.5 1.75 MHz fSYNC SYNC Capture Range 0.75 2.25 MHz ∆VOUT(START) Turn-On Overshoot COUT = 100µF , VOUT = 1.5V , IOUT = 0A VIN = 3.3V VIN = 5V mV mV t START Turn-On Time COUT = 100µF , VOUT = 1.5V , VIN = 5V , IOUT = 1A Resistive Load, T rack = VIN, 100 µs ∆VOUT(LS) Peak Deviation for Dynamic Load Load: 0% to 50% to 0% of Full Load, C OUT = 100µF Ceramic, 100µF POSCAP , VIN = 5V , VOUT = 1.5V 15 mV tSETTLE Settling Time for Dynamic Load Step Load: 0% to 50% to 0% of Full Load, V IN = 5V , VOUT = 1.5V , COUT = 100µF 10 µs IOUT(PK) Output Current Limit COUT = 100µF VIN = 2.7V , VOUT = 1.5V VIN = 3.3V , VOUT = 1.5V VIN = 5V , VOUT = 1.5V A A A Control Section V FB Voltage at FB Pin IOUT = 0A, VOUT = 1.5V , VIN = 2.7V to 5.5V l 0.590 0.587 0.596 0.596 0.602 0.606 V V SS Delay Internal Soft-Start Delay 90 µs I FB 0.2 µA VRUN RUN Pin On/Off Threshold RUN Rising RUN Falling 1.4 1.3 1.55 1.4 1.7 1.5 V V

ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full internal operating temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 5V unless otherwise noted. See Figure 1. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS TRACK T racking Threshold (Rising) T racking Threshold (Falling) T racking Disable Threshold RUN = V IN RUN = 0V 0.57 0.18 V IN – 0.5 V V V R FBHI Resistor Between VOUT and FB Pins 9.95 10 10.05 kΩ ∆VPGOOD PGOOD Range ±10 % %Margining Output Voltage Margining Percentage MGN = V IN, BSEL = 0V MGN = VIN, BSEL = VIN MGN = VIN, BSEL = Float MGN = 0V , BSEL = 0V MGN = 0V , BSEL = V IN MGN = 0V , BSEL = Float –14 –10 –15 –11 –16 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The L TM4608A is tested under pulsed load conditions such that T J ≈ TA. The L TM4608AE is guaranteed to meet specifications from 0°C to 125°C internal temperature. Specifications over the –40°C to 125°C internal operating temperature range are assured by design, characterization and correlation with statistical process controls. The L TM4608AI is guaranteed over the –40°C to 125°C internal operating temperature range and the L TM4608AMP is tested and guaranteed over the full –55°C to 125°C internal operating temperature range. Note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal impedance and other environmental factors. Note 3: See output current derating curves for different VIN, VOUT and TA.

VIN (V) VOUT (V) 1.5 2.0 2.5 3 5 4608A G06 1.0 0.5 3.0 3.5 4.0 IOUT = 6A VOUT = 1.2V VOUT = 1.5V VOUT = 1.8V VOUT = 2.5V VOUT = 3.3V VIN (V) VOUT (V) 1.5 2.0 2.5 3 5 4608A G05 1.0 0.5 3.0 3.5 4.0 IOUT = 8A VOUT = 1.2V VOUT = 1.5V VOUT = 1.8V VOUT = 2.5V VOUT = 3.3V TYPICAL PERFORMANCE CHARACTERISTICS Efficiency vs Load Current Burst Mode Efficiency with 5V Input VIN to VOUT Step-Down Ratio Supply Current vs VIN Load T ransient Response Load T ransient Response Efficiency vs Load Current Efficiency vs Load Current LOAD CURRENT EFFICIENCY (%) 100 2 4 6 8 4608A G01 5VIN 1.2VOUT 5VIN 1.5VOUT 5VIN 1.8VOUT 5VIN 2.5VOUT 5VIN 3.3VOUT CONTINUOUS MODE LOAD CURRENT EFFICIENCY (%) 100 2 4 6 8 4608A G02 3.3VIN 1.2VOUT 3.3VIN 1.5VOUT 3.3VIN 1.8VOUT 3.3VIN 2.5VOUT CONTINUOUS MODE LOAD CURRENT (A) EFFICIENCY (%) 100 2 4 5 4608A G03 1 3 6 7 2.7VIN 1.0VOUT 2.7VIN 1.5VOUT 2.7VIN 1.8VOUT CONTINUOUS MODE VIN to VOUT Step-Down Ratio LOAD CURRENT (A) EFFICIENCY (%)60 100 0.2 0.4 0.6 0.8 4608A G04 VOUT = 1.5V VOUT = 2.5V VOUT = 3.3V INPUT VOL TAGE (V) 2.5 SUPPL Y CURRENT (mA) 4.5 1.6 1.4 1.2 0.8 0.6 0.4 0.2 4608A G07 3.5 3 54 5.5 VO = 1.2V PULSE-SKIPPING MODE VO = 1.2V BURST MODE ILOAD 1A/DIV VIN 2V/DIV VOUT 20mV/DIV AC COUPLED 20µs/DIVVIN = 5V VOUT = 3.3V , RFB = 2.21k 2A/µs STEP COUT = 100µF X5R C1 = 100pF , C3 = 22pF FROM FIGURE 18 4608A G08 20µs/DIVVIN = 5V VOUT = 2.5V , RFB = 3.09k 2.5A/µs STEP C OUT = 100µF X5R C1 = 120pF , C3 = 47pF FROM FIGURE 18 4608A G09 ILOAD 2A/DIV VOUT 20mV/DIV AC COUPLED

TEMPERATURE (°C) –55 VFB (mV) 592 594 596 35 95 4608A G14 590 –25 5 65 598 600 602 125 VIN = 5.5V VIN = 3.3V VIN = 2.7V Load T ransient Response Start-Up VFB vs Temperature Load Regulation vs Current 2.5V Output Current Short-Circuit Protection (2.5V Short, No Load) Load T ransient Response Load T ransient Response VOUT 0.5V/DIV VIN 2V/DIV 50µs/DIVVIN = 5V VOUT = 1.5V COUT = 100µF NO LOAD AND 8A LOAD (DEFAUL T 100µs SOFT-START) 4608A G13 LOAD CURRENT (A) –0.5 LOAD REGULATION (%) –0.4 –0.2 –0.3 –0.6 2 4 –0.1 6 8 4608A G15 FC MODE VIN = 3.3V VOUT = 1.5V Short-Circuit Protection (2.5V Short, 4A Load) OUTPUT CURRENT (A) OUTPUT VOLTAGE (V) 0.5 1.0 1.5 2.0 2.5 3.0 5 10 15 20 4608A G16 2V/DIV 2V/DIV 5A/DIV 50µs/DIV 4608A G17 VOUT VIN IOUT VIN = 5V VOUT = 2.5V 5V/DIV 5V/DIV 5A/DIV 50µs/DIV 4608A G18 VOUT VIN IOUT LOAD VIN = 5V VOUT = 2.5V TYPICAL PERFORMANCE CHARACTERISTICS 20µs/DIVVIN = 5V VOUT = 1.8V , RFB = 4.87k 2.5A/µs STEP COUT = 100µF X5R C1 = NONE, C3 = NONE FROM FIGURE 18 4608A G10 ILOAD 2A/DIV VOUT 20mV/DIV AC COUPLED 20µs/DIVVIN = 5V VOUT = 1.5V , RFB = 6.65k 2.5A/µs STEP C OUT = 100µF X5R C1 = NONE, C3 = NONE FROM FIGURE 18 4608A G11 ILOAD 2A/DIV VOUT 20mV/DIV AC COUPLED 20µs/DIVVIN = 5V VOUT = 1.2V , RFB = 10k 2.5A/µs STEP C OUT = 2 × 100µF C1 = 100pF , C3 = NONE FROM FIGURE 18 4608A G12 ILOAD 2A/DIV VOUT 20mV/DIV AC COUPLED

PLLLPF (E3): Phase Locked Loop Lowpass Filter . An in- ternal lowpass filter is tied to this pin. In spread spectrum mode, placing a capacitor here to SGND controls the slew rate from one frequency to the next. Alternatively, floating this pin allows normal running frequency at 1.5MHz, tying this pin to SV IN forces the part to run at 1.33 times its normal frequency (2MHz), tying it to ground forces the frequency to run at 0.67 times its normal frequency (1MHz). PHMODE (B4): Phase Selector Input. This pin determines the phase relationship between the internal oscillator and CLKOUT . Tie it high for 2-phase operation, tie it low for 3-phase operation, and float or tie it to V IN/2 for 4-phase operation. MGN (B8): Margining Pin. Increases or decreases the output voltage by the amount specified by the BSEL pin. To disable margining, tie the MGN pin to a voltage divider with 50k resistors from V IN to ground. See the Applications Information section and Figure 20. BSEL (B7): Margining Bit Select Pin. Tying BSEL low se- lects ±5%, tying it high selects ±10%. Floating it or tying it to VIN/2 selects ±15%. TRACK (E5): Output Voltage T racking Pin. Voltage track- ing is enabled when the TRACK voltage is below 0.57V . If tracking is not desired, then connect the TRACK pin to SV IN. If TRACK is not tied to SVIN, then the TRACK pin’s voltage needs to be below 0.18V before the chip shuts down even though RUN is already low. Do not float this pin. A resistor divider and capacitor can be applied to the TRACK pin to increase the soft-start time of the regulator . See the Applications Information section. Can tie together for parallel operation and tracking. Load current needs to be present during track down. PIN FUNCTIONS VIN (C1, C8, C9, D1, D3-D5, D7-D9 and E8): Power Input Pins. Apply input voltage between these pins and GND pins. Recommend placing input decoupling capacitance directly between V IN pins and GND pins. VOUT (C10-C11, D10-D11, E9-E11, F9-F11, G9-G11): Power Output Pins. Apply output load between these pins and GND pins. Recommend placing output decoupling capacitance directly between these pins and GND pins. See Table 1. GND (A1-A11, B1, B9-B11, F3, F7-F8, G1-G8): Power Ground Pins for Both Input and Output Returns. SV IN (F4): Signal Input Voltage. This pin is internally con- nected to VIN through a lowpass filter . SGND (E1): Signal Ground Pin. Return ground path for all analog and low power circuitry. Tie a single connection to GND in the application. MODE (B5): Mode Select Input. Tying this pin high enables Burst Mode operation. Tying this pin low enables forced continuous operation. Floating this pin or tying it to V IN/2 enables pulse-skipping operation. CLKIN (B3): External Synchronization Input to Phase Detector . This pin is internally terminated to SGND with a 50k resistor . The phase locked loop will force the internal top power PMOS turn on to be synchronized with the rising edge of the CLKIN signal. Connect this pin to SV IN to enable spread spectrum modulation. During external synchronization, make sure the PLLLPF pin is not tied to V IN or GND.

FB (E7): The Negative Input of the Error Amplifier . Internally, this pin is connected to VOUT with a 10k precision resistor . Different output voltages can be programmed with an ad- ditional resistor between FB and GND pins. In PolyPhase® operation, tie FB pins together for parallel operation. See the Applications Information section for details. ITH (F6): Current Control Threshold and Error Amplifier Compensation Point. The current comparator threshold increases with this control voltage. Tie together in parallel operation. I THM (F5): Negative Input to the Internal I TH Differential Amplifier . Tie this pin to SGND for single phase operation. For PolyPhase operation, tie the master’s I THM to SGND while connecting all of the ITHM pins together . PGOOD (C7): Output Voltage Power Good Indicator . Open-drain logic output that is pulled to ground when the output voltage is not within ±10% of the regulation point. Disabled during margining. RUN (F1): Run Control Pin. A voltage above 1.5V will turn on the module. SW (C3-C5): Switching Node of the Circuit is Used for Testing Purposes. This can be connected to an electri - cally open circuit copper pad on the board for improved thermal performance. CLKOUT (F2): Output Clock Signal for PolyPhase Opera- tion. The phase of CLKOUT is determined by the state of the PHMODE pin. PIN FUNCTIONS

Table 1. Decoupling Requirements. TA = 25°C, Block Diagram Configuration Figure 1. Simplified L TM4608A Block Diagram current with few external input and output capacitors. application schematic is shown in Figure 18. can be externally synchronized from 0.75MHz to 2.25MHz.

limit and thermal shutdown in an overcurrent condition. voltage exits a ±10% window around the regulation point. output voltage ramp and voltage tracking during start-up. See Applications Information. Figure 18. External component selection is primarily requirements for a particular application. down ratio that can be achieved for a given input voltage. teristics section of this data sheet for more information. external resistor to ground. phasing multiple devices or frequency synchronization. light load features will accommodate battery operation. the Typical Performance Characteristics. gramed from ±5% to ±15% using the MGN and BSEL pins. Table 2. RFB Resistor vs Output Voltage ductive leads, traces or not enough source capacitance.

If low impedance power planes are used, then this 47µF capacitor is not needed. For a buck converter , the switching duty-cycle can be estimated as: D = VOUT VIN Without considering the inductor current ripple, the RMS current of the input capacitor can be estimated as: ICIN(RMS) = IOUT(MAX)

• D • 1– D( ) In the above equation, η% is the estimated efficiency of the power module. The bulk capacitor can be a switcher- rated electrolytic aluminum capacitor , polymer capacitor for bulk input capacitance due to high inductance traces or leads. If a low inductance plane is used to power the device, then only one 10µF ceramic is required. The three internal 10µF ceramics are typically rated for 2A of RMS ripple current, so the ripple current at the worse case for 8A maximum current is 4A or less. Output Capacitors The L TM4608A is designed for low output voltage ripple noise. The bulk output capacitors defined as C OUT are chosen with low enough effective series resistance (ESR) to meet the output voltage ripple and transient require - ments. C OUT can be a low ESR tantalum capacitor , a low ESR polymer capacitor or ceramic capacitor . The typical output capacitance range is from 47µF to 220µF . Additional output filtering may be required by the system designer , if further reduction of output ripple or dynamic transient spikes is desired. Table 3 shows a matrix of different output voltages and output capacitors to minimize the voltage droop and overshoot during a 3A/µs transient. The table optimizes total equivalent ESR and total bulk capacitance to optimize the transient performance. Stability criteria are considered in the Table 3 matrix, and the Linear Technology L TpowerCAD™ Design Tool is available for stability analysis. Multiphase operation will reduce effective output ripple as a function of the number of phases. Application Note 77 discusses this noise reduction versus output ripple cur - rent cancellation, but the output capacitance will be more a function of stability and transient response. The Linear Technology L TpowerCAD Design Tool will calculate the output ripple reduction as the number phases implemented increases by N times. Burst Mode Operation The L TM4608A is capable of Burst Mode operation in which the power MOSFETs operate intermittently based on load demand, thus saving quiescent current. For applications where maximizing the efficiency at very light loads is a high priority, Burst Mode operation should be applied. To enable Burst Mode operation, simply tie the MODE pin to V IN. During this operation, the peak current of the inductor is set to approximately 20% of the maximum peak current value in normal operation even though the voltage at the I TH pin indicates a lower value. The voltage at the ITH pin drops when the inductor’s average current is greater than the load requirement. As the I TH voltage drops below 0.2V , the BURST comparator trips, causing the internal sleep line to go high and turn off both power MOSFETs. In sleep mode, the internal circuitry is partially turned off, reducing the quiescent current to about 450µA. The load current is now being supplied from the output capacitor . When the output voltage drops, causing I TH to rise above 0.25V , the internal sleep line goes low, and the L TM4608A re- sumes normal operation. The next oscillator cycle will turn on the top power MOSFET and the switching cycle repeats. Pulse-Skipping Mode Operation In applications where low output ripple and high efficiency at intermediate currents are desired, pulse-skipping mode should be used. Pulse-skipping operation allows the L TM4608A to skip cycles at low output loads, thus increasing efficiency by reducing switching loss. Floating the MODE pin or tying it to V IN/2 enables pulse-skipping operation. This allows discontinuous conduction mode (DCM) opera- tion down to near the limit defined by the chip’s minimum on-time (about 100ns). Below this output current level, the converter will begin to skip cycles in order to maintain output regulation. Increasing the output load current slightly, above the minimum required for discontinuous conduction mode, allows constant frequency PWM.

Table 3. Output Voltage Response Versus Component Matrix (Refer to Figure 18) 0A to 3A Load Step *Bulk capacitance is optional if VIN has very low input impedance. ing until the L TM4608A’s output voltage is in regulation.

Figure 2. 6-Phase Operation Figure 3. 12-Phase Operation

4608 F02

for spread spectrum operation. Figure 5. Dual Outputs (3.3V and 1.5V) with T racking VTRACK is the track ramp applied to the slave’s track pin.

• 10k = RFB3 where MR is the master’s output slew rate and SR is the slave’s output slew rate in Volts/Time. When coincident tracking is desired, then MR and SR are equal, thus R FB3 is equal the 10k. RFB4 is derived from equation: RFB4 = 0.596V VFB 10k + VFB RFB2 – VTRACK RFB3 where VFB is the feedback voltage reference of the regulator and VTRACK is 0.596V . Since RFB3 is equal to the 10k top feedback resistor of the slave regulator in equal slew rate or coincident tracking, then R FB4 is equal to RFB2 with VFB = VTRACK. Therefore RFB3 = 10k and RFB4 = 6.65k in Figure 5. In ratiometric tracking, a different slew rate maybe desired for the slave regulator . R FB3 can be solved for when SR is slower than MR. Make sure that the slave supply slew rate is chosen to be fast enough so that the slave output voltage will reach it final value before the master output. For example: MR = 3.3V/ms and SR = 1.5V/ms. Then R FB3 = 22.1k. Solve for RFB4 to equal to 4.87k. For applications that do not require tracking or sequencing, simply tie the TRACK pin to SV IN to let RUN control the turn on/off. Connecting TRACK to SV IN also enables the ~100µs of internal soft-start during start-up. Load current needs to be present during track down. Power Good The PGOOD pin is an open-drain pin that can be used to monitor valid output voltage regulation. This pin monitors a ±10% window around the regulation point. As shown in Figure 20, the sequencing function can be realized in a dual output application by controlling the RUN pins and the PGOOD signals from each other . The 1.5V output begins its soft starting after the PGOOD signal of 3.3V output becomes high, and 3.3V output starts its shut down after the PGOOD signal of 1.5V output becomes low. This can be applied to systems that require voltage sequencing between the core and sub-power supplies.

Figure 6. Output Voltage Coincident T racking

TH pins together to share currents evenly for all phases. ±5%, ±10% or ±15% of its normal operational voltage. the output voltage is forced above the regulation point. to a voltage divider as shown in Figure 20. analysis for the thermal models and the derating curves. or below for the derating curves.

NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 2. ALL DIMENSIONS ARE IN MILLIMETERS LAND DESIGNATION PER JESD MO-222 5. PRIMARY DATUM -Z- IS SEATING PLANE 6. THE TOTAL NUMBER OF PADS: 68 DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE 2.72 – 2.92 DETAIL B DETAIL B SUBSTRATE MOLD CAP 0.290 – 0.350 2.200 – 2.600 // bbb Z Z PACKAGE TOP VIEW 9.00 BSC 15.00 BSC PAD “A1” CORNER X Y aaa Z aaa Z PACKAGE BOTTOM VIEW PADS SEE NOTES DETAIL A 0.630 ±0.025 SQ. 68x S Y X eee SUGGESTED PCB LAYOUT TOP VIEW LGA 68 1207 REV Ø L TMXXXXXX µModule TRAY PIN 1 BEVEL PACKAGE IN TRAY LOADING ORIENTATION COMPONENT PIN “A1” DETAIL A 7.620 BSC 1.27 BSC 12.70 BSC PAD 1F G E A B C D 0.000 1.270 1.270 2.540 2.540 3.810 3.810 6.350 6.350 3.810 3.810 5.080 5.080 2.540 2.540 1.270 1.270 0.000 SYMBOL aaa bbb eee TOLERANCE 0.15 0.10 0.05 68-Lead (15mm × 9mm × 2.82mm) (Reference L TC DWG # 05-08-1821 Rev Ø) PACKAGE PHOTO

Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However , no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

REVISION HISTORY

REV DATE DESCRIPTION PAGE NUMBER B 12/10 Voltage changed in the Typical Application drawing. Changes made to the Absolute Maximum Ratings section. Updated the Pin Configuration package dimensions. Changes made to the V OUT conditions in the Electrical Characteristics section. Updated Note 2 in the Electrical Characteristics section. Replaced graphs G05 and G06 in the Typical Performance Characteristics section. Updated MGN (B8) in the Pin Functions section. Text changes made to the Applications Information section. Changes made to Figures 5, 18, 20, 21, 23. Updated the Related Parts table. 10, 11, 14, 19 15, 21, 22, 23 C 3/11 Updated Pin Configuration drawing Removed Pin Configuration drawing from Pin Functions Added value of 0.22µH to Inductor in Figure 1 Updated Figure 3 Updated Figure 17 Added Package Photo (Revision history begins at Rev B)

Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 l FAX: (408) 434-0507 l www.linear .com  LINEAR TECHNOLOGY CORPORATION 2008 LT 0311 REV C • PRINTED IN USA RELATED PARTS PART NUMBER DESCRIPTION COMMENTS L TC2900 Quad Supply Monitor with Adjustable Reset Timer Monitors Four Supplies; Adjustable Reset Timer L TC2923 Power Supply T racking Controller T racks Both Up and Down; Power Supply Sequencing L TM4600HV 10A DC/DC µModule Regulator 4.5V ≤ VIN ≤ 28V; 0.6V ≤ VOUT ≤ 5V , LGA Package L TM4600HVMP Military Plastic 10A DC/DC µModule Regulator Guaranteed Operation from –55°C to 125°C Ambient, LGA Package L TM4601/ L TM4601A 12A DC/DC µModule Regulator with PLL, Output T racking/ Margining and Remote Sensing Synchronizable, PolyPhase Operation, L TM4601-1/L TM4601A-1 Version Has No Remote Sensing, LGA Package, MP Version Available L TM4602 6A DC/DC µModule Regulator Pin Compatible with the L TM4600, LGA Package L TM4618 6A DC/DC µModule Regulator with PLL and Output T racking/Margining and Remote Sensing Synchronizable, PolyPhase Operation L TM4604A Low V IN 4A DC/DC µModule Regulator 2.375V ≤ VIN ≤ 5.5V , 0.8V ≤ VOUT ≤ 5V , 9mm × 15mm × 2.3mm LGA Package L TM4605 5A to 12A Buck-Boost µModule Regulator 4.5V ≤ VIN ≤ 20V; 0.8V ≤ VOUT ≤ 16V , 15mm × 15mm × 2.8mm LGA Package L TM4607 5A to 12A Buck-Boost µModule Regulator 4.5V ≤ VIN ≤ 36V; 0.8V ≤ VOUT ≤ 25V , 15mm × 15mm × 2.8mm LGA Package L TM8022 High VIN 1A DC/DC Step-Down µModule Regulator 3.6V ≤ VIN ≤ 36V; 0.8V ≤ VOUT ≤ 10V , 11.25mm × 9mm × 2.8mm LGA Package L TM8023 High VIN 2A DC/DC Step-Down µModule Regulator 3.6V ≤ VIN ≤ 36V; 0.8V ≤ VOUT ≤ 10V , 11.25mm × 9mm × 2.8mm LGA Package PACKAGE DESCRIPTION Pin Assignment Table (Arranged by Pin Number) PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME A1 GND B1 GND C1 VIN D1 VIN E1 SGND F1 RUN G1 GND A2 GND B2 – C2 – D2 – E2 – F2 CLKOUT G2 GND A3 GND B3 CLKIN C3 SW D3 VIN E3 PLLLPF F3 GND G3 GND A4 GND B4 PHMODE C4 SW D4 VIN E4 – F4 SVIN G4 GND A5 GND B5 MODE C5 SW D5 VIN E5 TRACK F5 ITHM G5 GND A6 GND B6 – C6 – D6 – E6 – F6 ITH G6 GND A7 GND B7 BSEL C7 PGOOD D7 VIN E7 FB F7 GND G7 GND A8 GND B8 MGN C8 VIN D8 VIN E8 VIN F8 GND G8 GND A9 GND B9 GND C9 VIN D9 VIN E9 VOUT F9 VOUT G9 VOUT A10 GND B10 GND C10 VOUT D10 VOUT E10 VOUT F10 VOUT G10 VOUT A11 GND B11 GND C11 VOUT D11 VOUT E11 VOUT F11 VOUT G11 VOUT