LM6219-3.3N5 CYSTEKEC | Alldatasheet

Document overview

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  • PDF pages: 9

Technical content

Features

  • Maximum output current : 300mA ●Dropout voltage : 200mV@100mA
  • High accuracy : ±1% ●Low power consumption : 25μA typ.
  • Standby current : less than 0.1μA typ. ●High ripple rejection : 65dB@10kHz
  • Operating temperature range : -40~+85°C ●Low ESD capacitor : ceramic capacitor compatible
  • Ultra small package ●RoHS compliant, Pb-free package

Applications

  • Mobile phones ●Cordless phones, radio communication equipment
  • Portable games ●Cameras, video cameras
  • Reference voltage sources ●Battery powered equipments

Ordering Information

Part Number Package Shipping LM6219-3.3N5-0-T1-G SOT-23-5L (RoHS compliant package) 3000 pcs / Tape & Reel Environment friendly grade : S for RoHS compliant products, G for RoHS compliant and green compound products Packing spec, T1 : 3000 pcs / tape & reel, 7” reel Product rank, zero for no rank products Product name

CYStech Electronics Corp. Spec. No. : C150N5 Issued Date : 2013.08.30 Revised Date : 2015.05.11 Page No. : 2/9 LM6219-3.3N5 CYStek Product Specification Pin Configuration Typical Application Circuit Pin Name Pin No. Pin Function VIN 1 Power Input VSS 2 Ground. CE 3 ON/OFF Control NC 4 No Connection VOUT 5 Output Pin Assignment Absolute Maximum Ratings Parameter Symbol Ratings Units Input V oltage VIN 7 V Output Current IOUT 300 mA Output V oltage VOUT Vss-0.3〜Vin+0.3 V CE Pin V oltage VCE Vss-0.3〜Vin+0.3 V Continuous Total Power Dissipation PD 250 mW Operating Temperature Range Topr -40〜+85 ℃ Storage Temperature Range Tstg -55〜+125 ℃

CYStech Electronics Corp. Spec. No. : C150N5 Issued Date : 2013.08.30 Revised Date : 2015.05.11 Page No. : 3/9 LM6219-3.3N5 CYStek Product Specification Function Block Diagram

CYStech Electronics Corp. Spec. No. : C150N5 Issued Date : 2013.08.30 Revised Date : 2015.05.11 Page No. : 4/9 LM6219-3.3N5 CYStek Product Specification Electrical Characteristics @ TA=25 , ℃ VIN=4.3V, unless otherwise specified Parameter Symbol Test Conditions Min Typ Max Units Circuits Output Voltage VOUT IOUT= 30mA 3.267 3.300 3.333 V ① Maximum Output Current IOUTMAX VIN=4.3V 300 - - mA ① Load Regulation ΔVOUT 1mA≦IOUT≦100mA - 15 50 mV ① Load Regulation 2 ΔVOUT 2 1mA≦IOUT≦300mA - - 100 mV ① Vdif1 IOUT=30mA - 60 90 mV ① Dropout V oltage Vdif2 IOUT=100mA - 200 250 mV ① Supply IDD VCE=VIN=4.3V - 25 50 μA ② Stand-by Current ISTB VIN=4.3V, VCE=VSS 0.01 0.1 μA ② Line Regulation ΔVOUT/ (ΔVIN・VOUT) 4.3V≦VIN≦6V , IOUT=30mA - 0.01 0.2 %/V ① Input Voltage VIN - 2 - 6 V - Output Voltage Temperature Characteristics ΔVOUT/ (ΔTopr・VOUT) IOUT=30mA, -40℃≦Topr≦85℃ ±100 ppm/℃ Power Supply Rejection Ratio PSRR VIN=4.3V+1.0Vp-pAC IOUT=50mA,f=10kHz - 70 - dB ③ Current Limiter Ilim VCE=VIN=4.3V - 380 - mA ① Short Circuit Current ISHORT VCE=VIN=4.3V - 50 - mA ① CE ‘High’ Level VCEH - 1.6 - VIN V ① CE ‘Low’ Level VCEL - - - 0.25 V ① CE ‘High’ Level Current ICEH VCE=VIN=4.3V -0.1 - 0.1 μA ② CE ‘Low’ Level Current ICEL VIN=4.3V, VCE=VSS -0.1 - 0.1 μA ②

CYStech Electronics Corp. Spec. No. : C150N5 Issued Date : 2013.08.30 Revised Date : 2015.05.11 Page No. : 5/9 LM6219-3.3N5 CYStek Product Specification Test Circuits Circuit ① Circuit ② Circuit ③ *Test Circuit VCE(CE Pin Voltage) Active VCE=VIN ; Standby VCE=VSS

CYStech Electronics Corp. Spec. No. : C150N5 Issued Date : 2013.08.30 Revised Date : 2015.05.11 Page No. : 6/9 LM6219-3.3N5 CYStek Product Specification Operational Explanation

  • Output Voltage Control The voltage divided by resistors R1 & R2 is compared with the internal reference voltage by the error amplifier. The P-channel MOSFET , which is connected to the VOUT pin, is then driven by the subsequent output signal. The output voltage at the VOUT pin is controlled and stabilized by a system of negative feedback. The current limit circuit and short protect circuit operate in relation to the level of output current. Further, the IC's internal circuitry can be shutdown via the CE pin's signal
  • Low ESR Capacitors With the LM6219-3.3N5, a stable output voltage is achievable even if used with low ESR capacitors as a phase compensation circuit is built-in. In order to ensure the effectiveness of the phase compensation, we suggest that an output capacitor (CL) is connected as close as possible to the output pin (VOUT) and the VSS pin. Please use an output capacitor with a capacitance value of at least 1.0 μF . Also, please connect an input capacitor (CIN) of 1.0μF between the VIN pin and the VSS pin in order to ensure a stable power input. Stable phase compensation may not be ensured if the capacitor runs out capacitance when depending on bias and temperature. In case the capacitor depends on the bias and temperature, please make sure the capacitor can ensure the actual capacitance.
  • Current Limiter, Short-Circuit Protection The LM6219-3.3N5 includes a combination of a fixed current limiter circuit & a foldback circuit, which aid the operations of the current limiter and circ uit protection. When the load current reaches the current limit level, the fixed current limiter circuit operates and output voltage dr ops. As a result of this drop in output voltage, the foldback circuit operates, output voltage drops further and output current decreases. When the output pin is shorted, a current of about 50mA flows.
  • CE Pin The IC's internal circuitry can be shutdown via the sign al from the CE pin with the LM6219-3.3N5. In shutdown mode, output at the V OUT pin will be pulled down to the VSS level via R1 & R2. The operational logic of the IC's CE pin is selectable (please refer to the selection guide). Although the CE pin is equal to an inverter input with CMOS hysteresis, with either the pull-up or pull-down options, th e CE pin input current will increase when the IC is in operation. We suggest that you use this IC with either a VIN voltage or a VSS voltage input at the CE pin. If this IC is used with the correct specifications for the CE pin, the operational logic is fixed and the IC will operate normally. However, supply current may increase as a result of through current in the IC's internal circuitry .

CYStech Electronics Corp. Spec. No. : C150N5 Issued Date : 2013.08.30 Revised Date : 2015.05.11 Page No. : 7/9 LM6219-3.3N5 CYStek Product Specification NOTES ON USE 1. For temporary , transitional voltage drop or voltage rising phenomenon, the IC is liable to malfunction should the ratings be exceeded. 2. Where wiring impedance is high, operations may beco me unstable due to noise and/or phase lag depending on output current. Please keep the resistance low between VIN and VSS wiring in particular. 3. Please wire the input capacitor (CIN) and the output capacitor (CL) as close to the IC as possible. 4. The IC is controlled with constant current start-up. Start-up sequence control is requested to draw a load current after even nominal output voltage rising up the output voltage. 5. CYS places an importance on improving our products and their reliability. We request that users incorporate fail-safe designs and post-aging protection treatment when using CYS’s products in their systems

CYStech Electronics Corp. Spec. No. : C150N5 Issued Date : 2013.08.30 Revised Date : 2015.05.11 Page No. : 8/9 LM6219-3.3N5 CYStek Product Specification Recommended wave soldering condition Soldering Time Product Peak Temperature Pb-free devices 5 +1/-1 seconds 260 +0/-5 °C Recommended temperature profile for IR reflow Pb-free Assembly Profile feature Sn-Pb eutectic Assembly Average ramp-up rate 3°C/second max. 3°C/second max. (Tsmax to Tp) Preheat 100°C 150°C 60-120 seconds 150°C −Temperature Min(TS min) −Temperature Max(TS max) 200°C 60-180 seconds −Time(ts min to ts max) Time maintained above: −Temperature (TL) 183°C 217°C − Time (tL) 60-150 seconds 60-150 seconds Peak Temperature(TP) 240 +0/-5 °C 260 +0/-5 °C Time within 5°C of actual peak temperature(tp) 10-30 seconds 20-40 seconds Ramp down rate 6°C/second max. 6°C/second max. Time 25 °C to peak temperature 6 minutes max. 8 minutes max. Note : All temperatures refer to topside of the package, measured on the package body surface.

CYStech Electronics Corp. Spec. No. : C150N5 Issued Date : 2013.08.30 Revised Date : 2015.05.11 Page No. : 9/9 LM6219-3.3N5 CYStek Product Specification SOT-25 Dimension Marking: D 2.820 3.020 0.111 0.119 θ 0° 8° 0° 8° Notes : 1.Controlling dimension : millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material :

  • Lead :Pure tin plated.
  • Mold Compound : Epoxy resin family, flammability solid burning class:UL94V-0. Important Notice:
  • All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
  • CYStek reserves the right to make changes to its products without notice.
  • CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
  • CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. Style: Pin 1: VIN Pin 2: VSS Pin 3: VCE Pin 4: NC Pin 5: VOUT 5-Lead SOT-23-5L Plastic Surface Mounted Package Device Code Date Code CYStek Package Code:N5