LIA130

LIA130 CLARE | Alldatasheet

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Technical content

PRELIMINARYDS-LIA130-R00C 1 LIA130 Optically Isolated Error Amplifier RoHS 2002/95/EC e3Pb Part # Description LIA130 8 Pin DIP (50/T ube) LIA130S 8-Pin Surface Mount (50/T ube) LIA130STR 8-Pin Surface Mount (1000/Reel)

Applications

Ordering Information

 Power System for Workstations  Telecom Central Office Supply  Telecom Bricks  Optocoupler, Precision Reference, and Error Amplifier in a Single Package  1.240V ± 1% Reference (@ 25ºC)  Linear Optical Coupler Technology with an Industry Standard 431-type  CTR 300% to 600% Linearity  3750Vrms Isolation 4 5

8 LED

C E NC Approvals  UL Recognized Component: File # E76270  CSA Certified Component: Certificate # 1305490 The LIA130 is an optically isolated amplifier with a 431-type precision programmable shunt reference combined in the same package. The optocoupler portion of the LIA130 comprises a Gallium Arsenide (GaAs) light-emitting diode (LED) optically coupled to a silicon phototransistor. The current transfer ratio of the device is between 300% and 600%. The combination of features in the LIA130 is optimal for use in isolated AC-to-DC power supplies and DC-to-DC converters. It replaces several discrete components, saves valuable circuit board space, and reduces complexity. The device is available in DIP and surface-mount packages.

Absolute Maximum Ratings are stress ratings. Stresses in excess of these ratings can cause permanent damage to the device. Functional operation of the device at conditions beyond those indicated in the operational sections of this data sheet is not implied. Parameter Conditions Symbol Min Typ Max Units Input Characteristics @ 25°C LED forward voltage I LED = 5 mA, VCOMP = VFB (Fig.1) V F 0.9 - 1.4 V Reference voltage V COMP = VFB, ILED = 10 mA, -40 to +85°C (Fig.1) VREF Deviation of VREF over temperature 1 TA = -40 to +85°C V REF (DEV) - 77 TBD mV Ratio of VREF variation to the output of the error amplifier ILED = 10 mA, VCOMP = VREF to 10 V (Fig.2) ΔVREF/ ΔVCOMP - 0.002 TBD mV/V Feedback input current I LED = 10 mA, R1 = 10 kΩ (Fig.3) I REF - 0.09 TBD μA Deviation of IREF over temperature 1 TA = -40 to +85°C I REF (DEV) - 0.028 TBD μA Minimum drive current V COMP = VFB (Fig.1) I LED (MIN) -4 5 8 0 μA Off-state error amplifier current V LED = 6 V , VFB = 0 (Fig.4) I (OFF) - 0.001 0.1 μA Error amplifier output impedance 2 VCOMP = VFB, ILED = 0.1 mA to 15 mA, f<1 kHZ IZ OUTI - 0.22 - Ω Output Characteristics @ 25°C Collector dark current V CE = 10V (Fig. 5) I CEO - 0.3 50 nA Collector-emitter voltage breakdown I C = 1.0mA BV CEO 70 - - V Emitter-collector voltage breakdown I E = 100 µA BV ECO 7- - V 1. The deviation parameters VREF(DEV) and IREF(DEV) are defined as the differences between the maximum and minimum values obtained over the rated temperature range. The average f ull- range temperature coefficient of the reference input voltage, ΔVREF, is defined as: |ΔVREF| (ppm/°C) = {VREF (DEV)/VREF (TA 25°C)} X 106 / ΔTA where ΔTA is the rated operating free-air temperature range of the device. 2. The dynamic impedance is defined as |ZOUT| = ΔVCOMP/ΔILED. When the device is operating with two external resistors (see Figure 2), the total dynamic impedance of the circuit is given by: |ZOUT, TOT| = ΔV/ΔI ≈ |ZOUT| X [1 + R1/R2]

Electrical Characteristics

Parameter Symbol Ratings Units Collector-Emitter Voltage V CEO 20 V Emitter-Collector Voltage V ECO 7V Input Voltage V LED 10 V Input DC Current I LED 20 mA Collector Current I C 50 mA Input Power Dissipation 1 PD 145 mW T ransistor Power Dissipation 2 PD 85 mW T otal Power Dissipation 3 PD 145 mW Storage T emperature T STG -55 to +125 °C Operating T emperature T OPR -40 to +85 °C Absolute Maximum Ratings (@ 25˚ C) 1 Derate linearly from 25°C at a rate of 2.42 mW/ °C. 2 Derate linearly from 25°C at a rate of 1.42 mW/ °C. 3 Derate linearly from 25°C at a rate of 2.42 mW/ °C.

Parameter Conditions Symbol Min Typ Max Units Transfer Characteristics @ 25°C Current transfer ratio I LED = 5 mA, VCOMP = VFB, VCE = 5 V (Fig. 6) CTR 300 500 600 % Collector-emitter saturation voltage I LED = 10 mA, VCOMP = VFB, IC = 2.5 mA (Fig. 6) V CE (SA T) - 0.099 0.5 V Isolation Characteristics @ 25°C Input-output insulation leakage current 1 RH = 45%, TA = 25°C, t = 5s, VI-O = 3000 VDC II-O - - 1.0 μA Withstand insulation voltage 1 RH <= 50%, TA = 25°C, t = 1 min V ISO 2500 - - V rms Resistance (input to output) 1 VI-O = 500 VDC RI-O -1 0 12 - Ω Switching Characteristics @ 25°C Bandwidth (Fig. 7) B W - 10 - kHZ Common mode transient immunity at output high 2 ILED = 0 mA, Vcm = 10 VPP RL = 2.2 kΩ (Fig. 8) |CMH| - TBD - kV/ μs Common mode transient immunity at output low 2 ILED = 10 mA, Vcm = 10 VPP RL = 2.2 kΩ (Fig. 8) |CML| - TBD - kV/ μs 1. Device is considered as a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted to gether. 2. Common mode transient immunity at output high is the maximum tolerable (positive) dVcm/dt on the leading edge of the common mode impulse signal, Vcm, to assure that the output will remain high. Common mode transient immunity at output low is the maximum tolerable (negative) dVcm/dt on the trailing edge of t he common pulse signal,Vcm, to assure that the output will remain low. Example Application for the LIA130

+VCE ICEO 2 ILED IC VREF VCE VCOMP VF VREF ILED IOFF Test Circuit CTR, VCE-sat Test Circuit ΔVREF / ΔVCOMP Test Circuit IREF Test Circuit ICEO Test Circuit VREF, VF, ILED-min Test Circuit ILED VCOMP VREF Test Circuits

VCC = +5VDC VCC = +5VDC IF = 10 mA IF = 0 mA (A) IF = 10 mA (B) VIN 0.47V0.1 VPP 47Ω VOUT VOUT VCM 10VP-P 2.2kΩ RL 1μf Frequency Response CMH and CML 4 5 4 5 Test Circuits (cont.)

PERFORMANCE DATA* *The Performance data shown in the graphs above is typical of device performance. For guaranteed parameters not indicated in the written specifi cations, please contact our application department. LIA130 LED Current vs. Cathode Voltage (TA=25ºC, VCOMP=VFB) VCOMP - Cathode Voltage (V) ILED - Supply Current (mA) -1.0 -10 -15 LIA130 LED Current vs. Cathode Voltage (TA=25ºC, VCOMP=VFB) VCOMP - Cathode Voltage (V) ILED - Supply Current (µA) -1.0 150 120 -30 -60 -90 -120 -150 LIA130 Reference Voltage vs. Ambient Temperature VREF - Reference Voltage (V) -40 1.40 1.37 1.34 1.31 1.28 - 2 0 0 2 04 06 08 0 ILED=10mA Temperature (ºC) LIA130 Reference Current vs. Ambient Temperature (ILED=10mA, R1=10KΩ) IREF - Reference Current (mA) -40 110 100 -20 0 20 40 60 80 100 Temperature (ºC) LIA130 Off Current vs. Ambient Temperature (VLED=13.2V, VFB=0V) I(OFF) - Off Current (nA) -40 0.5 0.4 0.3 0.2 0.1 -20 0 20 40 60 80 100 Temperature (ºC) LIA130 LED Forward Current vs. Forward Voltage ILED - Forward Current (mA) VF - Forward-Voltage (V) 0.8 85ºC 55ºC 25ºC -5ºC LIA130 Dark Current vs. Temperature (VCE=10V) ICEO - Dark Current (nA) -40 -10 - 2 0 0 2 04 06 08 01 0 0 Temperature (ºC) LIA130 Collector Current vs. Ambient Temperature (VCE=5V) IC - Collector Current (mA) ILED=20mA -40 120 100 - 2 0 0 2 04 06 08 01 0 0 Temperature (ºC) ILED=1mA ILED=5mA ILED=10mA LIA130 Current Transfer Ratio vs LED Current (VCE=5V) (IC/IF) - Current Transfer Ratio (%) ILED - Forward Current (mA) 700 600 500 400 300 200 100 5 1 01 52 02 5 -5ºC 25ºC 55ºC 85ºC

PERFORMANCE DATA* *The Performance data shown in the graphs above is typical of device performance. For guaranteed parameters not indicated in the written specifi cations, please contact our application department. LIA130 Saturation Voltage vs. Ambient Temperature (ILED=10mA; IC=10mA) VCE (sat) - Saturation Voltage (V) -40 0.30 0.25 0.20 0.15 0.10 0.05 0.00 - 2 0 0 2 04 06 08 01 0 0 Temperature (ºC) LIA130 Collector Current vs. Collector Voltage (TA=25ºC) IC - Collector Current (mA) VCE - Collector-Emitter (V) 180 160 140 120 100 123456789 1 0 ILED=20mA ILED=1mA ILED=5mA ILED=10mA LIA130 Delta VREF / Delta VCOMP vs. Ambient Temperature VCE (sat) - Saturation Voltage (V) -40 -1.5 -2.0 -2.5 -3.0 - 2 0 0 2 04 06 08 01 0 0 Temperature (ºC) LIA130 Voltage Gain vs. Frequency Voltage Gain, A(Vo/Vin) dB Frenquency kHz -15 -30 100 1000 100Ω 1kΩ 500Ω

The LIA130 is essentially an optically isolated error amplifier. It comprises three of the necessary components to form an isolated power supply: an optocoupler, an error amplifier, and a reference voltage device. The LIA130 is the functional equivalent of a 431 series shunt voltage regulator plus an optocoupler in the same package. LED Pin FB Pin COMP Pin GND Pin Connect the GND pin of the LIA130 to the secondary ground of the converter. NC Pins The NC (not connected) pins have no internal connection and must not have any connection to the secondary side, as this might compromise the primary-to-secondary isolation. C & E Pins The LED within the LIA130 is powered by a sample of the output voltage that is being regulated. Typically, a resistor divider is provided to keep this voltage sample within the operating range of the LED and its series resistor. As the output voltage changes, the LED light output changes, which provides a changing error voltage from the phototransistor output of the LIA130. The sampled voltage must be at least 1.24V (the reference voltage) plus 1.5V (the LED voltage drop) or a minimum of 2.74 volts. The sampled voltage can also be provided from a slaved secondary winding of the transformer rather than a resistor divider. There must be a current-limiting resistor in series with the LED pin to keep the current flow through the LED within its operating range for all expected sampled output levels. This resistor must be selected along with the resistor in series with the output phototransistor. The LIA130, when connected as shown in the Typical Application Circuit, will regulate the output voltage so that the voltage on its FB pin is 1.24V. Set the values of the two voltage divider resistors, R1 and R2 in this way: R1/R2 = (V OUT / VREF) - 1 The value of R1 is set by the input offset current, 0.8μA. 1% accuracy is obtained when the value of R1 satisfies this formula: ((V OUT - 1.24) / R1) > 80µA The frequency response of the converter can be optimized for the particular application by placing a compensation network between the COMP pin and the FB pin of the LIA130. In a system with a typical low-bandwidth requirement, only a 0.1µF capacitor might be needed. If the system has more critical bandwidth requirements, then measurements must be made of the system's loop. See “Practical Design of Power Supplies” by Ron Lenk, IEEE Press, 1998, for an excellent description. The output phototransistor of the LIA130 provides the isolated and amplified error signal that represents the DC output level of the converter. Typically, the collector of the phototransistor will be pulled up to voltage and the emitter will be grounded. The value of the collector's pull-up resistor and the value of the LED current-limiting resistor must be determined together with respect to the input voltage range of the PWM circuitry. The variation in CTR of the LIA130 must also be taken into account. As an example, consider first that the minimum CTR of the LIA130 is 300%. If the current-limiting resistor of the LED is set to allow a maximum current through the LED of 1mA when the converter output is at a nominal 15 volts: R LED = (15V - 2.74V) / 0.001A = 12.260kΩ then a minimum of 3mA will flow through the collector pull-up resistor. If the collector is pulled up to 12V and the PWM has an internal reference voltage of 5V, then the minimum resistor value is: R PULLUP > (12V - 5V) / 0.003A > 2.333kΩ [Standard values can be selected for RLED and RPULLUP and the small differences then re-calculated.]

For proper assembly, the component must be processed in accordance with the current revision of IPC/JEDEC standard J-STD-020. Failure to follow the recommended guidelines may cause permanent damage to the device resulting in impaired performance and/or a reduced lifetime expectancy. Washing Clare does not recommend ultrasonic cleaning or the use of chlorinated solvents. RoHS 2002/95/EC e3Pb 2.540 ± 0.127 (0.100 ± 0.005) 6.350 ± 0.127 (0.250 ± 0.005) 9.144 ± 0.508 (0.360 ± 0.020) 0.457 ± 0.076 (0.018 ± 0.003) 9.652 ± 0.381 (0.380 ± 0.015) 8-Pin DIP Through-Hole Package 7.239 TYP . (0.285) 7.620 ± 0.254 (0.300 ± 0.010)

4.064 TYP

(0.160) 0.889 ± 0.102 (0.035 ± 0.004) PC Board Pattern Dimensions mm (inches) 8-0.800 DIA. (8-0.031 DIA.) 2.540 ± 0.127 (0.100 ± 0.005) 7.620 ± 0.127 (0.300 ± 0.005) 7.620 ± 0.127 (0.300 ± 0.005) 6.350 ± 0.127 (0.250 ± 0.005) 3.302 ± 0.051 (0.130 ± 0.002)

0.254 TYP

(0.01) 8-Pin Surface Mount Package 2.540 ± 0.127 (0.100 ± 0.005) 9.652 ± 0.381 (0.380 ± 0.015) 6.350 ± 0.127 (0.250 ± 0.005) 9.525 ± 0.254 (0.375 ± 0.010) 0.457 ± 0.076 (0.018 ± 0.003) Recommended PCB Land Pattern Dimensions mm (inches) 0.813 ± 0.120 (0.032 ± 0.004) 4.445 ± 0.127 (0.175 ± 0.005) 7.620 ± 0.254 (0.300 ± 0.010) 0.635 ± 0.127 (0.025 ± 0.005) 0.254 ± 0.127 (0.010 ± 0.0005) 2.54 (0.10) 8.90 (0.3503)1.65 (0.0649) 0.65 (0.0255) 3.302 ± 0.051 (0.130 ± 0.002)

Clare, Inc. makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. Neither circuit patent licenses nor indemnity are expressed or implied. Except as set forth in Clare’s Standard Terms and Conditions of Sale, Clare, Inc. assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. The products described in this document are not designed, intended, authorized or warranted for use as components in systems in tended for surgical implant into the body, or in other applications intended to support or sustain life, or where malfunction of Clare’s product may result in direct physical harm, injury, or death to a person or severe property or environmental damage. Clare, Inc. reserves the right to discontinue or make changes to its products at any time without notice. Specification: DS-LIA130-R00C ©Copyright 2009, Clare, Inc. All rights reserved. Printed in USA. 11/17/09 For additional information please visit our website at: www.clare.com

10 PRELIMINARY

MECHANICAL DIMENSIONS (Cont.) Embossment Embossed Carrier Top Cover Tape Thickness 0.102 MAX. (0.004 MAX.) 330.2 DIA. (13.00 DIA.) P = 12.00 (0.472) User Direction of Feed W = 16.30 max (0.642 max) Bo = 10.30 (0.406) Ao = 10.30 (0.406) K1 = 4.20 (0.165) Top Cover Tape K0 = 4.90 (0.193) Tape and Reel Packaging for 8-Pin Surface Mount Package NOTE: Tape dimensions not shown comply with JEDEC Standard EIA-481-2 Dimensions mm (inches)