LD7513A LEADTREND | Alldatasheet
Document overview
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Technical content
Features
Primary-Side Feedback Control with Quasi-Resonant Operation Direct Drive of BJT Switch Constant Voltage within 5% Built-In Adjustable Load Regulation Compensation Constant Current Control Ultra-Low Startup Current (<1.9A) 0.5mA Low Operating Current at Light Load 75 kHz Maximum Switching Frequency. Current Mode Control Green Mode Control Improve Efficiency LEB (Leading-Edge Blanking) on CS Pin Built-in Soft Start VCC OVP (Over Voltage Protection) FB Pin Open/Short Protection Internal OTP (Over Temperature Protection)
Applications
Mobile Phone Adapter Lower Power AC/DC Adapter Typical Application VCC AC Input AC Input EMI Filter OUT CS COMP LD7513A GND FB
Leadtrend Technology Corporation LD7513A-DS-00 November 2013 Pin Configuration SOT-26 (TOP VIEW) YY, Y : Year code (D: 2004, E: 2005…..) WW, W : Week code PP : Production code P13A : LD7513A 1 2 3 4 5 6 VCC GND FB OUT COMP CS YWP 13A pp
Ordering Information
Part number Package Top Mark Shipping LD7513A GL SOT-26 YWP/13A 3000 / tape & reel The LD7513A is ROHS compliant / Green Packaged Pin Descriptions PIN NAME FUNCTION 1 VCC Supply voltage pin. 2 GND Ground. 3 FB Auxiliary voltage sense and Quasi Resonant detection. 4 CS Current sense pin, connect to sense the Switch current. 5 COMP Output of the error amplifier for voltage compensation. 6 OUT Base drive output to drive the external BJT Switch.
Leadtrend Technology Corporation LD7513A-DS-00 November 2013 Block Diagram OUT internal bias & Vref GND 13 V/ 4 V Vref OK PG 18V VCC Protection OVPUVLO Comparator Base Driver OVP Comparator VCC OK FB PWM Comparator R R S Q Error Amplifier Load Compensation Max. Frequency & Green Mode CS Leading Edge Blanking Internal OTP 0.1V/0.4V QRD GM 2.0V Sample and Hold COMP QRD Blanking Time Time-Out 1 C.C. FB Buffer QRDVCOMP Time-Out 2 Delay Counter Protection PG R S Q Q OVP 0.5V S/H S/H UVP C.C. FB VCC CC Control CSQRD
Leadtrend Technology Corporation LD7513A-DS-00 November 2013 Absolute Maximum Ratings Supply Voltage VCC, 20V OUT -0.3 ~3.3V COMP, FB, CS -0.3 ~3.3V Maximum Junction Temperature 150C Storage Temperature Range -65C to 150C Package Thermal Resistance (SOT-26, θJA) 200C/W Power Dissipation (SOT-26, at Ambient Temperature = 85C) 200mW Lead temperature (Soldering, 10sec) 260C ESD Voltage Protection, Human Body Model 2.5 KV ESD Voltage Protection, Machine Model 250 V Caution: Stress exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stress above Recommended Operating Conditions may affect device reliability Recommended Operating Conditions Item Min. Max. Unit Operating Ambient Temperature -40 85 C Operating Junction Temperature -40 125 C Supply VCC Voltage 5.5 16 V VCC Capacitor 2.2 10 F Start-up resistor Value (AC Side, Half Wave) 1M 6.6M Comp Pin Capacitor 470 4700 pF Note: 1. It’s essential to connect VCC pin with a SMD ceramic capacitor (0.1 F~0.47F) to filter out the undesired switching noise for stable operation. This capacitor should be placed close to IC pin as possible 2. Connecting a capacitor to CO MP pin is also essential to filter out the undesired switching noise for stable operation. 3. The small signal components should be placed close to IC pin as possible.
Leadtrend Technology Corporation LD7513A-DS-00 November 2013
Electrical Characteristics
(TA = +25C unless otherwise stated, VCC=12.0V) PARAMETER CONDITIONS SYM. MIN TYP MAX UNITS Supply Voltage (Vcc Pin) Startup Current VCC=UVLO-ON-0.05V ICC-ST --- 1.0 1.9 A Operating Current VCOMP=2.5V, OUT= open, FB=2V ICC-OP1 0.45 0.55 0.65 mA VCOMP=0V, OUT=open, FB=2V ICC-OP2 0.4 0.5 0.6 mA OVP/FB UVP tripped, FB=0V ICC-OPA 0.18 0.25 0.32 mA UVLO (off) VCC-OFF 3.4 4.0 4.6 V UVLO (on) VCC-ON 12 13 14 V Vcc OVP Level VCC-OVP 17 18 19 V Vcc OVP De-bounce time * TD-VCCOVP --- 90 --- s Error Amplifier (COMP pin) Reference Voltage, VREF VREF 1.98 2.00 2.02 V Transconductance Gm-comp 70 90 110 mho Output Sink Current VFB= VREF+0.05, VCOMP=2V* ICOMP-SINK1 --- -4 --- A VFB=2.6V ICOMP-SINK2 -92 -80 -68 A Output Source Current VFB = Vref-0.05V, VCOMP=2V* ICOMP-SOURCE1 --- 4 --- A VFB =1.4V ICOMP-SOURCE2 6.5 10 13.5 A Output Upper Clamp Voltage VFB=1V * VCOMP-CLAMP --- 3 --- V Load Compensation Current VCOMP=3V ILoad Comp 17 20 23 A Current Sensing (CS Pin) Maximum Input Voltage, VCS-OFF VCS-MAX 0.95 1 1.05 V Minimum VCS-OFF VCOMP < 0.45V VCS-MIN 0.13 0.15 0.17 V Leading Edge Blanking Time TLEB 450 580 710 ns Input impedance * ZCS 1 --- --- M Delay to Output * TPD --- 100 --- ns QRD (Quasi Resonant Detection, FB Pin) Lower Clamp Voltage IDET=-1mA* VFB-CLAMP-L --- -0.3 --- V QRD Trip Level * VQRD --- 100 --- mV Hysteresis* VQRD-HYS --- 300 --- mV QR Mode Time Out 1 * TOUT1 --- 6 --- s Max Frequency Clamp Time Out 2 After soft start* TOUT2 --- 4 --- ms During soft start* TOUT2-SS --- 80 --- s QR Mode Blanking Time * TQR-BLANK --- 1 --- s Input Bias Current VFB=1V~5V, OUT=OFF * IFB-IB 0.0 --- 1.0 A
Leadtrend Technology Corporation LD7513A-DS-00 November 2013 PARAMETER CONDITIONS SYM. MIN TYP MAX UNITS Oscillator for Switching Frequency Maximum Frequency FSW-MAX 65 75 85 kHz Green Mode Frequency FSW-GREEN 20 25 34 kHz Minimum Frequency FSW-MIN 0.9 1.2 1.44 kHz Maximum ON Time Maximum On Time TON-MAX 10 13 18 s Output Drive (OUT Pin) Output Low ON-resistance ISINK=50mA ROUT-L -- 2.5 3 Max. Output Base Current VCS=1V IB-MAX 27.5 30 36.5 mA Soft Start Soft Start Time * TSS --- 5 --- ms FB Under Voltage Protection (UVP, FB Pin) Under Voltage Level VFB-UVP 0.4 0.5 0.6 V UVP Delay Time After soft start* TD-FBUVP --- 10 --- ms At start-up* TD-FBUVP-SS --- 15 --- ms C.C. Disable Level * VFB-CC --- 1.0 --- V On Chip OTP (Over Temperature) OTP Level * TINOTP --- 130 --- C OTP Hysteresis * TINOTP-HYS --- 20 --- C *: Guaranteed by design.
Leadtrend Technology Corporation LD7513A-DS-00 November 2013 Typical Performance Characteristics VCC-ON (V) Fig. 1 UVLO (on) vs. Temperature Temperature (C) 10.0 11.0 12.0 13.0 14.0 15.0 -40 0 40 80 120 125 VCC-OFF (V) Temperature (C) Fig. 2 UVLO (off ) vs. Temperature 1.0 3.0 4.0 6.0 2.0 -40 0 40 80 120 125 5.0 ICC-ST (A) Temperature (C) Fig. 3 Startup Current vs. Temperature 0.5 1.0 2.0 0.0 -40 0 40 80 120 125 1.5 FSW-MAX (KHz) Fig. 4 Max Frequency vs. Temperature Temperature (C) -40 60 0 40 80 120 125 FSW-GREEN (KHz) Temperature (C) Fig. 5 Green Mode Frequency vs. Temperature -40 0 40 80 120 125 FSW-MIN (KHz) Temperature (C) Fig. 6 Min Frequency vs. Temperature 0.9 1.0 1.1 1.2 1.3 1.4 -40 0 40 80 120 125
Leadtrend Technology Corporation LD7513A-DS-00 November 2013 VREF (V) Temperature (C) Fig. 7 Reference Voltage vs. Temperature -40 0 40 80 120 125 1.98 1.99 2.00 2.01 2.02 1.97 -40 -20 0 20 40 60 80 100 120 Y Axis Title X Axis Title-40 -20 0 20 40 60 80 100 120 Y Axis Title X Axis Title ILoad Comp (A) Temperature (C) Fig. 8 Load Compensation vs. Temperature -40 0 40 80 120 125 VCS-MAX (V) Temperature (C) Fig. 9 VCS (off) vs. Temperature 0.94 0.96 0.98 1.00 1.02 1.04 -40 0 40 80 120 125 VCC-OVP (V) Temperature (C) Fig. 10 VCC OVP vs. Temperature -40 0 40 80 120 125 ROUT-L () Temperature (C) Fig. 11 Output Low ON-resistance vs. Temperature -40 0 40 80 120 125 0.5 1.5 2.5 3.5 4.5 IB-MAX (mA) Temperature (C) Fig. 12 Max. Output Base Current vs. Temperature -40 0 40 80 120 125
Leadtrend Technology Corporation LD7513A-DS-00 November 2013
Application Information
The LD7513A is an excellent primary side feedback controller with Quasi-Resonant operation to provide high efficiency. The LD7513A removes the need for secondary feedback circuits while achieving excellent line and load regulation. It meets the green -power requirement and is intended for the use in those modern switching power suppliers and linear adaptors that demand higher power efficiency and power -saving. It integrates with more functions to reduce the extern al components counts and the size. Major features are described as below. Under Voltage Lockout (UVLO) An UVLO comparator is implemented in it to detect the voltage across VCC pin. It would assure the supply voltage enough to turn on the LD7513A and furth er to drive the power BJT. As shown in Fig. 13, a hysteresis is built in to prevent shutdown from voltage dip during startup. Vcc UVLO(on) UVLO(off) t t I(Vcc) startup current (~uA) operating current (~ mA) Fig. 13 Startup Current and Startup Circuit The typical startup circuit to generate VCC of the LD7513A is shown in Fig. 14. During startup transient, the VCC is below the UVLO(on) threshold, so there’s no pulse delivering out from LD7513A to drive the power BJT. Therefore, the current through R1 will be used to charge the capacitor C1. Until the VCC is fully charged to enable the LD7513A to deliver the drive -out signal, the auxiliary winding will provide the supply current instead. If PWM controller requires less current to start up, it will allow less power consumption on R1. By using CMOS process a nd some unique circuit design, the LD7513A requires only 1.9A max to start up. Higher resistance of R1 will spend much more time to start up. The user is recommended to select proper value of R1 and C1 to optimize the power consumption and startup time. EMI Filter OUT CS VCC GND LD7513A AC input Cbulk D1 Fig. 14
Leadtrend Technology Corporation LD7513A-DS-00 November 2013 Principle of CV Operation In the DCM flyback converter, it can sense the output voltage from auxiliary winding. LD7513A samples the auxiliary winding on the primary -side to regulate the output voltage, as shown in the Fig. 15 . The voltage induced in the auxiliary winding is a reflection of the secondary winding voltage while the BJT is in off state. Via a resistor divider connected between the auxiliary winding and FB pin, the auxiliary voltage is sampled after the sample delay time and will be hold until the next sampling period. The sampled voltage is compared with an internal reference VREF (2.0V) and the error will be amplified. The error amplifier output COMP reflects the load condition and controls the duty cycle to regulate the output voltage, thus constant output voltage can be achieved. The output voltage is given as: FOUT V)Na Ns)(Rb Ra1(V0.2V Where VF indicates the drop voltage of the output diode, Ra and Rb are top and bottom feedback resistor value, Ns and Na are the turns of transformer secondary and auxiliary. In case that the output voltage is sensed through the auxiliary winding; the leakage inductance will induce ringing to affect output regulation. To optimize the collector voltage clamp circuit will minimize the high frequency ringing and achieve the best regulation. Fig. 16 shows the desired collector voltage waveform in compare to those with large undershoot due to leakage inductance induced ring (Fig. 17). The ringing may make the sample error an d cause poor performance for output voltage regulation. A proper selection for resistor RS, in series with the clamp diode, may reduce any large undershoot, as shown in Fig. 18. OUT CS COMP FB Na NsNp Ra Rb VIN S/H VREF + Driver LD7513A Fig. 15 Vce The overshoot here is minor Fig.16 Vce The undershoot would make the sample error. Fig.17 OUT CSCOMP FB Na NsNp Ra Rb VIN LD7513A RS Fig.18
Leadtrend Technology Corporation LD7513A-DS-00 November 2013 Load Regulation Compensation LD7513A is implemented with load regulation compensation to compensate the cable voltage drop and to achieve a better voltage regulation . The offset voltage is created across FB by an internal sink current source which feeds out the FB during the sampling period . The internal sink current source is proportional to the value of VCOMP, as shown in Fig. 19. As a result, the drop due to the cable loss can be compensated. So, the offset voltage decreases as the V COMP decreases in condition from full-load to no -load. It can also be programmed by adjusting the resistance of the voltage divider to compensate the drop for various cable lines used. The equation of internal sink current is shown as: A)( 7.840.45)(VI COM PFB The maximum compensation is shown as: (Ra//Rb)I Vo ΔV FB VCOMP (V)0 3.00.45 IFB(A) Fig. 19 Quasi-Resonant Mode Detection The LD7513A employs quasi-resonant (QR) switching scheme to swi tch in valley-mode either in CV or CC operation. This will greatly reduce the switching loss and the ratio dv/dt in the entire operating range for the power supply. Fig. 20 shows the typical QR detection block. The QR detection block will detect auxiliary winding signal to drive BJT as FB pin voltage drops to 0.1V. The QR comparator will not activate if FB pin voltage remains above 0.4V. FB PWM R R S Q Error Amplifier Load Compensation Max. Frequency & Green Mode CS Leading Edge Blanking 0.1V/0.4V QRD GM 2.0V Sample and Hold QRD Blanking Time Time-Out 1 Buffer QRD VCOMP Time-Out 2 S/H C.C. FB Turn-on Turn-off Ra Rb Naux Fig. 20 Multi-Mode Operation The LD7513A is a QR controller operating in multi-modes. The controller changes operation modes according to line voltage and load conditions. At heavy-load (VCOMP>1.8V, Fig. 21 ), there might be two situations to meet. If the system AC input is in low line, the LD7513A will turn on in first valley. If in high lin e, the switching frequency will increase till over the limit of 75 kHz and skip the first valley to turn on in 2 nd, 3rd….valley. The switching frequency would vary depending on the line voltage and the load conditions when the system is operated in QR mode. At mediu m or light load conditions (0 .7V<VCOMP<1.4V), the frequency clamp is reduced to 25 kHz maximum. However, the characteristic in valley switching behaves well without problem in this condition. The LD7513A will turn on in 4th, 5 th…. valley. That i s, when the load decreases, the system will automatically skip some valleys and the switching frequency is therefore reduced. A smooth frequency fold -back and high power efficiency are then achieved. At zero load or very light load conditions (VCOMP<0.3V), the system operates in minimum frequency for power saving. The system modulates the frequency according to the load and VCOMP conditions.
Leadtrend Technology Corporation LD7513A-DS-00 November 2013 Quasi Resonant (First Valley) Discontinuous with valley switching (2nd,3rd ,4th ... Valley) 25kHz 1.2kHz 75kHz Vcomp fs Green Mode 1.40.70.3 1.8 Fig. 21 Current Sensing and Leading -edge Blanking The typical current mode of PWM c ontroller feedbacks both current signal and voltage signal to close the control loop and achieve regulation. As shown in Fig. 22, the LD7513A detects the primary BJT current from the CS pin, which is not only for the peak current mode control but also for the pulse -by-pulse current limit. The maximum voltage threshold of the current sensing pin is set at 1V. From above, the BJT peak current can be obtained from below. CS PEAK(MAX) R 1VI A leading -edge blanking (LEB) time is included in the input of CS pin to prevent the false -trigger from the turn-on current spike. OUT CSCOMP FB Na NsNp Ra Rb VIN LD7513A RS LEB time RCS Fig. 22 Principle of C.C. Operation The p rimary side control scheme is applied to eliminate secondary feedback circuit or o pto-coupler, which will reduce the system cost. The switching waveforms are shown in Fig. 23. The output current “Io” can be expressed as: S DIS CS CS S P DIS PKP, S P S DISPKS, T T R V N N Ts TiN N T Ti 1Io The primary peak current (iP,PK), inductor current discharge time (TDIS) and switching period (T S) can be detected by the IC . T he ratio of V CS*TDIS/TS will be modulated as a constant (VCS*TDIS/TS =1/3). So that IO can be finally obtained as R N N T T R V N N 1Io SS P S DIS S CS S P However this is an approximate equation. The user may fine-tune it according to the experiment result. Out iP iS iP,PK iS,PK TON TDIS TS Fig. 23
Leadtrend Technology Corporation LD7513A-DS-00 November 2013 OVP (Over Voltage Protection) on Vcc – Auto Recovery LD7513A is implemented with OVP function through Vcc. As the Vcc voltage rises over the OVP threshold voltage, the output drive circuit will be shutdown simultaneously thus to stop the switching of the power BJT until the next UVLO(on) arrives. The Vcc OVP function of LD7513A is an auto -recovery type protection. The Fig. 24 shows its operation. On the other hand, if the OVP condition is removed, the Vcc level will get back to normal level and the output will automatically return to the normal operation. VCC UVLO(on) UVLO(off) t OVP Tripped t OUT Switching SwitchingNon-Switching OVP Level Fig. 24 FB Under Voltage Protection (FB UVP) – Auto Recovery LD7513A is implemented with an UVP function over FB pin. If the FB voltage falls below 0.5V for over the delay time, the protection will be activated to stop the switching of the power BJT until the next UVLO(on) arrives. The FB UVP function in LD7513A is an auto -recovery type protection. The Fig. 25 shows its operation. The FB UVP is disabled during the soft start period. FB UVP Level t FB UVP Tripped t OUT Switching Switching Non-Switching Vcc t FB UVP Delay Time UVLO(on) UVLO(off) Soft Start FB UVP Delay Time FB Short Fig. 25
Leadtrend Technology Corporation LD7513A-DS-00 November 2013
Package Information
Symbol Dimension in Millimeters Dimensions in Inches Min Max Min Max A 2.692 3.099 0.106 0.122 B 1.397 1.803 0.055 0.071 D 0.300 0.500 0.012 0.020 F 0.95 TYP 0.037 TYP H 0.080 0.254 0.003 0.010 I 0.050 0.150 0.002 0.006 J 2.600 3.000 0.102 0.118 M 0.300 0.600 0.012 0.024 θ 0° 10° 0° 10° Important Notice Leadtrend Technology Corp. reserves the right to make changes or corrections to its products at any time without notice. Customers should verify the datasheets are current and complete before placing order.
Leadtrend Technology Corporation LD7513A-DS-00 November 2013
Revision History
Rev. Date Change Notice 00 11/15/2013 Original Specification.