LC7818 SANYO | Alldatasheet
Document overview
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Technical content
Features
. (1) 2-channel 5-position source select + tape monitor on chip (2) Control input pins of inputvoutput common type (Key input and LED display) (3) Delivers audio muting control signal. (4) Possible to select operation modes of backup mode, initialization mode, automatic switchover of function (5) Supply voltage + 20V, single-supply operation available Absolute Maximum Ratings at Ta = 25°C,Vs5 = OV unit Maximum Supply Voltage = Vpp max Vpp VeeSVss Vs5-0.3 to +20 Vv Veemax Veg - 20 to Vs5'+ 0.3 Vv Output Voltage Vout ACTL to ECTL Vss ~ 0.3 to Vpp + 0.3 Vv TMOUT Output Current lout “ 30 mA Voltage Difference at Avon Switch ON 0.5 Vv Analog Switch-ON Mode Allowable Power Dissipation Pd max Tas 85°C 500 mW Operating Temperature Topg -30to +75 °C Storage Temperature Tstg -40to +125 °C Allowable Operating Conditions at Ta = 25°C, Vss = OV,|Vpol2 |Veel min typ max unit Supply Voltage Vop1 Vop Vpp-Vee= 12V Vsg+6 Vos +185 V Vee Vee Vs5- 18.5 Vss OV Vopz Vop Vee S Vss backup Vss+3 — Vs5418.5 Vv Pin Assignment Continued on next page. ate (OT ahaa Bi fz 2) 02 cigs 20) cz ey a) 02 eis 26) E2 SOURCE! |] 6 25} SOURCE 2 Package Dimensions 3047A our 7 24} our? (unit : mm) ™1 Ae Me7He ay) m2 i aa —_ Yee 19 2) Yoo Te Hy Tour 10 aiy Mute ry ere 20h cr 1+ | an Rr 19) FN m2 0.25 Tere x3 el lemme 22 Den 17) Twere l Hy % Fer 5 16) | : ‘ss Oe 095 178 SANYO: DIP30$ SANYO Electric Co.,Ltd. Semiconductor Business Headquarters TOKYO OFFICE Tokyo Bidg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN 21894 JN /1268KI/7155KI,TS KAWA No.1636-1/7
Continued from preceding page. min typ = max unit Input “H’ Level Voltage VIH ACTLtoECTL, 0.7Vb0 Voo V TMCTL Win Voo-1.0 Voo V TNTT Vss+3 .0 Von V Input “L” Level Voltage VIL ACTLtOECTL, Vss 0.25Voo V TMCTL Min Vss Vsst+1.0 V TNIT Vss Vss+0.5 V Input ““M" Level Voltage ° VIM Win 0.45V op O.55Vpo V Analog Switch Input VIN AltoE1, A2toE2 Vee Voo V Voltage Range SOURCE1-2 TM1,2 Electrical Characteristics at Ta = 25°C,Vss = OV,|Vpp] 2 |Veel min typ max unit Output “H” Level Voltage VOH MUTE Ton=-0.4mA,Vod2=9V Voo-0.5 Von V Output “’L" Level Voltage VOL1 ACTLIOECTL ToL=30ma, V dD=18V 0 2v TMouT Vou2 MUTE 1oL=0.4mA, Voo29v L:) 0.5 V Analog Switch-ON Resistance Ron AltoE1,A2toE2 = [= 1ma, Voo- VEE=12V 120 Q TM1,TM2 T=1ma, Vop- VEE=18¥. 80 Q ouT1,ouT2 T=1ma, Vo0- VEE=37V 70 Q Input/Output OFF Leak TOFF1 ACTLtoECTL Vo=Vss+18v 10 wA Current TMOUT Torr2 cr Vo=Vss+18V 1 uA TOFF3 AltoE1,A2toE2 Analog SW OF F -1 1 4wA T™M1,2,0UT1,2 VIN=VO=VEEtoVEE+37V Total Harmonic Distortion THD SOURCE1,2 VIN=1Vems, f=1kHz> 0.00150.01 % OUT1,2 Vob- VEE=15to37V Feedthrough FTH AltoE1 SOURCE? Voo-VEE=37V,f=10kHz 55 dB ouTt VIN=O.77Vrms A2toE2 SOURCE2 RL=47kQ ouT2 Crosstalk CT AltoE1 SOURCE2 Vobd- VEE=37V, f=10kHz 75 dB ouT2 VIN=O.77Vrms A2toE2 SOURCET RL=47kQ out Current Dissipation Top Voo Operating mode V pp~ VEE=37V 1 mA Muting Time TM MUTE OSC period x 21 Input Accept Pulse Width TIN) ACTCtoECTL OSC period x 3 (Switch Setect) THCTL Input Accept Pulse Width TIN) ACTLIOECTL OSC period x 1 {Muting Output) TMCTL External Capacitance forCR' C1 CR 0.001 0.1 uF osc OSC Period T1 cR Voo-Vss=6v O.4c1R1 0.7C1R1 T2 CR Voo-Vss=18.5v O.3c1R1 O.6C1R1 Current Dissipation Ipp back up Vow [tects 1 4A Vop=5V, Vee=Vss=0V Operation caused by combination of INIT, Min inputs [ure [win [Operation] [ #| om [Normal fon [ t [ Backup {|_| a | Auto function oye [ou Tm [Mating L. [a [Reser ee No.1636-2/7
[Pin Name | Pin No. | Input/Output Configuration Function Voo 22 «Power supply pin Vss 16 Single supply (+): Vgs=VeE=GND VEE 9 Duat supply (+): Vgs=GND, VeE=(—)V A1,/B1 142 bg +Ato E, TM: Audio signal input pin an 64 . Ci,01 344 6a * SOURCE: Output pin for REC E1,TM1 5-8 oO RI] * QUT: Audio signal output pin A2,B2 30-29 ce 2,02 28,27 Dn O-$g E2,TM2 26,23 én O-£4 source? | 6 SOURCE] source2 | 25 Tn O-BY ouTt 7 out Ba our2 24 + TM ON/OFF-state display LED driver output THOUT aeTe 1 * Input/output pin for analog switch control and BCL 12 its state display LED driver output Ta 13 — perc 14 ECTL 15 TNIT ‘Input pin for mode setting (Details are given wIN 19 *Input pin for mode setting (Detaits are given on page 2.) 2 + Input/output pin for clock CR 20 -—— generation a) a+» C1, R1 are connected. ” Note: Priority for simultaneous push of keys is given as shown below. . TMCTL>ACTL>BCTL>CCTL>DCTL>ECTL The pin (ACTL to ECTL pins) whose LED driver is turned ON (function selected) does not accept key input. Key input to such pin causes no operation to occur. I No products described’ or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. W@ Anyone purchasing any products described or contained herein for an above-mentioned use shall: . © Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: ® Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally @ Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guarant- eed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. See No.1636-3/7
Equivalent Circuit Block Diagram 1 (swa) (aswa’ ° aQ Bd bs 7 Bey {] az t (swe) (2 SWB) if ait} RS nal [29 af ee ree if T Se] 6a C] cz «1SwD) of co R 4 acm . L (2SWE) a a Pst + ae * k sources [ ] 7 {_] source 2 Hl (swo) (swe) j mC] es ? Se RS}—1]} maz , (SWF) (2swr) ours [] Rs res * G Soy bo [] ourz wor 1 ‘tT =! Le men 0 i> j the Ken OC} q ~_— % | tar OF q> jz? VOD — . \\ss 13] Fe “ee ten O q 2 ° | > 3 2 ie 8 E — %j | ber L) > g | ten () q> __ yl Ss MUTE CONTROL 30 mm O d po T TIMER UJ cr * H __ 27 tit [] d> C] mute No.1636-4/7
(1) Initialization, muting mode {One channel only is shown below.) Alo © source A °- ohare | BI O-——-o “ 8B ee anor i D1t}—o « 0 Se OBGL e -— oe CTL inva] er GCcrL sourcet = -----' vss, ® | ™I gy PLAY. ciate aed == ¥OD an Q der MUTE output © tka * FUNCTION ae * Fe yureg-_—-0 mute output 1x3 : i @ O Terk | T: OSC period cr INIT | or mute JL tS) “Voc 0+} VoD ws (2) Backup mode (Audio section, MUTE circuit are omitted.) Poa Merl If the power switch is set to the primary side at the backup mode and it takes time for +B eS rY7 ‘to fall when power is turned OFF, the MIN pin must be brought to “L” state before the ACTL ad __ to ECTL, TMCTL pins are brought to “L” cond Bert state or the MIN pin must be brought to “L”” | state within OSC period x 3 in case the ACTL _— wi to ECTL, TMCTL pins are brought to “L” - state earlier; otherwise the function may be shifted to another. - Ber. . _ Power OFF Power OFF Eck eTL. om | px CTLpin Yo CTL pin “Lt” ‘MOUT srese = VSS ----- = wh ay spp MIN pin "L" Tit MIN pin“ Within OSC period x 3 7 | *B +vcco—ot yoo backup capacitor -B nr rn | vee eee ° No.1636-5/7
(3) Auto function, backup mode Lc7e18 — — *- o Twcn O Ach me | ro 1 ober i © | | ; O Cor ; +a beri : : OF ry +B Fiiout A oa sa = | \\ ity a TF i Fd =B ewyeo— yoo Fete an | “B rr en i Lc7818 L_ ~ — a : * M™CTL (4) Auto function, initialization, reset mode ORT.
4 SBT
° @ Cort ae O Bert a g €) iF: © TMOUT Pw | oR | | Cs | [| “Ee +B +0 a vo tL No.1636-6/7
INIT [MIN [Operation [Description id fa | fem | + This state is kept at the normal operation mode. * The backup mode is entered at this state. . a L Backup mode ww wee ULL ee ¥4¥p0 CINTT.“H'}- - ~ - - a7 Yss Backup mode + When the ACTL to ECTL input occurs, set to this state. eo —_ | ff Do Auto function ileal 7 ooo ooo WSs (TM reset) aetna ~>o7> = Yoo Gaara") Set t2."H" for OSC period x 3 oF greater. yes, + When applying muting regardless of the function select key, set to this state. nT “oo L Muting CHiN WE -- ~~ wooo ona NSS | ----- op | MUTE vss OSC period x 22 +The TM is turned OFF and the A circuit is turned ON. Yoo INT L | Lt | initialization —_ os *To initialize, hold this state for OSC period x 3 or greater. + All input circuits are turned OFF. Yoo Thr we ~ 7" Qojisee. or greater. ~~ YS No.1636-7/7