LC75814V

LC75814V SANYO | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 14

Technical content

Features

• Support for 1/4 duty 1/2 bias or 1/4 duty 1/3 bias drive of up to 64 segments under serial data control.
• Serial data input supports CCB format communication with the system controller.
• Serial data control of the power-saving mode based backup function and all the segments forced off function
• Serial data control of switching between the segment output port and the general-purpose output port functions
• High generality, since display data is displayed directly without decoder intervention.
• Independent V LCD for the LCD driver block (VLCD can be set to any voltage in the range 2.7 to 6.0 volts, regardless of the logic block power-supply voltage.)
• The INH pin can force the display to the off state.
• RC oscillator circuit Package Dimensions unit: mm 3191A-SSOP30 11 5 7.6 0.65 9.75 0.5 5.6 0.1 1.5max 0.22 (0.33) 0.15 (1.3) SANYO: SSOP30 [LC75814V] LC75814V SANYO Electric Co.,Ltd. Semiconductor Company TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN 1/4 Duty General-Purpose LCD Driver CMOS IC Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft’s control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein.
• CCB is a trademark of SANYO ELECTRIC CO., LTD.
• CCB is a SANYO’s original bus format and all the bus addresses are controlled by SANYO.

No. 6792-2/14 LC75814V DIP1/S1 ILC00283 CLP2/S2 CEP3/S3 P4/S4 OSCS5 VSSS6 VLCD 2S7 VLCD 1S8 VLCDS9 VDDS10 COM4S11 COM3S12 COM2S13 COM1S14 S16S15 LC75814V INH Specifications Absolute Maximum Ratings at Ta = 25°C, VSS = 0 V Parameter Symbol Conditions Ratings Unit Maximum supply voltage VDD max VDD –0.3 to +7.0 V VLCD max VLCD –0.3 to +7.0 V VIN 1 CE, CL, DI, INH –0.3 to +7.0 V Input voltage VIN 2 OSC –0.3 to VDD + 0.3 V VIN 3 VLCD 1, VLCD 2 –0.3 to VLCD + 0.3 V Output voltage VOUT 1 OSC –0.3 to VDD + 0.3 V VOUT 2 S1 to S16, COM1 to COM4, P1 to P4 –0.3 to VLCD + 0.3 V IOUT 1 S1 to S16 300 µA Output current IOUT 2 COM1 to COM4 3 mA IOUT 3 P1 to P4 5 mA Allowable power dissipation Pd max Ta = 85°C 100 mW Operating temperature Topr –40 to +85 °C Storage temperature Tstg –55 to +125 °C Allowable Operating Ranges at Ta = –40 to +85°C, VSS = 0 V Parameter Symbol Conditions Ratings Unitmin typ max Supply voltage VDD VDD 2.7 6.0 V VLCD VLCD 2.7 6.0 V Input voltage VLCD 1 VLCD 1 2/3 VLCD VLCD V VLCD 2 VLCD 2 1/3 VLCD VLCD V Input high level voltage VIH CE, CL, DI, INH 0.8 VDD 6.0 V Input low level voltage VIL CE, CL, DI, INH 0 0.2 VDD V Recommended external resistance R OSC OSC 43 kΩ Recommended external capacitance C OSC OSC 680 pF Guaranteed oscillation range fOSC OSC 25 50 100 kHz Data setup time tds CL, DI: Figure 2 160 ns Data hold time tdh CL, DI: Figure 2 160 ns CE wait time tcp CE, CL: Figure 2 160 ns CE setup time tcs CE, CL: Figure 2 160 ns CE hold time tch CE, CL: Figure 2 160 ns High level clock pulse width tøH CL: Figure 2 160 ns Low level clock pulse width tøL CL: Figure 2 160 ns Rise time tr CE, CL, DI: Figure 2 160 ns Fall time tf CE, CL, DI: Figure 2 160 ns INH switching time tc INH, CE: Figure 3 10 µs Top view

No. 6792-3/14 LC75814V Parameter Symbol Conditions Ratings Unitmin typ max Hysteresis VH CE, CL, DI, INH 0.1 VDD V Input high level current IIH CE, CL, DI, INH; VI= 6.0 V 5.0 µA Input low level current IIL CE, CL, DI, INH; VI= 0 V –5.0 µA VOH 1 S1 to S16; IO = –20 µA VLCD – 0.9 V Output high level voltage VOH 2 COM1 to COM4; IO = –100 µA VLCD – 0.9 V VOH 3 P1 to P4; IO = –1 mA VLCD – 0.9 V VOL 1 S1 to S16; IO = 20 µA 0.9 V Output low level voltage VOL 2 COM1 to COM4; IO = 100 µA 0.9 V VOL 3 P1 to P4; IO = 1 mA 0.9 V VMID 1 COM1 to COM4; 1/2 bias, 1/2 VLCD – 0.9 1/2 VLCD + 0.9 VIO = ±100 µA VMID 2 S1 to S16; 1/3 bias, 2/3 VLCD – 0.9 2/3 VLCD + 0.9 VIO = ±20 µA Output middle level voltage*1 VMID 3 S1 to S16; 1/3 bias, 1/3 VLCD – 0.9 1/3 VLCD + 0.9 VIO = ±20 µA VMID 4 COM1 to COM4; 1/3 bias, 2/3 VLCD – 0.9 2/3 VLCD + 0.9 VIO = ±100 µA VMID 5 COM1 to COM4; 1/3 bias, 1/3 VLCD – 0.9 1/3 VLCD + 0.9 VIO = ±100 µA Oscillator frequency fOSC OSC; ROSC = 43 kΩ , COSC = 680 pF 40 50 60 kHz IDD 1 VDD ; power saving mode 5 µA IDD 2 VDD ; VDD = 6.0 V, output open, fosc = 50 k Hz 230 460 µA ILCD 1 VLCD ; power saving mode 5 µA Current drain ILCD 2 VLCD ; VLCD = 6.0 V, output open 100 200 µA1/2 bias, fosc = 50 k Hz ILCD 3 VLCD ; VLCD = 6.0 V, output open 60 120 µA1/3 bias, fosc = 50 k Hz Electrical Characteristics for the Allowable Operating Ranges Note: *1 Excluding the bias voltage generation divider resistors built in the VLCD 1 and VLCD 2. (See Figure 1.) ILC00269 VLCD VLCD 1 VLCD 2 To the common segments drivers Except these resistors VSS Figure 1

No. 6792-4/14 LC75814V Figure 2 Block Diagram VIH VIL VIH VIL VIH VIL tf tøL tøH tds tcp tcs tch tdh tr 50% CE CL DI ILC00271 2. W hen CL is stopped at the high level VDD VLCD OSC VLCD 1 VLCD 2 VSS DI S16 S15 S4 / P4 S3 / P3 S2 / P2 S1 / P1 COM4 COM3 COM2 COM1 ILC00272 CL CE ADDRESS DETECT OR SEGMENT DRIVER & LA TCH SHIFT REGISTER COMMON DRIVER CLOCK GENERA TOR INH VIH VIL VIH VIL VIH VIL tr tøH tøL tds tcp tcs tch tdh tf 50% CE CL DI ILC00270 1. W hen CL is stopped at the low level

No. 6792-5/14 LC75814V CE: Chip enable CL: Synchronization clock DI: Transfer data H S1/P1 to S4/P4 S5 to S16 Pin 1 to 4 5 to 16 — O Open Segment outputs for displaying the display data transferred by serial data input. The pins S1/P1 to S4/P4 can be used as general-purpose output ports when so set up by the control data. COM1 COM2 COM3 COM4 17 to 20 — O OpenCommon driver outputs. The frame frequency fO is given by: fO = (fOSC /512) Hz. OSC 26 CE CL DI Serial data transfer inputs. These pins are connected to the control microprocessor. — I/O VDD I GND Oscillator connection An oscillator circuit is formed by connecting an external resistor and capacitor to this pin. VLCD 1 23 — I OpenUsed to apply the LCD drive 2/3 bias voltage externally. This pin must be connected to VLCD 2 when 1/2 bias drive is used. VLCD 2 24 — I OpenUsed to apply the LCD drive 1/3 bias voltage externally. This pin must be connected to VLCD 1 when 1/2 bias drive is used. VDD 21 — — —Logic block power supply. Provide a voltage in the range 2.7 to 6.0 V. VLCD 22 — — —LCD driver block power supply. Provide a voltage in the range 2.7 to 6.0 V. VSS 25 — — —Ground pin. Connect to ground. INH 27 L I GND Display off control input

• INH = low (VSS ): Off S1/P1 to S4/P4 = Low (These pins are forcibly set to the segment output port function and fixed at the V SS level.) S5 to S16 = Low (VSS ), COM1 to COM4 = Low (VSS )
• INH = high (VDD ): On Note that serial data transfers can be performed when the display is forced off by this pin. Active I/O Handling when unusedFunctionPin No. Serial Data Transfer Format 1. When CL is stopped at the low level Note: DD ... Direction data C L C E D I ILC 00273 D 1 D 2 D 3 D 21 D 22 D 23 D 24 D 25 D 26 D 27 D 28 D 29 D 30 D 31 D 32 0 P0 P1 P2 D R SC BU 0 C C B address 8 bits D isplay data 32 bits C ontrol data 7 bits D D 1 bit D 33 D 34 D 35 D 53 D 54 D 55 D 56 D 57 D 58 D 59 D 60 D 61 D 62 D 63 D 64 0 0 0 0 0 0 0 1 C C B address 8 bits D isplay data 32 bits Fixed data 7 bits D D 1 bit

No. 6792-6/14 LC75814V 2. When CL is stopped at the high level Note: DD ... Direction data C L C E D I ILC 00274 D 1

0 D 2 D 3 D 21 D 22 D 23 D 24 D 25 D 26 D 27 D 28 D 29 D 30 D 31 D 32 0 P0 P1 P2 D R SC BU 0

D 33 D 34 D 35 D 53 D 54 D 55 D 56 D 57 D 58 D 59 D 60 D 61 D 62 D 63 D 64 0 0 0 0 0 0 0 1 C C B address 8 bits D isplay data 32 bits Fixed data 7 bits D D 1 bit Serial Data Transfer Examples

• When 33 or more segments are used, all 80 bits of the serial data must be sent.
• When fewer than 33 segments are used, only 40 bits of serial data need to be sent. However, the display data D1 to D32 and the control data must be sent.

0 D1 D2 D21 D22 D23 D24 D25 D26 D27 D28

D29 D30 D31 D32 0 P0 P1 P2 DR SC BU 0D3

0 D33 D34 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63 D64 0 0 0 0 0 0 0 1D35

D29 D30 D31 D32 0 P0 P1 P2 DR SC BU 0D3 Note: When fewer than 33 segments are used, transfers such as that shown in the figure below cannot be used. ILC00275 40 bits8 bits

1. P0 to P2: Segment output port/general-purpose output port switching control data. These control data bits switch the S1/P1 to S4/P4 output pins between their segment output port and general-purpose output port functions. Note: Sn (n = 1 to 4): Segment output ports Pn (n = 1 to 4): General-purpose output ports Also note that when the general-purpose output port function is selected, the output pins and the display data will have the correspondences listed in the tables below. For example, if the output pin S4/P4 has the general-purpose output port function selected, it will output a high level (VLCD ) when the display data D13 is 1, and will output a low level (VSS) when D13 is 0. 2. DR: 1/2 bias drive or 1/3 bias drive switching control data This control data bit selects either 1/2 bias drive or 1/3 bias drive. 3. SC: Segments on/off control data This control data bit controls the on/off state of the segments. However, note that when the segments are turned off by setting SC to 1, the segments are turned off by outputting segment off waveforms from the segment output pins. 4. BU: Normal mode/power-saving mode control data This control data bit selects either normal mode or power-saving mode. No. 6792-7/14 LC75814V Control data Output pin states P0 P1 P2 S1/P1 S2/P2 S3/P3 S4/P4 0 0 0 S1 S2 S3 S4 0 0 1 P1 S2 S3 S4 0 1 0 P1 P2 S3 S4 0 1 1 P1 P2 P3 S4 1 0 0 P1 P2 P3 P4 Output pin Corresponding display data S1/P1 D1 S2/P2 D5 S3/P3 D9 S4/P4 D13 DR Drive type 0 1/3 bias drive 1 1/2 bias drive SC Display state 0 On

1 Off

0 Normal mode

Power saving mode (The OSC pin oscillator is stopped, and the common and segment output pins go to the VSS level. However, the 1 S1/P1 to S4/P4 output pins that are set to be general-purpose output ports by the control data P0 to P2 can be used as general- purpose output ports.)

No. 6792-8/14 LC75814V Display Data to Segment Output Pin Correspondence Note: This applies to the case where the S1/P1 to S4/P4 output pins are set to be segment output ports. For example, the table below lists the segment output states for the S11 output pin. Segment COM1 COM2 COM3 COM4output pin S1/P1 D1 D2 D3 D4 S2/P2 D5 D6 D7 D8 S3/P3 D9 D10 D11 D12 S4/P4 D13 D14 D15 D16 S5 D17 D18 D19 D20 S6 D21 D22 D23 D24 S7 D25 D26 D27 D28 S8 D29 D30 D31 D32 S9 D33 D34 D35 D36 S10 D37 D38 D39 D40 S11 D41 D42 D43 D44 S12 D45 D46 D47 D48 S13 D49 D50 D51 D52 S14 D53 D54 D55 D56 S15 D57 D58 D59 D60 S16 D61 D62 D63 D64 Display data Segment output pin (S11) state D41 D42 D43 D44 0 0 0 0 The LCD segments corresponding to COM1 to COM4 are off. 0 0 0 1 The LCD segment corresponding to COM4 is on. 0 0 1 0 The LCD segment corresponding to COM3 is on. 0 0 1 1 The LCD segments corresponding to COM3 and COM4 are on. 0 1 0 0 The LCD segment corresponding to COM2 is on. 0 1 0 1 The LCD segments corresponding to COM2 and COM4 are on. 0 1 1 0 The LCD segments corresponding to COM2 and COM3 are on. 0 1 1 1 The LCD segments corresponding to COM2, COM3 and COM4 are on. 1 0 0 0 The LCD segment corresponding to COM1 is on. 1 0 0 1 The LCD segments corresponding to COM1 and COM4 are on. 1 0 1 0 The LCD segments corresponding to COM1 and COM3 are on. 1 0 1 1 The LCD segments corresponding to COM1, COM3 and COM4 are on. 1 1 0 0 The LCD segments corresponding to COM1 and COM2 are on. 1 1 0 1 The LCD segments corresponding to COM1, COM2 and COM4 are on. 1 1 1 0 The LCD segments corresponding to COM1 to COM3 are on. 1 1 1 1 The LCD segments corresponding to COM1 to COM4 are on.

No. 6792-9/14 LC75814V 1/4 Duty, 1/2 Bias Drive Technique 1/4 Duty, 1/2 Bias Waveforms ILC00276 512 fOSC [Hz] COM1 VLCD COM2 COM3 COM4 LCD driver output when all LCD segments corresponding to COM1, COM2, COM3, and COM4 are turned off. LCD driver output when only LCD segments corresponding to COM1 are on. LCD driver output when only LCD segments corresponding to COM2 are on. LCD driver output when LCD segments corresponding to COM1 and COM2 are on. LCD driver output when LCD segments corresponding to COM1 and COM3 are on. LCD driver output when LCD segments corresponding to COM2 and COM3 are on. LCD driver output when LCD segments corresponding to COM1, COM2, and COM3 are on. LCD driver output when LCD segments corresponding to COM2 and COM4 are on. LCD driver output when all LCD segments corresponding to COM1, COM2, COM3, and COM4 are on. LCD driver output when only LCD segments corresponding to COM4 are on. LCD driver output when only LCD segments corresponding to COM3 are on. VLCD 1, VLCD 2 VLCD VLCD 1, VLCD 2 VLCD VLCD 1, VLCD 2 VLCD VLCD 1, VLCD 2 VLCD VLCD 1, VLCD 2 VLCD VLCD 1, VLCD 2 VLCD VLCD 1, VLCD 2 VLCD VLCD 1, VLCD 2 VLCD VLCD 1, VLCD 2 VLCD VLCD 1, VLCD 2 VLCD VLCD 1, VLCD 2 VLCD VLCD 1, VLCD 2 VLCD VLCD 1, VLCD 2 VLCD VLCD 1, VLCD 2 VLCD VLCD 1, VLCD 2

No. 6792-10/14 LC75814V 1/4 Duty, 1/3 Bias Drive Technique 1/4 Duty, 1/3 Bias Waveforms ILC00277 512 fOSC [Hz] COM1 COM2 COM3 COM4 VLCD VLCD 2 VLCD 1 VLCD VLCD 2 VLCD 1 VLCD VLCD 2 VLCD 1 VLCD VLCD 2 VLCD 1 VLCD VLCD 2 VLCD 1 VLCD VLCD 2 VLCD 1 VLCD VLCD 2 VLCD 1 VLCD VLCD 2 VLCD 1 VLCD VLCD 2 VLCD 1 VLCD VLCD 2 VLCD 1 VLCD VLCD 2 VLCD 1 VLCD VLCD 2 VLCD 1 VLCD VLCD 2 VLCD 1 VLCD VLCD 2 VLCD 1 VLCD VLCD 2 VLCD 1 LCD driver output when all LCD segments corresponding to COM1, COM2, COM3, and COM4 are turned off. LCD driver output when only LCD segments corresponding to COM1 are on. LCD driver output when only LCD segments corresponding to COM2 are on. LCD driver output when LCD segments corresponding to COM1 and COM2 are on. LCD driver output when LCD segments corresponding to COM1 and COM3 are on. LCD driver output when LCD segments corresponding to COM2 and COM3 are on. LCD driver output when LCD segments corresponding to COM1, COM2, and COM3 are on. LCD driver output when LCD segments corresponding to COM2 and COM4 are on. LCD driver output when all LCD segments corresponding to COM1, COM2, COM3, and COM4 are on. LCD driver output when only LCD segments corresponding to COM4 are on. LCD driver output when only LCD segments corresponding to COM3 are on.

No. 6792-11/14 LC75814V The INH pin and Display Control Since the IC internal data (the display data D1 to D64 and the control data) is undefined when power is first applied, applications should set the INH pin low at the same time as power is applied to turn off the display (This sets the S1/P1 to S4/P4, S5 to S16, and COM1 to COM4 to the V SS level.) and during this period send serial data from the controller. The controller should then set the INH pin high after the data transfer has completed. This procedure prevents meaningless displays at power on. (See Figure 3.) Notes on the Power On/Off Sequences

• At power on: Logic block power supply (VDD ) on fi LCD driver block power supply (VLCD ) on
• At power off: LCD driver block power supply (VLCD ) off fi Logic block power supply (VDD ) off However, if the logic and LCD driver block use a shared power supply, then the power supplies can be turned on and off at the same time. Figure 3 Notes on Controller Transfer of Display Data Since the LC75814V accept display data (D1 to D64) divided into two separate transfer operations, we recommend that applications transfer all of the display data within a period of less than 30 ms to prevent observable degradation of display quality. ILC 00278 IN H C E VD D VLC D U ndefinedD efined D isplay and control data transfer U ndefined U ndefinedD efinedU ndefined tc VIL VIL N ote: t1 ‡ 0 t2 > 0 t3 ‡ 0 (t2 > t3) tc ... 10 µs m in D 1 to D 32 P0 to P2 D R , SC, BU Internal data Internal data (D 33 to D 64)

No. 6792-12/14 LC75814V Sample Application Circuit 1 1/2 Bias (for use with normal panels) Note: *2 When a capacitor except the recommended external capacitance (COSC = 680 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200pF. Sample Application Circuit 2 1/2 Bias (for use with large panels) Note: *2 When a capacitor except the recommended external capacitance (COSC = 680 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200pF. ILC 00279 (P1) (P3) (P2) (P4) C ‡ 0.047 µF +3V +5V From the m icrocontroller C G eneral-purpose output ports U sed for functions such as backlight control C O M 1 C O M 3 C O M 2 C O M 4 P2 / S2 P4 / S4 P1 / S1 P3 / S3 S14 S15 S16 O SC VD D VSS VLC D VLC D 1 VLC D 2 IN H C E C L D I LC D panel (up to 64 segm ents) ILC 00280 (P1) (P3) (P2) (P4) 10 kΩ ‡ R ‡ 1 kΩ C ‡ 0.047 µF +3V +5V C R R C O M 1 C O M 3 C O M 2 C O M 4 P2 / S2 P4 / S4 P1 / S1 P3 / S3 S14 S15 S16 O SC VD D VSS VLC D VLC D 1 VLC D 2 IN H C E C L D I From the m icrocontroller G eneral-purpose output ports U sed for functions such as backlight controlLC D panel (up to 64 segm ents)

No. 6792-13/14 LC75814V Sample Application Circuit 3 1/3 Bias (for use with normal panels) Note: *2 When a capacitor except the recommended external capacitance (COSC = 680 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200pF. Sample Application Circuit 4 1/3 Bias (for use with large panels) Note: *2 When a capacitor except the recommended external capacitance (COSC = 680 pF) is connected the OSC pin, we recommend that applications connect the OSC pin with a capacitor in the range 220 to 2200pF. ILC 00281 (P1) (P3) (P2) (P4) C ‡ 0.047µF +3V +5V CC C O M 1 C O M 3 C O M 2 C O M 4 P2 / S2 P4 / S4 P1 / S1 P3 / S3 S14 S15 S16 O SC VD D VSS VLC D VLC D 1 VLC D 2 IN H C E C L D I From the m icrocontroller G eneral-purpose output ports U sed for functions such as backlight controlLC D panel (up to 64 segm ents) ILC 00282 (P1) (P3) (P2) (P4) 10 kΩ ‡ R ‡ 1 kΩ C ‡ 0.047 µF +3V +5V C C R R R C O M 1 C O M 3 C O M 2 C O M 4 P2 / S2 P4 / S4 P1 / S1 P3 / S3 S14 S15 S16 O SC VD D VSS VLC D VLC D 1 VLC D 2 IN H C E C L D I From the m icrocontroller G eneral-purpose output ports U sed for functions such as backlight controlLC D panel (up to 64 segm ents)

PS No. 6792-14/14 LC75814V This catalog provides information as of July, 2001. Specifications and information herein are subject to change without notice. Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics,and functions of the described products in the independent state,and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer’s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer’s products or equipment. SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO products (including technical data, services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the “Delivery Specification” for the SANYO product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.