LC7040N SANYO | Alldatasheet
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No.4306A LC7040N SANYO ID LOGIC g Interface with PLL Overview The LC7040N is the central IC to the ID LOGIC * Return to preset location (1 of 8) Module and Electronic Tuning Radio. ¢ Display main (largest) city in grid (5) DX status and search control It performs the interface between the receiver's * Set LCL ON (Local = 1 grid search) main microprocessor and ID LOGIC’s 256 kB * Set DX ON (DX = 9 grid search) database ROM and its 2 kB update RAM. The —_(6) Format scanning LC7040N also contains the Phase-Locked Loop + Format search up (1 of 7 general format keys) (PLL) circuitry responsible for electronic tuning in selected LOL/DX and it offers several I/O ports. an seve’ «Search up another format . . . Write to RAM last station format The LC7040N permits the easy integration of the : ‘ ID LOGIC Module in a receiver. It contains all the 7) a ad from aM last station format appropriate software to send and receive serial Ser fo 8 . instructions and data to and from the receiver's + Read user format in key (1 of 8 user keys) main microprocessor. An instruction is given + User format search up (1 of 8 user keys) simply by having the main microprocessor send a ° Search up another user format one byte-long function code followed, when . Initiate user set format necessary, by the appropriate data. Upon . Display user format up (1 of 32 formats) execution, the LC7040N returns its response * Display user format down . data, if any, to the microprocessor for display or * Set user format (1 of 32 formats in 1 of 8 user other processing. . keys) + Write to RAM last station user format Note ; “ Read from RAM last station user format It is necessary to enter into an “ID LOGIC (8) Prior multi-station Licensing Contract” with PRS. Corp. before « Set prior multi-station sample devices can be shipped. prior} . 7 «Reset prior multi-station Functions (9) Updates (tuning changes) * Update mode ON (1) ID LOGIC ON/OFF * Update mode cancel + IDLOGIC mode ON/status read * Update mode OFF (completed) * IDLOGIC mode OF F/status read * Change frequency « Read current (receiver) location * Change call sign ¢ Read cbroadcast station location ¢ Change format up/down (2) State/province set ¢ Enter new station * Set/read state up + Reset 1 updated station (cancel update) * Set/read state down « Reset all update stations memories (cancel all (3) City set (in current state) updates) + Set/read city up (10) Tuning (seek or manual) + Set/read city down + Tune 1 channel up (4) Travel «Tune 1 channel down . ¢ Read status upon tuning change (Can be : ; er id mnove north canceled midway by applying a LOW pulse el ei d move south signal (10ys or longer) to the INT pin) + Lgrid move west * Muitistation check * Set preset location (1 of 8) ule stat ¢ Read station status SANYO Electric Co.,Ltd. Semiconductor Business Headquarters TOKYO OFFICE Tokyo Bldg.,1-10,1 Chome, Ueno, Taito-ku, TOKYO, 10 JAPAN N3095HA/N1293JN No. 4306- 1/10
(11) Band change Package Dimensions + Switch to AM unit * Switch to FM 3159-QIP64E (12) /O port and RAM * OUT1 to OUTS High/Low control [Lc7040N] + IN1 to INS input/read na * Read ADC data 4.0, 6) (13) Preset memory 5 0. DLA Ch. ht * Write to preset memory with ID LOGIC mode | EMMMINIAARAAARR AL Fe ON S| = + Read from preset memory with ID LOGIC = = mode ON ‘ = ES * Write to preset memory with ID LOGIC mode a5 93 ES OFF = = * Read from preset memory with ID LOGIC mi __}F mode OFF _| 1B SUED UoRu UHL ¢ Load preset memories by order of memory | ous ff . a number (ID LOGIC mode OFF) (14) Initialization SANYO: QIP64E Set initial data : — IF or IF counter — FMchannel separation — FM low frequency — FM channel number ¢ Read hot/cold status * Load frequency ¢ Load AM and FM frequencies * Set initial location (grid+ largest city in grid) (15) Other * ROM copyright read — ist data * ROM copyright read — 2nd data * Manufacturer’s name read No. 4306—2/10
| ~ [ m | { BACK UP Low-thresho'd input ports, Built-in 100 KO (typ) pull-down resistance. Input H is prohibited when HOLD is LOW. } ~ | ro | : Main microcontroler serial communications request signal ACK Main microcontroller serial communications ack: nowledge signal a ' Main microcontrater serial communications data H output signal | 2» | ours H General-purpose output port bind eee | 0 | w | : RAM write enable signal BACK UP outz General-purpose output port
1 Back UP
16109 | 00 D7 i i ROM and RAM data input pins. Input is prohibited when HOLD is LOW. ‘ Aotpad ! c Processor interrupt input. Valid for LOW-lvel pulses of 10 js or longer. sosens | Interrupts are prohibited during backup mode ' — Main microcontroller serial communicatons clock signal. N-channel SCK i BACK UP open-drain, high-voltage port for use with a pull-up resistor. High impedance when HOLD goes LOW. 7 ours ‘ General-purpose output port. N-channel open-drain, high-voltage port for use H Aosaee | With a pul-up resistor. High impedance when HOLD goes LOW. | 32 1 49 | a17 wo A | ROM and RAM address signal outs push-pull : General-purpose output ports [| 2 | out Input is. prohibited {BACK uP [ o | « | 404842 | ROM and RAM control signals | | | [= [coe | pe | am i FM VCO input Capacitively couple for normal use. : 5 HoLo ‘AM VCO input. Capacitively couple for normal use. ‘ aoseia No, 4306—3/10
H Wr . H IF counter input. Capacitively couple for normal use. 0.4 to 12 MHz input H frequency. i a] HoLo ‘ Aoisia : AD converter input. 6-bit sequential approximation type with full scale (3FH 1 |ree data) of (63/96) x Voo. : s]P Hoo Aotsas po fm || an e ' LPF amplifier transistor connections. Aout AOUT i ‘ AD4916
2 F Standard frequency, programmable divider output, phase comparison error
7 IE output. With builtin charge pump. ' A0sas7 ree ap Serial communications speed select. High-speed mode when HIGH, and 7 low-speed mode when LOW, : Aosgot a D Backup-mode select, Backup mode is selected when LOW. High withstand 7 voltage when synchronized to the main power switch, ‘ Aoig04 XIN H : XIN i 45 MHz crystal oscillator connections. With built-in feedback resistor, Xour XOUT ' ' Aosgo2 Test pins. Leave open or tie to VSS for normal use, | = | wo | sui pr [_@ | ws | No. 4306—4/10
C4 4,.5MHz 30pF XIN voo xouT AMIN | - TEST’, 2 Note Figure 1 xois08 Pins INI to INS, OUT1 to OUTS, DO to D7, RQ, SI, SO, SCK, ACK and WE are all left open. Pin assignment evanwow sunenonoonaandanne a aa eee a a ae ae ae ae 48 47 46 45 44 43 4241 4039383736353433 AoC 49 327 A17 come [_|50 a1 0E comaC_]s1 30[ te Hocod | s2 as[—) tet apvI (_|53 2a jours HCTR[__|54 27[7 outs INFF [| 55 26[ TV IN4 voD 56 2a5[ Ine LC7040N FMIN 87 24{——]R0 AMIN 56 23, sr vss 59 ee ack €oC_ 60 21 jso AIN( 164 20[-—J outs aout [62 19 WE test1( 63 1e(— tee xout [64 17 [J outa 123 45 67 8 9 10111213141516 zu lz ovrarven ome mano Sel zzz2°600000588 sone ee Top view Be 404806 op viel No. 4306—5/10
—_—. Block Diagram < : Z z a 2 c 5 o bs a a 2 xo z= H c kot Tf l= 7 il @) ue 3 ® =o\\ck 3 2 a fey a x x |e |B a Ex ee Sle 3 ° a8 & & fa (2 S 2 —— g Fa ing x ono xt lo s » w#hzz o “ B25 25EE 2g SRE ® [5 a <5 jo 2 8 <«“fFz =z 7 = £ 8 HS z z rc 8 e ui ag g SulalzZ 1 S 5 aa}a/8 a < 5 ja in | a g 2 = 3 fo jw {3 Is Ea 8 Sis z | oe oO < es B £2. o % 2ke 8 == a we wi 5 s je feu jus z 983, BR g § a] 2 8 ERE g ass 258 38 2 § R ano a8 Zn 8 G aan zs * Bn o 2a 8 988 z § he a8 a x 258 £ as Note HOLD can be placed under microprocessor contro! to implement time control, immediately after device wake-up, and stable reception. No. 4306—6/10
INS to INS, HOLD, ADI, INT and INFF input voltage 03 to +13 iret vlage fr ator mp “03 b Von +08 OUTE, SOK and AOUT oupt vlan "3 8 Output voltage for all other outputs 0.3 10 Vop + 03 Allowable Operating Ranges at Ta = —40 to +85 °C, Vpp = 4.5 to 5.5 V ceva rung | es | = Toss Tv Supply voltage rpg NCH on Pom [fm f= fie fe | vollage rouge nto Pom | fmm [fe fe | voltage INt, IN2, RQ, St and INT LOW-level 02v, Vv input voltage va ee ee ° No. 4306—7/10
[oro apy we ne = Le Electrical Characteristics at Ta = —40 to + 85°C, Vpp = 4.5 to 5.5 V ee OTD, AO}, INFF, INT and IN3 to INS HiGHJovel input current Vin = 85 V HA FMIN, AMIN: and HCTR HIGH-evel . IN2, evel input are sine | om [wemesoy [= fs | - [om | [wnat eeame [ewe CP | |_| FOLD ADI, INFF, INT and IN2 to IN4 LOW-level input current ha Vw = Vss HA FMIN, AMIN and HCTR LOW-level . tam emo Tw fee | | ° | = | vA IN1, IN2, RQ and SI pull-down . ACK, SO, WE, TE2, OUT2, OUT3 and DO to D7 HIGH-levet output Vo = Yoo pA leakage current SCK and OUT4 HIGH-level output . AOUT HIGH-level output leakage . current Yo=13V HA ACK, SO, WE, CE2, OUT2, OUTS and DO to D7 LOW-level output Vo = Vss BA leakage current ACK, SO, WE, CE2, OUT2, OUT3 and DO to D7 HIGH-level output Vout lb =1 mA Voo - 20 | Vop - 1.0 | Vpo - 05 v voltage No. 4306—8/10
| | an pom Fe | Dow or HHe eps vg [vow [ester | veto f= | | £0 WicHiee ovpu veoge b= 804A [vow - | - Tov | XOUT Hii! ouput votage b= 20 uA [ve-wof = [ - [ov AO to At7, OE, CE, CET, OUTI and . _ OUTS HiGHIevel output voltage Vous fo = -1 mA Voo - 1.0 f- |: | v riage ONE Me ve be BHA Neo = 078 voltage ACK, SO, WE, CE2, OUT2 and . OUTS LOW-level output voltage Vou o = 50 pA 10 v AO to A17, OE, CE, CET, OUT! and . OUTS LOW-evel output voltage Vous lo = 01 ma v COMt and COM2 MiD-level output voage oo “see Yoo = $V los HA 2 [fs | |v | Vop = 45 10 55 V, 16 fin = 130 MHz Voo = 55 V, Ta = 25 °C, oscilator stopped HA Supply currant een em Voo = 25 V, Ta = 25 %, oscillator stopped pA (backup mode) No, 4306—9/10 :
If you have any questions about ID LOGIC, please contact the following: PRS Corp. (Tokyo) PRS Corp. (LA) . PRS Corp. on cfo Shinwa Bussan Kaisha, Lid. 9550 Alcott Street, #101 502, Kinwick Centre 6-11, Udagawa-cho Los Angeles, CA 90035 32, Hollywood Road Shibuya-ku, Tokyo 150 Phone: (1-213) 284-9047 Central, Hong Kong Phone: (03) 3464-1844 Fax: (1-213) 788-0315 Phone: (852) 543-7773 Fax: (03) 3476-4733 Fax: (852) 541-9843 s IDLOGIC IS A TRADEMARK OF ANO IS MANUFACTURED O UNDER LICENSE FROM PAS CORPORATION, N.Y. BH.K. LOGICS Arasutsreserveo. fm No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. im Anyone purchasing any products described or contained herein for an above-mentioned use shall ® Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: ® Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO,, LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. fm Information {including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of November, 1995. Specifications and information herein are subject to change without notice. No, 4306—10/10