LC62F0164A

LC62F0164A SANYO | Alldatasheet

Document overview

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Technical content

SANYO 16-Bit Single-Chip Microcontroller with On-Chip 64K-Word Flash EEPROM and 1K-Word RAM Preliminary Overview The LC62F01644 single chip microcontroller integrates 64K words (128K bytes) of Flash EEPROM for program and data storage, IK words (2K bytes) of internal RAM, 2 sets of timers (can be used as four timers), 2 channels of serial interfaces. The SANYO original high speed 16 bit CPU core (SNAIL) is used in the chip. The LC62F0164A operates on 100 nS cycle time and most of instructions are one-word/one -cycle. The special architecture of the SNAIL core realizes both high speed operation and efficient code side. The instruction set of the SNAIL is simplified by disposing the instructions that are not frequently used. Simplified instruction set realized small core size like 8 bit microcontrollers and high speed operation like high performance 16 bit or 32 bit RISC chip. The SNAIL CPU core comprises high speed multiplier. The multiplier executes 16* 1632 bits multiplication in two cycles. The LC62F0164A has 1M bit Flash EEPROM for program and data storage. The contents of the Flash EEPROM can be written by three ways : parallel programming using EPROM programmer, on board programming using serial data input and data re-writing by program control. Using the data rewrite function by program control, the LC62F0164A can eliminate the external Flash EEPROM which is used in varicty of applications. @ Any and all SANYO products described or contained herein do not have specifications that can handie applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. @ SANYO assumes no responsidility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein. SANYO Electric Co.,Ltd. Semiconductor Company Ver 1.6 N3000 RM (IM) TN-1/14 12898

Features

(1) High speed CPU core 100nS cycle time (When Flash EEPROM is used) Most instructions are one cycle/one word Simple and efficient instructions (2) Integrated high speed multiplier 16 « 16932 bit Two cycle pipelined (3) 1M bit Flash for program and data storage The program and data area can freely be defined On board rewrite function Data rewrite function by program control (4) IK word © 16 bits internal RAM (2K bytes) (5) Ports | ron | #otpins | inpuvowpa | Other functions [Style Flash conrot_| [po t6 Pingus extemal AD bus | With Pullup resister [| Ler [ie | tnpuvurpar | txtermal address bus | With Pull-up resister | Data —__—| ll = With Pull-up resister Input'Outpat Serial interface CMOSN-ch OD Counter input With Putl-up resister External bus control signals PWM output [1 | tpt READY signats | PES = AD converter (6) Timer - 2 sets (4 channels) ~ Timer : Can be used as timer or pulse counter 2 channels of 16 bit or one channel of 32 bit Mode 0: Two channels of 16 bit timers with programmable prescaler Mode 1: 16 bit timer with programmable prescaler + 16 bit pulse counter Mode 2: 32 bit timer with programmable prescaler Mode 3; 32 bit pulse counter ~ Timer! : Can be used as timer or PWM generator 2 channels of 8 bit or one channel of 16 bit Mode 0; Two channels of 8 bit timers Mode I: 8 bit timer + 8 bit PWM generator Mode 2; 16 bit timer Mode 3; Variable bit length PWM generator (9-16 bits) (7) Serial Interface Two channels of 8 bit serial interface circuits Bit order switch function (LSB first or MSB first) 8 bit baud rate gcnerator (8) AD converter Eight channels of 10 bit AD converter a SSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSFFFFFFsese a

(9) External bus interface (under development) 2 external windows on data address space - Programmable window address (512 address step) - Programmable window size (512 words step) Maximum of 32K words size each - Independent control mode selection on each window Two control mode : Multiplex or straight on each window Wait state control (selectable from 2, 3. 4 or 5 waits) External ready signal control Automatic chip select signal generation (10) Interrupts 11 sources / 3 vectors - 4 external interrupt INTO / INTI / INT2 / INT3 - 4 timer interrupts - 2 serial interface interrupts - | A/D converter Programmable vector selection Interrupt priority control function : Selectable from low/middle/high (11) SQFP-100 package aa

(FLASH ) > EEPROM) 0 g : a < IDX1 ) CONTROL 6 MULTIPLIER EXTBCO MEMORY CONTROLER [3] PORTO | a \\ A a n”n INTERNAL me RAM | ACC(AH) [af Porta | ==) seco Ge TIMEROL INTERRUPT | CONTROLER Lf imero | a [>| stoo pee SSeS

LESRERBEHALERSRBEBBEREERRER pace arS ee Feces eo oes PF RR EE i OHO A [ nf { 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 5352 51 | p76] 76 50 ["] PaF/READY entjn 49 [7 poe vob (| 78 48 Pao Aver C=] 79 47 [7 pacsate AVSS 80 46 P3B/WR P78/ANO Bt 45 P3A/RD- P79/ANI 82 44 P39/TS1 PTA/AN2 83 43 P38/TS0 p7e/ana (| e4 42( voo P7G/AN4 [| 85 41 oFe P7D/ANS [1] 86 40 Ft P7E/ANG (| 87 LC62F0164A 38 ["] vss P7F/ANT (| 88 a8 [par vss [=] 69 a7 J pss yoo [| 90 36 [7] ps /sck1 P00/AD00 [| 91 36 [1 Poa/sit/se o1/aD01 | 92 34] p33/so1 po2/AD02 (| 9a 33 pa2/sexo 03/AD03 [| 94 32 J P31/sio/sB0 04/AD04 [—] 95 a1) pa0/soo 05 /AD05 (—] 96 30 [7 Por /aDts 06/AD06 (—"] 97 297] PoE /aDt4 07/aD07 (| 98 28) popsapia vss 99 27 |) poc/api2 RST 100 26 vss 12.3 4 5 6 7 8 8 1011 12.13 14 15 16 17 18 19 20 21 22 29 24 TT 7 T SERSRZSRSSZSRSL22L TILL LER EE BER soos eos e8e5 e2<eoou8 siccaaaa aac aaa’ Package Dimension (unit : mm) 3181B i as j [oy 50 B ah a en) EI a a SANYO : SQFP-100 a Sia

1. Absolute Maximum Ratings at Ta=25°C, VSS1=VSS2=VSS3=VSS4=VSS5=VSS6=VSS7=AVSS=0V Supply voltage pe [eos fires || “03 r || V vpb3. vbb4—_ | vbp3=vpp4 AVDD =AVDD —_ ns v2 a . ae TEST 0-2 Ports 0.7, AVREH Input/output VIO Ports 1, 2.3 Lemme [OO fetes eT High [Peak | 1OPIT Ports 1, 2.3 *CMOS output “15 mA level output *For each pin. output [current current [Total [SIOAHG) [Pon 1 [the total ofall pins [30 TT output [SIOANQ)[Pon2 |The total ofall pins [30 curent TSIQAHG) [Pon 3 [Thetotal ofallpins. [30 [TT Low [Peak | JOPL Ports 1.2.3 For each pin 15 level output output [current ee | current Total [ SIOALG) [Pont [The total ofall pins. [30] output [SIOALQ) [Pon 2 [The total of all pins. [30 curent TSIOALG) [Pon 3 [thetotal ofall pins [30 Maximun power | Pdmax SQFP1O0 Ta=0 to #50°C 350 | mW [ism | Pore [eros Te temperature range seen TE temperature range SSS

1. Recommended Operating Range at Ta=0 to +50°C, VSS1=VSS2=VSS3=VSS4=VSS5=VSS6=VSS7=AVSS=0V i Operating 7) VDDI. VDD2. 98NSsICYCs 4.5 5.5 Vv EP eee err range AVDD Input high Vill *Ports 0, 1, 2.3.7 4.5-5.5 [075VDD VDD voltage RST Input low VILC) *Ports 0.1.2.3. 7 45-55 | VSS jo2svDD [vita [vestoan2 [as [vss TO fosvpp| cycle time frequency resonator oscillation range Refer to figure | resonator oscillation Refer to figure | stabilizing resonator oscillation time period Refer to figure 3 (Note 2) | TssXtal CFI CF2 20MHz crystal 45-55 5 s ape ee Refer to figure 3 (Note 1) The oscillation constant is shown in Tables 1. ooo,

1. Electrical Characteristics at Ta=0 to +50°C, VSS1=VSS2=VSS3=VSS4=VSS5=VSS6=VSS7=AVSS=0V eS ed Input high *Ports 1.2.3 *Output disable 45-55 T pA current +Pull-up resistor off *VIN=-VDD (including off state leak current of output Tr.) Port 0 *Pull-up resistor off | 4.5~ 5.5 ee nto TT CM a Input low Ports 1, 2.3 Output disable 4.5 -5.5 current *Pull-up resistor off +VIN=VSS (including off state leak current of output Tr.) la sVIN=VSS a a Ouparhigh [WORD [Pont [101 Toma [a3 DAS] CMOS output VOL Ports 12.3 TOL=10mA. 45-55 5 V Ports 0. 1.2.3 VIN=VSS 3.0 70 100 124 | kQ VHIS | «RST 45-55 0.1VDD Vv voltage sPorts 0. 1. 2.3.7 — : : capacitance connected to VSS. “= 1MHz *Ta=25°C EEL

1. Serial Input/Output Characteristics at Ta=0 to +50°C, VSS1=VSS2=VSS3=VSS4=VSS5=VSS6=VSS7=0V Cycle 1sCK(1) | SCKO(P32). | Refer to figure 5 45-55] 2 wyc

4 SCK1(P35)

S| Low level | SCKLC) S| pulse width «| En 5 $B] S] Nigh level | wscKni) 3 ulse width EY] Oele tSCK(2) SCK0(P32). | *When output is 45-55 2 wCYC 2\\2 SCK1(P33)_ | CMOS 2] Low level | tSCKI(2) +Refer to figure 5 12 (SCK Z| pulse width S| High level | tsCKH(2) 1/2 wulse width Datasct-up | tsDI SBO(P31). | *Data set-up to 45-55 | 0.03 bs B| time SBI(P34). SIOCLK & slo. *Refer to figure 5 BY] Data hold thDI sul 0.03 A| time ~| Output delay | tdD0 $00(P30). | *Data set-up to 45-55 W3CYC | time SO1(P33). | SIOCLK +0.05

2 SBO(P31), | +When output is

z sB1(P34) | CMOS 3 +Refer to figure 5 5. Pulse Input Conditions at Ta=0 to +50°C, VSS1=VSS2=VSS3=VSS4=VSS5=VSS6=VSS7=0V i High/low level | tPIH() | INTO(P70), «Interrupt acceptable | 4.5-5.5 | 2 tcYC pulse width | tPILC) Newp *Events to timer 0 (P72) can be INTHPI3) can be input. tPIL2) Resetaccepable [45-55] 2 TT | EEE oa

-—. SSS 6. AD Converter Characteristics at Ta=0 to +50°C, VSS1=VSS2=VSS3=VSS4=VSS5=VSS6=VSS7=0V [re ome [te eT aNOpTA [aS] Fea Esc Ea time =14 = JADTR] = tCYC aicyc= (wCYC= (ADTR=3) 98NS) 102NS) fie [VP SSeS input voltage | | Reference IRIF AVREF AVREF=VDD 45-55 75 150 300 | uA range ‘Analog input. | VAIN | ANO(P78) 45-55 | VSS vob | v Analog port [VAINSVDD [as-s5 [aa bvanevss sss | 7. Current Dissipation Characteristics at Ta=0 to +50°C, VSS1=VSS2=VSS3=VSS4=VSS5=VSS6=VSS7=0V ae Sel pele PE TT during basic =VDD2 Ceramic resonator operation =VDD3 oscillation, (Note 2) =VDD4 Crystal oscillation =AVDD (Note 2) The currents of output transistors and pull-up MOS transistors are ignored. - SSS soa

Figure 3. Oscillation stabilizing time

— EOS memo : ™ Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. m@ SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. ™ In the event that any or all SANYO products(including technical data,services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd.

1 Any and all information described or contained herein are subject to change without notice due to

product/technology improvement, etc. When designing equipment, refer to the “Delivery Specification* for the SANYO product that you intend to use. @ Information (including circuit diagrams and circuit parameters) herein is for example only ; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but No guarantees are made or implied regarding its use or any infringements of intellectual property rights. or other rights of third parties. This catalog provides information as of November, 2000. Specifications and information herein are subject to change without notice. SSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSFFFFFFFe Ps 14/14