LC5734 SANYO | Alldatasheet

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CMOS LS! No. 26424 LC5734, 5734H SANYO SINGLE-CHIP 4-BIT MICROCOMPUTER WITH a LCD DRIVERS FOR LOW-VOLTAGE, LOW-OWER USE General Description The LC5734/5734H are single-chip 4-bit microcomputers with LCD drivers. The features of the LC5734/5734H include low-voltage operation, low power dissipation, etc. The standby function, which can be used to stop/start the ceramic resonator oscillation, facilitates the tow power dissipation of the system. The LC5734/5734H are ideally suited for use in timepiece/timer function-provided infrared remote control transmitter applications. @ Hardware Features + RAM...., 128 x 4 bits Instruction execution time Number of input/output pins: 8 (8 x 8 key matrix configuration available) Number of dedicated output pins: 3 (carrier-only output pins: 2, alarm-only output pins: 1) + LCD drivers + Possible to use LCD drive output pins as output -only ports (mask option-selectable) Carrier frequency: 38kHz (455kHz ceramic resonator OSC, 1/3duty or 1/2duty selectable) + System clock automatic selection at the standby mode (2 OSC circuits) * On-chip segment PLA The LCD driver output can be used to support any LCD panel layout without software processing. + On-chip step-down circuit for LCD power supply + Shipping style: FLP-64 (or chip) Sofrware Features + Powerful instruction set: 91 instructions + Table read instruction (possible to set table in all ROM areas) + 14evel subroutine nesting + On-chip time-base 15-bit divider (delivers overflow signal every 32ms or 64ms/1U0ms/500ms when a 32.768kHz crystal OSC is used) + HALT function : time-base clock is changed to the system clock automatically.) SANYO Electric Co.,Ltd. Semiconductor Business Headquarters TOKYO OFFICE.Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN 5319TA/OOI7KI, TS No. 2642-1/24

LC5734,5734H Application Development Support System + Evaluation chip (LC5797) is available for application development and the dedicated equipment is available as ‘the application development tools. + SDS-410 system Using the SDS-410, program development (editing, assembling) for microcomputer application circuit may be done. (IBM-PC or its equivalent also available) + EVA-510 + TB-5734 + DCB-1 + Application evaluation board + LC5797 (**Rev. 2.0 or greater) By connecting to the SDS-410, application development program correction and debugging may be done. + TB-5734 + DCB-1+ Application evaluation board + LC5797 By using the EPROM (2732) with application development program data written in, mounting evaluation may be done. Note) The application evaluation board is constructed by the user. LEDs or LCDs may be used for display. The EVA-510 is a modified version of the EVA-410 whose monitor ROM is replaced by the SCR-5734, * The IBM-PC is an IBM-made product. Note) Since the evaluation chip and the LC5734, 5734H differ in RAM capacity, be sure to check the RAM capacity when preparing or debugging programs. LC5734: 128 x 4 bits : LC5797; 256 x 4 bits Package Dimensions 3057-Q64AIC Package Dimensions 30268-O64BIC (unit: mm) (unit: mm) 19.6 eo uo 0 0.8 i 10 0.8 52 [ia |e tN, | = — 2th — i Li i a 0 e || =o TT: =| lS ome CUO COTO ODED SANYO: QIP64A "335 SANYO: QIP64B "33g When mounting the QIP package on the board, do not dip it in solder. Note) When developing programs, take care of the DPH value. The usable DPH values are 0 to 7. We will be free from any blame even if you use DPH=8 to Fy to develop programs. No, 2642-2/24

C5734, 5734H Equivalent Circuit Block Diagram C-PORTI ALM] C-PORT2 OUTPUT INPUT om sc CFOSCI it iv ose KT) Divi ose ckT 0S¢ OUTe a Téa. Pre ‘cUPZ° i CONTROL ROM Siver —— oKT [> by (20sex) Tr | . stack é (iLevel) RES Pad Assignment of LSI Chip Chip size: §.48mm x 3.70mm Chip thickness: 480um Pad size: 120um x 120um SEGI2 SEGIT P00 TEST oO o0ggnogoao0ooao0n0odn aA aocea | Oseei3 3 & S$eeses 38 5 2 BB 8 oscorD Clcom; % C0 8B BO Bee osctnO Oaum res O c-PorT2 si0 O c-Porti 0 . O Vssz cur20 O vss cui Cpak 32hz 0 DVoo BO os dHzIN C1 as3 orosez0 Mio crose1 mo © Pr e©nenreznpagse)es - POO rr =P Sb ee Sg 8 $8 MmMOOO0O0O00d0UdUvUNnoUOmUOOoOoOnoaanaaanaaoOaOoD PIS P12 . Note) SEG14 to 27 can be used for output ports. (mask option-selectable) No. 2642-3/24

LC5734, 5734H Pad Name and Coordinates QIP64 Pin Assignment QIP64 Pin Assignment Pad Wo] PinNane [ XG) [| Vom) | [PadNo| Pin Name _[ x Cum) 26 1 VoD —300 2590 57] 34 CUPI 45 — 2590 27; 2 S4 485 2590 68} 35 CUP2 255 — 2690 28 3 $3 110 2590 $9) 36 $2 460 2590 29 4 MI —1020 2590 60) 37 SI 685 2590 30 5 Me —1245 2590 61 38 RES 915 — 2590 31 6 M3 —1470 2690 62 39 OSCIN 1216 — 2590 32 7 M4 —1700 2590 63) 40 OSCOUT 1440 — 2590

8 TEST —1700 2355 64) 41 TEST 1700 — 2590

9 TEST —1700 2130 1 42 Poo 1700 2265

33| 10 SEG14 —1700 1860 2) 43 PO 1700 — 1995 34 "1 SEG15 —1700 1640 3 44 P02 4200 — 1680 35 12 SEGIE —1700 1420 4 45 P03 1700 —1390 36 13 SEGI7 1700 4200 5 46 COM2 1700 ~—960 37 14 SEGI8 —1700 980 6 4? SEGI 1700 —605 38 15 SEG19 —1700 760 7 48 SEG2 1700 —385 39 16 SEG20 —1700 540 8 43 SEG3 1700 —165 40 17 SEG21 —1700 320 g 50 SEGA 1700 55 4 18 SEG22 —1700 100 10} 51 SEGS 1700 275 42 19 SEG23 1700 —120 1 52 SEGB 1700 496 43 20 SEG24 —1700 340 12| 53 SEG? 1700 718 44] 21 SEG25 —1700 —$60 13) 64 SEG8 1700 936 45) 22 SEG26 —1700 —780 14) 56 SEGS 1700 1160 46 23 SEG27 —1700 —1000 15) 56 SEGIO 1700 1380 47 24 coM1 —1700 —1180 16) 57 SEGII 1700 1600 48) 25 P13 —1700 —1405 17) 58 SEGI2 1700 2590 49) 26 PI2 —1700 — 2590 1B) 59 SEGI3 1485 2590 50) 27 Pl 1470 — 2690 19) 60 COM3 1226 2690 31 28 P10 —1260 ~— 2590 20} 61 ALM1 1020 2590 62} 29 CFOSC! —1040 —2590 ra) 62 C-PORT2 810 2590 53 30 CFOSC2 —840 —2590 22) 63 C-PORTI 616 2590 54] 31 TEST 630 — 2590 23) 64 | Vss2 330 2590 55} 32 13 —405 — 2580 24) 65 Vss! 110 2590 56} 33 3ehe = 180 = 2590 2 | 66 BAK =106 2590 * The values (X, Y) indicate the coordinates of each pad center with the center of the chip as the origin. No. 2642-4/24

C5734, 5734H ee Sample Application Circuit TT cone os com2 PI3 Leo (gbias— 'sduy) a com3 PI2 Pu 27X 3=81 Segment Segment Pos outputs Poe Pol ° | cuPt M4 D-P-O-D-O-O-O-B key matrix 455 kHe Ceramic Resonator Voo cF-0sc2 OF-0sc1 C-PORTI i oso out 2-PORT2 {) Gq Cnsial S 32. 768kHz ey osc IN i” {) = T | Notes for developing an LC5730 series microcomputer-used system The low current dissipation is a distinctive feature of the LC5730 series microcomputers, However, it is not easy to determine the total current to be dissipated in an LC5730 series microcomputer-used system by actual measurement when you develop a sofrware, because much current flows in the peripherals of the evaluation tools. For a system which requires low current dissipation, check the current dissipation using an evaluation sample before mass-producing the system. " No. 2642-5/24

LC5734, 5734H + Pin Description 33 | OSCIN oa vO 1) Crystal OSC mode oscin A crystal is connected across OSCIN” OscouT and OSCOUT for oscillation. i an 2) RC OSC mode OSCOUT ‘option 1 R_ (external resistance) is connected Mock across OSCIN and OSCOUT and C ‘option? Bak (external capacitance) is connected across OSCIN and Vpp for oscillation.

37 SI Voo Input-only port

36 S2 LSI system is reset by applying Vpp to S1

3 $3 to S4 simultaneously. 2 S4 Mask ¥ option 4 Mt Von Input-only port. 5 M2 6 M3

7 Mé Mask

“ — option 38 RES Input Voo Input pin for resetting LSI system. BAK (—) power supply pin for logic unit inside _ the LSI. ALM1 ~ Output-only pin Output "| Yoo Used to deliver *4kHz, 2kHz, 1kHz modu- fation signal with the execution of an instruction. Also used to deliver non-modulation signal. Used to deliver melody signal of 3 octaves with the execution of an instruction. 63 | C-PORTI Voo Output-only pins 62 C-PORT2 Delivers carrier for remote contro! trans- mission. Possible to select 38kHz or 57kHz (carrier frequency) by mask option. 64 | vss2 For EXT version, (—) power supply is applied to Vgs2. 8 | Vssl Also used as LCD drive power supply. External parts are connected as shown below. Connection of external parts *4kHz, 2kHz, 1kHz: For 32.768kHz crystal OSC application, Proportional to OSC frequency. No, 2642-6/24

LC5734, 5734H 34 | CUPT ‘Pins for connecting voltage step-down

35 CuP2 capacitor

24 cOoM1 Output pins for LCD panel common plate 46 come Voo The following pin is used in each case. aa | cov I | Sate =] our [Ha] = COMI ° ° fe) Ves} come ~ ° fe) “ COM3_ - - ° F Agraaps | sane | sete | aah Ws? (Alternating frequency is for 32.768KHz crystal OSC application.) 10 a Output pins for LCD panel segments

5 Mask option permits SEG14 to SEG27

23 | Segment - (pad No. 10 to 23) to be used as output “ driver Ports, 59 - Vss2 33 32Hz Test Test pins (not used by user) 32 | T3 8. |resr

42 P-00 Input/ + 4-bit input/output port

43 | P-01 Output t + Mask option can be used to select C-MOS 44 | P-02 output or P-ch open drain output. 45 | P-03 Mesk erin T Mask option 28 | P10 Input/ + 4-bit input/output port 2 | Pl Output + Mask option can be used to select C-MOS. 2 | Pte Mask output or P-ch open drain output. % P13 oe y T sesk option 29 | CF-OSC1 Input + Input pin used to provide OSC and also used for internal clock generation. When no ceramic resonator is used, this cF-0s¢1 | an ” \\ input pin is set at “’L” level by mask option. Mask

30 CF-OSC2 Output | option i Output pin used to provide OSC,

Control signal. = BAK oF-0S02 Note) bis connected to Vss2. No. 2642-7/24

LC5734, 5734H ®EXT-V Version 1-1 (Xtal OSC + CF OSC) Absolute Maximum Ratings/Ta=2522°C, Vpp=0V Waximum Supply [Vegi ——SSSSSSSCSCSCS—S—~d OT Voltage [Vso [| 20 to 40.3 TV Maximum input Voltage Maximurn Output Voltage VouT2 | SEGOUT, COM1, COM2, COM3, CUP1, ALM1, Vss2-0.3 to 0.3 C-PORT1, C-PORT2, POO-03, P10-13 7 Topr =30 to +80 . -. 2, 7 Allowable Operating Conditions/Ta=—30 to +80°C, Vpp=0V (mine [me on] Input “H”-Level Voltage | Vint | $1-4, M1-4, P0O-03, P10-13 03X V aiid MA aaa Input “L”-Level Voltage | VIL 1-4, M1-4, POO-03, P10-13 Vssa2l 0.7X Vv ponesone var [earner a” | Input “H’-Level Voltage | ViH2 0.25 X Vv oeneree vine tL” | Input ‘’L”-Level Voltage | VjiL2 Vss2 0.75 X Vv i Nc Ai ce La Operating Frequency | fongt_[Crysalosct___——~—S~S~dtC = TB [gs | R| [fopg? | GrystalOsC2_] 60_| 68.536 | 70 _| ki | fCF CF OSC (Fig. 13},(Cycle time 16s | * | kHz | at CF=S00kHz) | F vet 0 - Electrical Characteristics/Ta=—30 to +80°C, Vpp=0V (min |p| max [Une] input Resistance RIN1A | Vss2=—2.9V, ViL=Vgs2+0.4V, kQ PMA | wiceinadneee | | | | ee Oe “L"-level pull-in Tr., “1, Fig. 4 RIN2A | Vgs2=—-2.9V, ViH=—0.4V, 2000 kQ Output “'H”-Level VoH1_ | Vss2=—2.9V, IoH=—0.4pA, *2 Vv Yop | pt | "| Output “L’-Level VoLi Vss2=-2.9V, loL=0.4pA, “2 Vss2 v ge | | Se Output “H"-Level VoH2 | Vss2=-2.9V, lon=—4pA, Vv ome | igteaacomt come cous | 8a] [a | * | Voltage loL=4yA, COM1, COM2, COM3 0,2 40.2 Output “L”-Level VoL2 | Vss2=-2.9V, loL=4pA Vss2 Vv ote Teicome cine || ta | Continued on next page. No, 2642.8/24

C5734, 5734H Continued from preceding page. [min [typ | max] unit | Output “H”-Level VoHs | Vss2=—2.4V, IoH=—250uA, ALM1 v [vate |S ae ee Output “L”-Level VoL3 | Vss2=—2.4V, IoL=250uA, ALM1 Voltage +0.65 [ Output Current (H) 1 [ToH1 | Vss2=—3.0V, VoH=-1.5V, C-PORTI | | =6 | ma | ill alec Ka C-PORT1 [Ounput Current (12 | lona | Vssa=-30V, Von=—18V,cponT2 | | -12 | -6 | ma | mame C-PORT2 [Output Current (H) 3 | tons [Vss2=~3.0V, Vo=-0.45v,*3 | [| as [va | [Output Current (L)3 [tora |Vss2--8.0V, Vou=Vss2v04,"3 | 45 | |_| A | | Gurput Current (HT 4 | long _|Vss7==3.0V, Von=—0.46v,"4_ | |__| 480 | uA | [Output Current (L14 [Tove | Vss2=—80V, Vo=Vss2r0.45v, "4 | 480 [|| HA Supply Current Ipp1 | Vss2=—3.0V, 32.768kHz Xtal OSC, pA TaS60°C, HALT mode, C1=C2=0.1pA, Cg=20pF, Cl $ 25k, CF stop, Fig. 5 Supply Current Vgs2=—3.0V, 65.536kHz Xtal OSC, 8.0 30 HA Ta $50°C, HALT mode, C1=C2=0. 1uF (Cd=20pF), Cg=10pF, CIS 25kQ, CF stop, Fig. 5 _ Supply Current Vss2=—3.0V, 455kHz CF OSC, 80 HALT mode, C1=C2=0.1)1F, CcFI=CcFO=150pF, Ri=IMQ, Xtal stop, Ta 50°C, Fig. 10 Cgr20pF, TaH25°C re 32.768kHz Xtal OSC (Ci $ 25kQ), Fig. 3 [| -20 |v | OSC Start Time 1 tstt Vgg2=—2.3V, Cd=Cg=20pF, Ta=25°C maa er 32.768kHz Xtal OSC (CI $ 25k), Fig. 3 Cg=10pE j-26 [jv 65.596kHz Xtal OSC (CIS26KM, Fig. 3[ | | 2.4 |v | OSC Start Time 2 tstt2 Vss2=—2.6V, Cg=10pF, (Cd=20pF), 10 a Ta=25°C_ 65.536kHz Xtal OSC (Cl £25k), Fig. 3 CcFI=CcFO=150PF, 455kHzCF Osc, | -20 | | |v _ | Tar25°C, Ri=1MQ, Fig. 11 [| 20 Tv OSC Start Time 3 tstt3 CcFi=CCFO=150pF, Vgs2=—2.0V, | Ta=25°C 455kHz CF OSC, Rf=1MQ, Fig, 11 No. 2642-9/24

LC5734, 5734H eee © EXT-V Version 1-2 (RC OSC + CF OSC) : Absolute Maximum Ratings/Ta=25+2°C, Vpp=0V Maximum Supply [vss] SSCS. OST VY Voltage [vss [SSCS 0TH VY Maximum Input OSCIN, 32Hz, CF-OSC1 Voltage $1-4, M1-4, TEST, RES, P00-03, P10-13 Maximum Ouipat C-PORT1, C-PORT2, P00-03, P10-13 | Nserosieos | V | [Operating Temperature [Tor [SCHOO | [Store Temperature [Ts [aE EY Allowable Operatin, =~! ° = pt 9 Conditions/Ta=—30 to +70°C, Vpp=0V Comin] we oan = ee Vss2 60 | | -20 |v | vss) | | M ae [for [er OSC (Fig 13) | 380] a5 500 | ae | No, 2642-10/24

LC5734, 5734H iO settoa/ Taste +80° 7 Etectrical Characteristics/Ta=—30 to +80 C, Vpp=0V we oa “Level hold tr., "1, Fig. 4 ive | eSminminrecge | | | |S | “Level pull-in Tr., "1, Fig. 4 RNs [cmougrgs | | | | “H"-level hold tr., "4, Fig. 6 [fing | Vss2=—2.9v, TEST, RES | 70 | 300 [2 | Output “H”-Level VoH1 | Vss2=—-2.9V, loH=—0.4pA, *2 Vv Voltage Output “L”-Level Vss2=—2.9V, IoL=0.4pA, *2 Vss2 Vv Output ““H’-Level VoH2 | Vss2=—-2.9V, loH=—4yA, 0.2 Ff] Voltage COM1, COM2, COM3 Output “’M”-Level Vom Vss2=—-2.9V, IOH=—4uA, Vgs2/2 Vss2/2 Vv Voltage loL=4uA, COM1, COM2, COM3 -0.2 40.2 Output “L”-Level VoL2_ | Vss2=—2.9V, loL=4yA Vss2 7 Output H-Level VOH3 | Vss2=—2.4V, |IoH=—250QHA, ALM v Voltage Output ““L”’-Level VoL3 | Vss2=—-2.4V, IOL=250uA, ALM1 Vss2 Vv [vate | 8 [Nesereiviocmnre | Tee [output Current A) | tons | Vesz=—30V, Vone—.6v, CPORTT |_| - | -6 [mA] Output Current (L) 1 lou Vss2=-3.0V, VOL=Vss210.9V, Vs52=-80V, Von==tsv, croRT? || 12 | -6 [ma | fonmrere [ee leone ree Tm CPORT2 | Output Current (H}3 | long | Vss2=—3.0V. Von=—o.45v,"3 [| a8 [ua | [Output Curent (L3 [tous | Vssa=-S0V, Voi-Vsse0ds,-a | | | Ha | [ Output Gurrent (H14 [ona | Vss=—3.0V, Vou=—045V,"4 || «dt a8 | WA [Output Current (L14 | Tong | Vss2"—3.0V, Vou=Vssat0.d5v,"4 | 450 [| wa | ‘Output Voltage (halver) | Vsgi | Vsg2=—2.9V, Rext=470kQ,Cext=30pF, Pf te C1=C2=0.1yF, Fig. 9 Supply Current 1 Vsg2=-3.0V, Rext=470kQ, Cext=30pF, pA C1=C2=0.1pF, CF stop, TaS50°C, Fig. 9 Supply Current 2 Ipp2 Vgs2=—3.0V, 455kHz CF OSC, C1=C2=0.1yF, CR OSC stop, | Ta$ 60°C, Fig. 10 455kHz CF OSC, [-20 | | Rf=1MQ, Fig. 11 OSC Start Time tstt 455kHz CF OSC, Vgg2=—2.0V CcFl=CcFO=150pF Rf=1MQ, Fig. 11 *2 LCD driver output pins of SEGOUT1 to 13 and SEGOUT 14 to 27 . *3 Output pins (used as output port) of SEGOUT 14 to 27 No, 2642-11/24

LC5734, 5734H © LC5734H Specifications 2-1 (Xtal OSC + CF OSC) : Absolute Maximum Ratings/Ta=2542°C, Vpp=0V ' [unit ] Maximum Supply [Vesr_]_—SSS—S—S—CSCSC—CC*dY' C!S | VY Maximum Input Voltage Maximum Output 32Hz, CUP2, OSCOUT, CF-OSC2 Vgs2-0.3 to 0.3 Voltage VouTz | SEGOUT, COM7, COm2, COM3, CUP1, ALM1, | Vss2-0.3t003 | V |Your? C-PORT1, C-PORT2, PO0-03, P10-13 LY | Allowable Operating Conditions/Ta=—30 to +80°C; Vpp=0V [Umino] Uni ] (a Ce [ssz SraaTenoarIB—yaae PPP] Input “H”-Level Voltage | Vjy1 | S1-4, M1-4, POO-03, P10-13 03x Vv ree eeoee tig Sereno ef |? eee ie eer Vss2 Input “L”-Level Voltage | VjL2 Vss2_ | 75x | Vv freee eee Sparating Freauenay 32 [32768 [33 [re | {CF CF OSC (Fig. 10), (Cycle time 4ys pe pp me | at CF=2000kHz} Electrical Characteristics/Ta=—30 to +80°C, Vpp=0V [min | typ | max [Unk ] “level hold tr., "1, Fig. 4 Vss2=-5.0V, 60 |= | kQ “L"level pull-in Tr., °1, Fig. 4 [Pine | Vss2=—5.0V, VIH=—0.4V, 400 “H"'-level hold tr., "4, Fig. 6 [Rina _[Vsso--5.0V, TEST, RES ae] Output “H”-Level VoH1 | Vss2=—5.0V, loH=—0.4pA, "2 7 Vote [Om [SR Savona | || Output “L’-Level VOoL1 Vgg2=—5.0V, IoL=0.4NA, *2 Vss2 Vv Verge poet [Mesesawowewar Tal Output “H”-Level VoH2 | Vss2=—5.0V, IOH=—4pA, Vv Output “M”-Level Vom Vsg2=-5.0V, IOH=—4yA, Vgs2/2 Vss2/2 | V Voltage i tou=4uA, COM1, COM2, COM3 $0.2 Output “L”-Level VoL2 | Vss2=—5.0V, Io. =4pA Vss2 Vv fate YO [SSircowmcoe || Saa] | Continued on next page. No, 2642-12/24

LC5734, 5734H Continued from preceding page. [min [ye [mao] [Output Level Vortase] Von —[Vas2=—S0V, lon=—2600A, ALMA | -oes || —+i|~'V_~+i +0.65 Output Current (L) 1 1oL1 Vgs2=-5.0V, VoL=Vss2+0.9V,, 7 ores ee om ree [output Gurent 12 | Towa | Vssa"—50V, Von=—28v,cPORT2 |_| -20/|~-10” | ma | [Output Current (L)2 [tora |Vss2=—5.0V.Vou=Vss2*00v.cponT| 4 | 8 | |_| ‘[Output Current (H13 | Tong [Vss2=—50V, Von=—0.75v,"3 | | S| = [Output Current (LIS | tous |Vss2=—50V, Voi=Vsszt0.75V,"3_| 78 | |_| ¥A | [Output Current (H) 4 | Towa [Vss2=—80V, Von=—0.75V, “4 ||| 780 HA [Output Curent (L) 4 | loa | Vss2==8.0V, VoL=Vss2v0.76V,"4 | 760; | + vA | Output Voltage (halver) | Vss1 Vss2=—5.0V, C1=C2=0.1uF, Vv perenne [Msi [ewmanrgs | ||| | Supply Current Vsg2=—5.0V, 32.768kHz, Xtal OSC, pA HALT mode, C1=C2=0.1pF, Cg=20pF, Cl $ 25k, CF stop, Ta$50°C, Fig. 5 Supply Current Vgg2=—5.0V, 65.536kHz Xtal OSC, HA HALT mode, C1=C2=0, 1A (Cd=20pF), Cg=10pF, C1 S 25k, CF stop, Ta 50°C, Fig. 5 Supply Current Vgg2=—5.0V, 485kHz CF OSC, pA HALT mode, C1=C2=0.1pF, CcF1=CCFO=150pF, Rf= IM, Ta£ 60°C, Fig. 1 Supply Current Vgg2=—5.0V, 2000kHz CF OSC, pA HALT mode, C1=C2=0.1uF, CcF1=CCFO=33pF, Xtal stop, Rf-1MQ, Ta 50°C, Fig. 10 Cg=20pF, 32.76BKHz Xtal OSC, | -23 [| | TV (C1S 25K), Fig. 3 ee OSC Start Time 7 ttt! | Vgga=—2.3V, Cg=20pF, $ OSC Start Voltage 2 Cg=10pF, 65.536kHz Xtal OSC [ -26 | [ OSC Hold Voltage 2 | VHOLD2| (Cd=20pFi, (C1 25k00, Fig, 3 re OSC Start Time 2 tstt2 | Vsga=—2.6V, Cg=10pF, (Cd=20pF) [Orsestin? [ [Sowxaose cszamrea | | | | RE=1MQ, wait time 1 sec, [-20 | fv Fig. 11 Rf=1MQ, 455kHz CF OSC, Fig. 11 No, 2642-13/24

LC5734, 5734H © LC5734H Specifications 2-2 (RC OSC + CF OSC) Absolute Maximum Ratings/Ta=2522°C, Vpp=0V [unr] Waximam Supply Voltage [vss [S00 403 [VY Maximum Input OSCIN, 32Hz, CF-OSC1 Vgg2-0.3 to 0.3 Voltage Vin2___| S1-4, M1-4, TEST, RES, P00-03, P10-13 Maximum Output Vouti | 32Hz, CUP2, OSCOUT, CF-OSC2 Vgs2-0.3 to 0.3 Voltage Vout2 | SEGOUT, COM1, COM2, COM3, CUPT, ALMT, | Vss2—0.3t00.3 | V C-PORT1, C-PORT2, PO0-03, P10-13 Tor fi HD a Allowable Operating Conditions/Ta=—30 to +80°C, Vpp=0V [in| typ | max [Unit | Supply Voltage 6.0 60 [5 [v4 Input “H”-Level Voltage $1-4, MT-4, P00-03, P10-13 03x [| Vv Vss2 Input ““L"-Level Voltage $1-4, M1-4, P00-03, P10-13 Vss2 I Pe Vss2 Vss2 renee ee v Operating Frequency RC OSC (Fig. 12) [| [32768 | | kt | {CF CF OSC (Fig. 13) (Cycle time 4us at f¢F=2000kHz) No. 2642-14/24

C5734, 5734H ‘Electrical Characteristics/Ta=—30 to +80°C, Vpp=0V [min | we | mx | | Input Resistance RiniA | Vgs2=—5.0V, Vit=Vss2+0.4V, kQ mA [madveneee | | | ne SSiemmnracege | | | “L"level pull-in Tr., *1, Fig. 4 Pm | Seiererge fe || “H”-level hold tr., "4, Fig. 6 | [Rina | Vesa=—50v,TEST,RES |) 10 —*Y SiO | Output “H”-Level VoH1 | Vss2=—5.0V, loH=—0.4pA, *2 v Voltage Output “L”-Level VoL1 | Vss2=—5.0V, IoL=0.4uA, *2 Vss2 Vv Voltage 40,2 LY | [Vane | [eee comscona | ||| Voltage COM1, CoM2, COM3 Output “M”-Level Vom | Vss2=—5.0V, IoH=—4uA, Vss2/2 Vss2/2 | V Voltage loL=4uA, COM1, COM2, COM3 ~0.2 +0.2 Output “L”-Level Vot2 | VSS2=—5.0V, 1oL=4yA. Vss2 Vv [vane |" [eowncowscve | |e | Output “H-Level VoH3 | Vss2=—5.0V, |OH=—250sA, ALM1 Vv Voltage Voltage +0.65 | Output Current 11 | ona | Vasa=—50V, Von=—25v.cronTI |__| -20 | ~10 [mA | veer [oe somrn oeeey TL C-PORTI | [ Output Current (2 | lon2 | Vsg2-—50V, Von=-25v, cPORT2 |__| 20 | 10 | mA | Over ceree e [escme ore CPORT2 | Output Current (H) 3 | 1oH3 | Vss2--5.0V, VoHn=-0.75v,"3_ | || 75 | wa | [output Current (L)3 [lous | Vss2=—50V, VoL-Vssv07sv,"3 [78 | |_| | [ Output Current (H)4 | Jona | Vss2=—6.0V, Von=—0.76v."4 [| Si 780 HA | Output Current (L) | Tova | Vss2=—6.0V, VoL=Vssa#0.76V,"4_| 760 | | ‘(| »A | Output Voltage (halver) | Vsgi_ | Vsg2=—5.0V, Rest=470k®, Cest=30pF, Vv C1=C2=0.1pF, Fig. 9 Supply Current Vss2=—5.0V, fac=32kHz, pA C1=C2=0,1uF, HALT mode, Ta$ 50°C, CF stop, Fig. 9 Supply Current Vss2=—5.0V, 455kHz CF OSC, pA C1=C2-0,1yF, RC OSC stop, CcFI=CCFO=150pF, Rf=1MQ, HALT mode, TaS 50°C, Fig 10 Supply Current Vss2=—5.0V, 2MHz CF OSC, pA RC OSC stop, CcFI=CCFO=33pF, Rf=1MQ, HALT mode, Ta 50°C, Fig. 10) 455kHz CF, wait time tsec, [-20 | | tv Ccri=CcrO=150pF, Rf=IMO2, Fig 1 | | | 20 |v OSC Start Time Vsg2=—4.5V, 455kHz CF OSC, lecrcccrontoenennsrns | || “1 S1,S2,S3, S4,M1, M2, M3, M4 *2 LCD driver output pins of SEGOUT1 to 13 and SEGOUT 14 to 27 . *3 Output pins (used as output port) of SEGOUT 14 to 27 No. 2642-15/24

LC5734, 5734H “LU” Jevel hold Tr. \\iiL"tevel hold Tr. Program applied Program applied ay ; Vss2 “Level oan 1. i L"-level pull-in Tr. Fig. 1 Input configuration of $1-4, M1-4 Fig.4 Input configuration of $1-4, M1-4 Og Ce 00M cuPI ve oscin O.1u cUPI oo oscin 0.1 pur 6 0.1 buT i=] cuP2 oscouT cup2 oscouT Vss2 Vss1 Vss1 vss2|-—4 Fig. 2 Current dissipation, output voltage Fig. 5 Current dissipation, output voltage test circuit. test circuit. ce Yoo OSCIN [a] o cup! DUT oscouT or CUP2 \\H"-level hold Tr. Vss2_ Vss1 rf oo Fig. 3 Oscillation start voltage, oscillation start time, Fig. 6 Input configuration of PO0-03, P10-13 frequency stability, oscillation hold voltage test circuit. Unit (capacitance: F) No. 2642-16/24

C5734, 5734H OsciN OSCoUT 150 ‘ Voo ith curt cFOs¢! ° but i or or CUP2 crosce| 150p Vss2 Vss1 Ce Ld Fig. 7 Crystal oscillator Fig. 11 Oscillation start voltage, orcillation start time, frequency stability, oscillation hold voltage test circuit. OscIN _ OSCOUT Rext = 0p Ole cup! oscin OMe Dut | § 470k cur2 oscouT Coxt Vss2 Vsst if oo Fig. 8 Current dissipation, output voltage Fig. 12 RC oscillation test circuit. CFOSCI CFOSC2 R 30p Yoo Ole jouP1 oscin O 0.1 put | 3 470% oF cup2 oscouT ssi Vss2 Core I in Yoo oo Fig. 9 Current dissipation, output voltage test circuit. Fig. 13 CF oscillation 150p Ola curt ¥° oFoso1

0.1 I} or

Fig. 10 Current dissipation, output voltage test circuit. Unit (resistance: , capacitance: F) No. 2642-17/24

LC5734, 5734H C5734 Instruction Map Instruction set: 91 instructions (Jes teeyele instruction — [__]~-~-» t-byte instruction [J 2cyele instruction = [__} +--+ 2-byte instruction SEE PPP EPEPEEPP EP Sr faslaaieisalerleetey es] MVL xX ee ee fe a a ona | [| on at sew mw | = | _ MOPL x c | MOPH X | o | sic xX le | MSP xX Cele lm ot oon No. 2642-18/24

C5734, 5734H Instruction Set of LC5734 Summary of LC5734 Instructions Symbol Meaning ac : Accumulator MDP) : Memory eddressedbyDP (),[ ] : Contents ACn : Accumulator bit (PC )) : Contents of port ( ) + : Transfer direction, result oP : Data pointer PC : Program counter A : AND EDP : Save data pointer STACK _: Stack register v :0R ‘sp : Strobe pointer [M(DP}] — : Contents of memory ¥ : Exclusive OR CF : Carry flag addressed by DP TREG : Temporary register STSn : Status register SCFn : Start condition flagn CSTF : Chrono start flag HEFn + Halt release enable flag n PDF : Pull-down flag Lisp) : LCD latch specified by SP_ PAGE : Page latch mM : Memory PGX : Current Page No. 2642-19/24

LC5734, 5734H ee [rae | 3 Stotus flag l>7 Dg D5 D4 D3 204 Do| |to be atfected| [ne [mmr ts peo oofilano | mornam g[sor [ener [ve tooo siififor-s [tecrmme ce £ Shift Right AC ooor1oo0ood ACn = ACn#t The AC contents are shifted right and 0 is load- 5 & MSB=0 AC3~0 ed to the MSB. B| asri | shite Right AC 00011001 ACh = AChH ‘The AC contents are shifted right and 1 is toad: ES & MSB*1 Acg=1 ed to the MSB. Ey asco | shirt tert ac oo0011010 ‘ACh = ACn=t The AC contents are shifted left and 0 it loaded 5 & LSB-0 ACo~O to the LSB. i Shift Left AC ooorrond ACn ~ ACn—-1 ‘The AC contents are shifted left and 1 is loaded é & LSB=1 Aco —1 to the LSB. 3 1.0.0 4 1 0 0 0/1] | MOP) AC —M(OPI+1] The memory MIOP) contents era incremented g (41) and are loaded to the MIDP} end AC. )g | DEC Decrement MiOP) {4 0011001 MIOP),AC ~ M(DP)-1| The memory M(DP} contents are decremented 3 (1) and are loaded to the MIDP) and AC. EB TAAT Read table data oooo0001 AC, TREG ~ ROM ‘The contents of the ROM on current page E— from program ROM (PGX, AC, M{DP}) addressed by the PC whose low-order 8 bits ara 5 replaced with the contents of the AC and 3 M(DP) are loaded to the AC and TREG. i F Store TREG to ooo1o0o01r.8 M(DP) ~ TREG ‘The TREG contents are stored to the M(DP). MDP) ADC Add MIDP} to AC 10000000 AC + (AC}+[M(DP}] | The AC, memory {M(DP)], CF contents ere CF with CF cr) binary-added and the result is loaded to the AC. Add miDP)toac |1 0 0 0 1 0 0 0/1\\1| Ac, MDP) ~ The AC, memory [MIDPH}, CF contentsore | CF with CF IACH#IM(OPH1 ACF) | binary-sdded and the result is loaded to the AC and MIDP). SBC Subtract MIDP) roooooo) 1 | AC = (Aci+[M(DPI ‘The memory M(DP) contents are binary: cr from AC with CF +cF) subtracted from the AC, CF contents and the result is loaded to the AC. ‘sBc* ‘Subtract MIDP} 100010011 AC, M{OP} ~ ‘The memory M{OP) contents ara binary- from AC with CF (Ac)+{MIDPT14CF) | subtracted from the AC, CF contents and the result is loaded to the AC and M(OP). Add MDP) to AC 10000010 + | AC ={AC}+{MI{DP}) | The AC, mamory [M(DP}] contents ore binery- ‘added and the result is loaded to the AC. Add M{OP) to AC 10001010 AC, MIDP) = ‘The AC, memory [M(DP)} contents ore binary- FJ (AC}+(M(DP)] added end the result is !oaded to tha AC and 3 M(OP). £ Subtroct MDP) 10000011 AC=AC+{MIDPI] | The memory MDP) contents are binery-sub- é from AC cal tracted from the AC contents and the result is 2 loaded to the AC. é ‘suB* ‘Subtract M(DP) rooo1r0ertd AC, MIDP) ~ ‘The memory M{DP) contents ere binary-sub- from AC (ACh+(M{DP)] +4 trected from the AC contents and the result is loaded to the AC end M{OP). Add MDP) to AC rooo0o0100 AC = (AC)+[M{DP)] | The AC, memory [M(DP}] contents are binery- added and the result is loaded to the AC. AddMioP}toac [1 0001100 AC, M{DP) ~ The AC, mamnory (wip corre are binary. A tacrermior | gnataioeys su *loncnd 2 AND MIDP} to AC 10000101 AC = {AC)A[M(DP)] | The AC contents and memory (M(DP}) contents! ‘are ANDed and the result is loaded to the AC. AND MDP) to AC 1ooo1r1o0?n AC, MIDP) = ‘The AC contents and memory [M{DP}] con- {ACIAIMIDP)] ‘tants are ANDed and the result is loaded to the AC and MDP). Exclusive OR yoooo0110 AC = (ACM(M(OP)} | The AC contents and memory {MIOPI} con- MIDP) to AC tonts are Exclusive-ORed and the result Is londed to the AC. ‘Exclusive OR 1ooo01T 110 AC, M(DP) — ‘The AC contents and memory (MIDP)] con- MIDP) to AC {ACHAMIDP)] tentes sreExclutive-ORed and the result is loaded to the AC and MiOP). Continued on next page. No, 2642-20/24

LC5734, 5734H Continued from preceding page. Instruction code | g| g é g Description Sraus feo lo7 06 0s 04 D3 D201 Do} to be affected ORMIOA)toAC [1 0 0.0.0 1 1 1/1 ]1 | AC~(ACIVIMIDP)] | The AC contents and memory (M(DP)] con tents ore ORed and the result is loaded to the ac. ORMioRitwac [1 0001111 AC, MIDP) — ‘The AC contents and memory [M{DP)] con- {ACIVIM(DPI) ‘ents are ORod and the result is loaded to the AC and M(OP). Add Immediate data |1 0 0 10000 AC = (AC}+X+(CF) | The AC, CF contents and Immediate data X cr woaccwithcr — |— — - — X3x2X1X0 ara binary-added and the result is loaded to the Ac. saci x | Subtract Immediate }1 0 0 1000 1 AC~(AC)HHXHCF) | Immediate date X is binary-subtracted from the! CF H dota from AC with CF|— — — — X3X2X1Xo| AC contents and the result is loaded to the AC,

2 Add Immadiate data }1 0 01001 0 AC ~(ACHX ‘The AC contents and Immediate data X era cr

2 toAC — — = ~ X3Xx2X1 Xo; binary-addod and the result is loaded to the AC, § Subtrect Immediate [1001001 1 AC = (ACHK+ Immediate date X is binary-subtracted from the 4 data from AC = = - — x3x2x1x0 AC contents and the result fs loaded to the AC. ©} AONI xX | Add Immediote deta |1 0 0 1 0 10 0 AC ~{ACHX ‘The AC contents ond Immediate date X are to AC = = = = XBX2K1 x0 binery-added and the result is 1oaded to the AC. AND Immedito §=[1 00101014 AC = (ACIAX ‘The AC contents and immediate data X ere data to AC = = — —X3X2X1X0 ‘ANDed and the result is loaded to the AC. EORIX | Exclusive OR roo1T0110 AC = (ACHHX ‘The AC contents and Immediate data X are Ex- Immediate data to AC|~- — — — X3X2X1X0 clusive-O Red and the result it loaded to the AC. OR immediste deta |1 0010111 AC = (ACIVX ‘The AC contents and Immediate data X ore to AC | — — — X3x2X1 Xo] ORod and the result is loaded to the AC. [sort | stowactoDrr [0 0.011 1.0 0|1|1|DPL—(Ac) _| The AC contents are londed to the DPL. [| Exchange OPL ooortiid (OPLI=(EDPL) ‘The DPL contents end EDP contents are ex- e with EOPL changed.

3 Exchange DPH (OPHIS(EDPH) ‘The OPH contents and EDPH contents ere

E with EOPH exchanged. {[om [cena [reer ver ofilifonciron [mworecmamenmes | | S[ oor. [oncrmen or, [t 0 0 1 1.01 4[141| DPL—~(DPL-1 __ | The DPL contents ore decremented —1. [| J [ior [sensors [ro 1140 o/s |r] orm -torue | teornconmseenewrennssi, |_| {oor [Deemer orn [100111 01|1[1] orm—iorw-t | Tmwormconnneeedermmnd—s. |_| 5 Loa actrom br fiat 11104 t[r[ac—l0r7 [The oPL conn asiontadvo eas. | | 3 eae poet “en i ae MOPLX |Moveimmedite [1 0 1 1 X9X2x1X0|1 |1 | DPL~X Immediate date X is loaded to the OPL. data to DPL Move Immediate |1 1 0 0 X3X2X1XO| Immediate dats X is loaded to the DPH. Date to OPH LHLT — | Load Halt Release AC ~ (STS2) The STS2 contents are tronsfarred to the AC Fieg STs2~0 and then the STS2is reset Load AC from sTs1 {10101100 AC = (STS1) The STS1 contents are transferred to the AC FA SCFO~0 end then the SCFO is reset. Blesr_ [owonosee fo ooo or 0 ofi|ifoste-o | rhe cote inves H[erlovewame foo ooo orf fera1 [twcrem Loe | & Fioset HEFO 00000110 ‘The HEFO is reset s0 that the halt mode re

3 Jease by an overflow from the predivider is

2 inhibited. E A Set HEFO 00000111 ‘The HEFO is set so thet an overtiow signal from io the predivider releases the halt mode, Continued on next page. No. 2642-21/24

C5734, 5734H ene Continued from preceding page.

8 Status flag

lo7 005 04030204 00|2| 8 to be affected ae [oe Lom [re or [ri] we un-t[resremmueccerenmed=t [| [use| voodactromse [1 0 1 01 0 1 0[1|1| AC=(sP) | The SPcontntsareloaded to the AC. | monncuw [re ret 1+ olt|r[a=nc [TwAcammsvinaatenese [| Move immediate [1 1 1 0 X3X2X1Xol Immediate date X is loaded to the SP. data to SP Load AC from 10101001 The memory [M(DP)] contents ore loaded to 5 [M(oP)) the AC. g Stors AC to 1| MiDP) = (Ac) The AC contents are loaded to the memory B (mort) MioP). § Move Immediate 0 0 1 0 X3X2X1 Xo immediate data X is loaded to the memory Fy date to MIDP) M(DP). §{ voix | Los ac with 0 0 1 4 X3X2Xx1 xX Immediate date X it loaded to the AC. Immediate dete HALT | HALT 00000000 ‘The operation of CPU ia stopped. “Ths foltowing condition causes the halt mode to be released. © The halt release condition specified by the SIC and SCS instruction amet. Roloate Enebie Flog “The HEFT 1s sot s0 thet the signal from the predivider re- | HEF 104 5 leeser the halt mode. 3 ‘The HEF2 is set 40 thet the rising of signal et Input port S E releases the halt mode, £ X21 |The HEFS is et vo that the rising of signal at input port M £ releases tho halt mode. 8 “The HEF is vet 20 thet the 1/10-s0cond pulse releases the Fs halt mode, [nor [Noomaion [rave rteahif TT Reset Back-up Ber -0 “The beckup mode is relessed. Mode Set Backup ‘When powered from Li bettery, VSS2 is Mode applied to the logic unit. When powered from Ag. Li battery, EXT-V, the OSC circuit is doubled in inverter size. Input Port-S to AC ~ [PtS!] “The input data et input port $ is loaded to the ac Ac. § Input Port-M to 10101000 “The input date at input port Mt loaded to the 3 AC i __ AC. 2 1141791010 Waveforms specified by X7 to XO are delivered 3 x7 Xe XBX4X9 X2X1 Xo) at the ALMt. H | x7—=xo[ x7 Xe [Xs x4 [x3 X21 x0 Hy Control | Alerm tone/ | Octave ‘Musical Seal é contents | melody | Control. —_| Control select signal Alarm OFF ot X3 to XO 1 Continued on next page. a No. 2642-22/24

LC5734, 5734H Continued from preceding page. Instruction code lo7 06 050403020100] |” to be affected

11441010 The ALM outputs are set £0 "L" level

Sot/Roset POF ~X ‘The pull-down MOS Tr et the corresponding PDF-Registor input port is turned ON/OFF. Bit contonts Operation Xor0 ‘S-Terminal Pull down Tr OFF xort ‘S-Terminal Pull down Tr ON x1"0 M-Terminal Pull down Tr OFF xa M-Termine! Pull down Tr ON Writeac&mior) |1 1111100 The AC, memory [M{DP)] contents are loaded to LCD Latch to the LCD latch LISP) directly addressed by LisP) (SP=#0 to C) the SP. SP=#D CTL3 +(Ac) Output AC contents to CTLS. 2 SP=He P(PO)<AC ‘The AC contents are loaded to the Port PO. i Seodie PIPI)<AC The AC contents loaded to thi Pt, g jrite AC to P(P10-13} ° ° nts sre fed to the Port Pt H 3 ‘SP=#D AC#(STS3) Load STS3 contents into AC. H Lond AC from STS3 _ eee ae wee ee ene eee ee eee eee 3 |SP=#E AC-{PIPO)] ‘Tho input data at Port PO Is loaded to the AC, ai input Port-PO to AC SPadte ACe{PIP)) ‘The Input date et Port P1 is loaded to the AC. Input Port-P1 to AC TWRT Read Table dete oo0000010 The data of ROM, on current page, addressed by the AC, M{DP) from Program ROM contents Is loaded to the LCD latch L(SP) addressed by the SP. ‘& Write Tabe date to LCD Latch (SP) Ce wen enn e ene oe eee nee SHO ed Outaut to CTL3 the ROM teble data at tho address in the frome Progtors Rom currant page erae specified by AC end [M(OP)}. & Write Tebo date qoeT3 et nee wen eee en ween ee ee eee eee Spade ad Output to port PO the ROM table data at the address in the from Program ROM current poge erea specified by AC end (MIDP)]. & Write Table date to P(POO to 03) _. a. _..__4 SPaitt ‘Output to port P1 the ROM table data at the address in the piedmont current page area specified by AC and [M(DP)] . & Write Teblo dete . to P(P10 to 13) TMEL Set Tabie data oooooo1it ‘The data of ROM, on current page, addressed by the AC, M(DP) to Alarm Sound contents is set to alarm sound date and weveforms specified by the dow table date ere delivered st ALM1. (Same as SAS Instruction) 0 0 0 © 1 XOX9Xs PC10-PCO—X 10—X0 | The data specified by X10 to XQ Is losded to <7 X6 XB X4 X39 X2X1 XO} ‘the PC to cause an unconditional jump. BABO X | Branch on AC 0 10 0 1 xWxOxa| PC10—-PCO-X10—X0 | If bit O of the AC Is "1", 8 Jump occurs. bit 0 High 7X6 XB X4 X3 X2X1 XO WEAComI1] It “0%, the PC in incremented +1. Branch on AC 010 1 1 XWX9xe! PC10-PCO~X10—XO | If bit 1 of the AC is", a jump occurs, bit 1 High X7 X6X5 X4 X3XIX1 XO. if ACt=[1] If "0", the PC is incremented +1. Branch on AC 0 140 1x0xeXxB PC10-PCO~X10-XO| If bit 2 of the AC is 1", 2 jump occurs. bit 2 High 7X6 XG X4 X3 X21 XO if ACa11} 1F“0", the PC is incremented +1. Branch on AC 0 1:1°1 1 XpX9Xe PC10—PCo~X10—XO | If bit 3 of the AC it "1", a jump occurs. z bit 3 High 7X6 X6 X4 XIX2X1XO if ACg=[1} 10", the PC is incremented +1. t Branch on AC 0 10 1 0 Xx9xs PC10-PCo+X10—X0 | If the AC Is not “0”, a jump occurs. § not Zero 7X6 X65 X4 X3X2X1 XO. if ACO 1€"0", the PC is incremented +1. a Branch on AC 0 1 0 0 0 xXDXxeXxB PC10-PCO—X19—X0 | If the AC fs "0", @ jump occurs, § zero 1X6 XB XA X3 X21 XO WACO If not “0”, the PC is incremented +1. Branch on CF 0 1:1 0 0 XMXexXB PC10-PCO+X10—X0 | If the CF is “0”, 8 jump occurs. not High 7X6 X5 X4 X39X2X1 XO ifCF-0 If "1", the PC Ie incremented +1. O01 1°14 0 X0Xx9xXa PC10—PCO~X10—X0 | If the CF Is "1", # Jump occurs, 7X6 X6 X4 XB X2X1 XO. if CF=1 If "0", the PC is incremented +1. 00010001 PAGE — (M(OP)] | The memory (MIOP!] contents are loaded to the PAGE latch, Continued on next page. No. 2642-23/24

LC5734, 5734H Continued from preceding page. Instruction code 5 - Status flog 3] Description to be affected D7 Dg Ds 4030201 00 P| dump tothaAddes {00010000 PC10-PC8—{PAGE) | An unconditions! jump occurs to 8 page q modified by PAGE PC7—PC4+(AC) specified by the PAGE and an ecidress tow. Fa ‘AC and MIDP} PCg—PCom{MIDP)] | order 8 bits of the PC which are loaded with HE the AC and memory MIDP) content. Jump Subroutine = [1 0 1 0 0 XXOXB STACK ~ PC+2 A wubroutine is called. bk7 X6 XBX4 X3X2X1 XO PC10-PCO-K10-X0 Return from ooovoort ‘A raturn from e wubcoutine oocury. | | Subroutine mec. |MovePco-pc3 [00010100 M(OP)—PC3-PCo | The contents of the loworder 4 bits of the PC to M(DP) ere stored in the memory M(DP), MovePca—Pc7 [00010101 M(DP)~PC7—PC4 —_| The contents of the medium-order 4 bits of the 2 ro M(DP) PC are stored in the mamory MIDP).

3 MovePCa—Pcio [000101140 M(OP)=PC10-PCB | The contents of the high-order 3 bits of the PC

H to MID} ara stored in the memory MDP). 's|csec tryrr108td ‘Tha high-order 6 bits of the predivider are reset | SCFO i ‘and the SCFO, SCF1, SCF4 are raset. ScFI scra No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. M Anyone purchasing any products described or contained herein for an above-mentioned use shall ® Accept full responsibility and indemnity and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: ® Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO, LTD,, its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. 4M Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guarant- eed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. No. 2642-24/24