LB8107M SANYO | Alldatasheet
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SANYO Py Portable CD Player Actuator Driver Overview Package Dimensions The LB8107M is a portable CD player mechanism unit: mm actuator driver. It operates on a 2.4 V power supply, 3448-QIP44MA which corresponds to two rechargeable Ni-Cd cells. [LB8107M} Functions and Features 13.2 + Four H bridge driver channels on chip, one each for the cman iad four CD actuators; focus coil, tracking coil, spindle Is amy NOUN Bss! mS rs motor and sled motor A * Built-in step-up circuit to power the associated 5.0 V as ==) CD LSls, including the DSP and microprocessor. = == (The drive transistor, L, Di and C are external ° | = = components: step-up circuit) Io 150 mA, maximum a4 ores = » Extremely low loss drive can be achieved, since the =_| — LB8107M detects the largest signal of the four drive ety AANA ANAND? channels and supplies that voltage to the H bridge driver = UODUGUOUUUL 25 blocks in each of the four channels using PWM voltage conversion. SANYO: QIP44MA, (The drive PNP transistor, L, Di and C are external components: step-down circuit) Pdmax - Ta * System start and stop can be performed at the 0.9) = microprocessor output. Zo Independent IC * Support for switching between step drive mode, which 5 has a high current reduction effect, and normal V Fa on control for the sled motor drive (The other three ¢ 0.6 channels all are V type drive only.) Jos! « Built-in battery check comparator 3 oa + Built-in integrating amplifier to handle the application 5 of digital seryo control to earlier spindle motors a 03 ~ (This function integrates the PWM output.) Bor + A defect function is provided. This function improves 4 oa} ~. _ the tracking ability by setting the voltage supplied to the ol _j H bridge drivers to the maximum in the presence of disk 20 ° 20 40 60 7580 oO defects during playback. Ambient temperature, Ta ~ °C Specifications Absolute Maximum Ratings at Ta = 25°C [Paramore Symbot [Condon Ratings Unit] [Maximumsvpphwehoge i Voom > [Hbridge ourputcurrent | tour Taking a00mAvchannel as the maximum. | 800m [Sep-upcreuitoutputeurent toy Pt [Atewabiepowerasspeion | Pamex | 00] [Gpeatng wnperaure stor | SSS so [Storage temperate tet [Ooo ses] SANYO Electric Co., Ltd. Semiconductor Business Headquarters TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN 82294TH (OT) A8-9896 No. 4851-1/10
Allowable Operating Ranges at Ta = 25°C [__ Parameter Symbot_ [Cottons min ye Tmax [Uni Supply vorage [Veo [eo eo [Operating ouput so 7 Electrical Characteristics at Ta = 25°C, Voc = 2.4 V Symbo[___Condions nn [op moe (Power Supply] Standby curont dah SSI SSH ee ee a [Oviesconteurent to ar oe [Step-up Circuit} Output voltage [Veo [re T0528 Tv NPN wansistor dive Gurent [io [ora] [teadeharactersies | avootep [at ema | aWepVeof 00 vi Minimum of duy Po Te [Oscillator Circuit} ‘Synchronization signal Fswn input frequency swyne [TH Bridge Outputs} BOA, TOP BOTTOM [eT [Motor Contro} Block] eater eos [on fe Transriswon gan) A OE Transmission gain ratio (¥-) | _Gyra_| Within the same channel es ee Input dead band voltage offset At the forward/reverse transition within a channel ee ee Maxinun oupuvetage [Vas Peer [PP wansivor ave curant [fe |r] (oad daar Ee HT Votage areca AouWveg) Drive Reference Voltage Vaert SLS on voltage | Veson [no SLL input bias current a SUH input bias current A a Defect votage Voeeon [Oe PO [S/S Pins 1 and 2) [Pron vote Tee P-olf voltage Po Teo PO] [Reference Voltage Pin] [Ovmmewent [wero Pe Ouwutvolage OE Vop1 (Battery Check Block] Blinput bias current A a 80 output volage | Voso [loso=se0wk os | Note: * This is a design guarantee and is not measured. Continued on next page. No, 4851-2/10
Continued from preceding page. [Pee Spo [tg ee [otKinputvotage vox TOCSY CdS] [Osctatorpowervotage [Voce [SC«*dMeg =n —SC*dSSCSC*‘dSSO~_+ Joscpininputbiescurent [soso [PC | [iputbieseuront aw [SCSC~C~dYSC‘“‘SCS?Y'YC‘#‘dC( (“SOOT mw [sno anptergan | ov | oponeip fe a [Second stage ampiiergain | Gve [Inomalcosedioon | CT | CC | Festage ob TS) Sacnd age up [ot [ta 8008 Saturation votage | voxe [imasme Note: * This is a design guarantee ands not measured Pin Assignment ” « . of e so 5 © » 4 zr Bb wo vx 0 zz 2 38 &£ 4S 3 5 @& 8 ¥ 8B A oe SF F @ @ aw F FS BG outa” [3a] [22] one oura* [a5] lea]ex ours” [36] [20] a0 cura? [za] we Feno[ae| [18] ono Feno [39] LBB107M [17] Fono -ono[aa fa] reno cure” [aa| [15] s/s2 auta* [aa] [s4] sss ours” [43] [+3] ura ours* [4a] {12]0sc Pow LJ Tel te] GT Ted Te] Ley Le] [ee] [ss] > o% F 8 8 © © HF © G oO AF 8 F 2 go & SF a 38 > oF ui ° aozaas Top view eee No. 4851-3/10
—S=]g Pin Functions . Unit (resistance: 2) CN ee re a ere Sets Vor to its maximum voltage on defect input. Vcc SO mA DEFECT 50K + fu Ke Aceazs ee ee ‘Step-up npn transistor drive output re 7 Aozaee ‘Starts the system when a low level is applied as the LB8107M start input (power on lock from the microprocessor) ‘S/S1 SOK A0e4e7 Provides a logical or function with the S/S1 input (for starting from a switch input) vec s/S2 50K ‘ acaaze Continued on next page. No. 4851-4/10
Continued from preceding page. Unit (resistance: @) 16, 17, 18, FGND | Ground for the power block Microprocessor start-up output linked to S/S2. pnp open collector output Voo4 (Spin) 3 “oon sozaee Battery low output, npn open collector output; Low: battery low Aozaao Battery voltage detection pin Voc 200 SOA aozaas Voltage reduction pnp transistor drive output Vcc Aopaae External clock input pin Vec ® OELITZ 24 | CLK @ 50k 80k BOk Aceasa ee [ofan | | edie ring votge sain Continued on next page. No, 4851-5/10
eeeeSeSeSeSeeeeeeeeeSSSSSSSSSSSSSSSSSSSSSSSsFeseseseseFeSSSeseeeeSe Continued from preceding page. Unit (resistance: 9) A a Sled switching Vee Qso#a SLS @ 60k 80k aozaae eC eC [afore Lo [pmmvoremcrses | a | OUTS (+) [ ° | Actuator control output (+): Spindle our (-) [0 | Actuator control output (-): Tracking [2 forse Lo [ravenna aiaortasing [We fom e [smc err Functional Description 1. Actuator drivers (focus, tracking, spindle and sled) Input pins z 2 Outputs (+) ; > A | | H bridge driver [fv 3 Guus colt VREFY input absolute Outputs (-) value ampiiier Aozaae Ver! is supplied from the CD DSP that is powered by the stepped-up voltage (5.0 V) created by the LB8107M. (Normally, Vpgp! will be 1/2 Vep2.) eee No, 4851-6/10
eo SSSSSSSSSSSSSSSFSFSMSSMMSSSsFsesee The figure below shows the form of the I/O transmission characteristics, Yo . . . Posit That is, the LB8107M implements a polarity reversing V-type drive ose Siope: with respect to the input signals (from the DSP) referenced to Vrerl. The transmission gain AVo/AVjy is 7.95 (typical) and the Dead band —H1+- LB8107M provides a region (dead band) around Vpgp! where the Le Vin output does not change with the input. (The dead band is Vpgfl + So vase) 100 mV (maximum).) The LB8107M provides excellent gain precision since the a feedback structure is adopted in the drive circuits. The Vo polarity for each circuit is: Negative | When OUT(+) > OUT(->): Positive When OUT(+) < OUT(-}: Negative 2. Sled motor step drive switching (selected when the SLS pin is low) While it goes without saying that the V-type drive described above can be used for sled motor drive, the LB8107M. also supports a step drive scheme to reduce sled motor drive power. Since a signal that is generated by integrating the tracking output is usually used as the sled motor contro! input, step drive attempts to drive the sled motor only during certain periods by providing a sled motor start command from the sled motor control input and a sled motor stop command from the tracking contro! input. Sled motor ~~ ——> Tm enn \\ ns ‘start model { ‘Tracking control (\\ \\ i input a | Sled controt f f\\ \\ input a \\ Sled motor ~~ --~--—f i} a eee stop model f\\ MM { f\\ —— Y Vrerl y i The start and stop levels are set by an external resistor connected between the Vpgrl pin and the REFO pin. Yo Note that for inputs that are lower than Vpgrl this system operates normally regardless of the SLS pin. Also, as will be discussed later, the maximum voltage is supplied to the H bridge in step drive mode. . VSL Vin “VSLL However, this only responds to the tracking signal. A02438 . a eeeSSSSSSSSSSSSSSSSSSSsSsSsSSSSSsSSSSeseseseseeee No, 4851-7/10
—_S 3. Step-up Circuit ‘The step-up circuit can be used to power not only the four driver channel control stages, but also external circuits. (Vpp is 5.0 V (typical) with an Io of 150 mA (maximum).) This step-up circuit operates from the built-in oscillator’s free-running mode immediately after the system is started. (The frequency is determined by the RC circuit connected to the OSCP* pin. When C is 400 pF and R is 30 kQ, the frequency will be about 80 kHz.) Note: * This pin is used for current pass prevention in standby mode. After the system is started, (to bring up the CD DSP and other circuits) when a clock with a frequency (e.g., 2fe = 88.2 kHz) greater than the free-running frequency is input to the CLK pin, the oscillator synchronizes with the input clock. —» frequency only synchronization. (Since the frequency range is from 80 to 100 kHz, 88.2 kHz is optimal as the input frequency.) Since the on/off duty ratio is set to have a maximum of 50%, i.e., the on period ranges from 0 to 50%, this provides a Protection function for the output transistors when large loads are applied. (We strongly recommend using output transistors with an hpg as large as possible. Also, for efficiency, we recommend using Schottky diodes.) 4, PWM Power Supply Scheme To improve power efficiency as much as possible in the LB8107M, maximum value output PWM voltage conversion is used in the power supply for each of the four H bridge driver channels. 5. The maximum value of the control block outputs (the outputs of the absolute value amplifiers with respect to their Absolute value inputs) for each of the drivers is detected, and a voltage consisting of that voltage ‘amplifier plus a margin (the offset) is supplied to the H bridge for each channel using PWM. output voltage conversion (step-down converter). (This allows the actuators to be driven with the minimum power in cases such as, for example, when the operating voltages for all four actuator channels are identical and small.) Unlike schemes in which a PWM converter is provided for each channel, only one L/C pair is required, and Vrerl Vin furthermore, since the actuator drive is linear, this scheme does not generate the aceass noise levels associated with direct PWM schemes. Also, since the voltage supplied to the H bridges by this PWM scheme is limited to 2.4 V (typical), there are no changes in the maximum currents supplied to the actuators associated with changes in the power supply voltage used. Furthermore, this scheme is designed so that the maximum voltage is supplied when the defect signal from the DSP, which indicates the presence of defects, is high or when in sled motor step drive mode. 6. System Start and Stop Commands The LB8107M is designed so that the system can be started and stopped by the control microprocessor. {Start} The pins S/S1 and S/S2 are provided as system startup pins. Of these, $/S1 locks the system power supply when it is set low by the microprocessor as a power on lock. S/S2 is provided to be used for startup from a switch and the function operates by taking the logical with $/S1. However, the microprocessor can still apply the S/S1 power on lock by reading the WP (wake up) pin output, since this output is goes high when S/S2 is low. [Stop] The system power supply can be shut down by setting both S/S1 and S/S2 high. This puts the LB8107M in standby mode. [Other notes] * Circuit blocks that use VCD1 as the power supply Integrating amplifier, inverting amplifier, sled switching circuit (including SLS, SLH and SLL) and the maximum value circuit * Circuit blocks that use VCC as the power supply Step-up circuit, step-down circuit, reference voltage, battery check, oscillator, edge start and other circuits. No. 4851-8/10
Unit (resistance: 9, capacitance: F) ‘Micro- processor ose T O.ie ci Poe son | ang | a re es | ase a [93] [se] [e+] fs] [es] fee) fe7) [ee] [es] [ee] [es] fe ots [24] [22] seo 1" so\\-+-{as] ous Ps| [2o} > Micro- sPin- — processor per | 10 [28}-— Micro- processor : LB8107M [29] te ote [+2] is Switch input TRAck to ia vie. processor > outs [+3] [23h ce rocus= § 12 solsfaal [+2} oS Le GT) 2) BI We [EJ Wee [4] 39K ASP } Yoo 100k Toe0e DY D2 oasesesss01+SBO7-03C LY LB eecesseeeees3O BH CH C2 vrerersereneet OO PF To control the spindle motor using a digital servo scheme, input the PWM output to pin 8, set up the external integration constant, and input the output from pin 9 to the spindle input. No. 4851-9/10
Internal Equivalent Circuit I ray tetctecncen Binnnneee a Os aP “9, socrincerneetsertseep Side hey Cs ETT) ical) || off g || | bere | Prt Pouce | fh | | | f ; as —— ' ~al ely | OCS mo fete |) ables Pies UP bse ; || Tuer | | AY, IL ean am <p" i D>tH> i wie ait a i vee-f> mm soho varies fe lt wpesongeanon | a j i i per | [> i pI a ee Wy sce Lacaor ” t at nopeat Reference values DY D2 oe... s-ssseeSBO7-03C C1 OB oeeererrsese 100 BF MI No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. WM Anyone purchasing any products described or contained herein for an above-mentioned use shall ® Accept full responsibility and indemnify and defend SANYO ELECTRIC CO, LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: ® Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO, LTD, its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. W Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guarant- eed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties, ee No, 4851-10/10