LB1851M SANYO | Alldatasheet

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Features

+ 120°C voltage linear type - Less power dissipation because of speed control based on motor voltage control (suitable for use in portable sets) + Torque ripple compensation circuit on chip + Small capacitance of external capacitor because of soft switching method (chip capacitor) + Thermal shutdown circuit on chip - FGamp on chip Absolute Maximum Ratings at Ta= 25°C unit Maximum Supply Voltage Vocl max qT v Maximum Supply Voltage2 Voc2 max 16 v Maximum Supply Voltage3 Vs max Voc2 v Output Supply Voltage Vo max Vst+2V Vv Output Current Ig max 15 A Allowable Power Dissipation Pd max 10 W Operating Temperature Topr —20to+75 °C Storage Temperature Tstg -55to+125 °C Allowable Operating Conditions at Ta = 25°C unit Supply Voltagel Vool 4.0 to 6.0 Vv Supply Voltage2 Voc2 4to14 v Supply Voltage3 Vs j up to Voc2 v Package Dimensions _3073A-M30IC (unit: mm) 0.25 S apAARAAAAaAAAD® iT . | i i j i “| 15.3 be 6 | eA é it .0 0-6 SANYO : MFP308 SANYO Electric Co.,Ltd. Semiconductor Business Headquarters TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN 9050TA(KOTO) No.3659-1/6

Electrical Characteristics at Ta=25°C,Vccl =5V,Vcc2=7V,Vg=3V min typ max unit Note Supply Current 1 I¢cl Vpr=5V 45 65 mA Supply Current 2 Igg2 Vpr=5V 15 20 mA Supply Current 3 Is Vpr=5V, Rp=© 6.5 9.0 mA Output Standby Current1 Igcog Vsray=0V 180 vA Output Standby Current2 —Isoq Vsrpy = 0V, Rp= 2 150) vA Output Saturation Voltage Vo(sat) Ioyr=1.0A, sink + source 23° =#V Output TRS Voltage Vo(sus) Iour=20mA 16 Vv x Output Standby Voltage Voq Ipp=5V 14°15 16 V Hall Amp Input VH offset -5 +5 mV x Offset Voltage Hall AmpCommon-Mode Vycom 14 28 = #V Input Voltage Range Hall Input-Output Gyyo ——-Rangle=8.2k0 31.5 34.5 37.5 dB Voltage Gain Brake Pin ‘H’-Level Voltage 2.0 v Brake Pin ‘L’-Level Voltage 08 V Brake Pin Input Current 100 pA Brake Pin Leakage Current, -30 yA FRC Pin ‘H’-Level Voltage 2.8 v FRC Pin ‘L’-Level Voltage 12 $V FRC Pin Input Current 100 vA FRC Pin Leakage Current -30 pA Upper Residual Voltage Vxu lour=100mA, Voo2=6V, 0.38 0.55 V Vs=2V Lower Residual Voltage Vxi Iour=100mA, Voc2=6V, 0.41 05 V Vs=2V Residual Voltage Inflection Point 2.0 v Overlap Amount Voc2=6V, Vgs=3V 60 70 80 % Standby ON Voltage -0.2 +01 v Standby OFF Voltage Open : Standby Off (Note 1) 2 5 OV Standby Pin Bias Current Pin GND 10 pA Operating Temperature of 150 180 210 °C x Thermal Shutdown Circuit Hysteresis of Thermal Shutdown Circuit 15 °C & (FG Amp] FG Amp Input VEG offset -8 +8 mV Offset Voltage Open Loop Voltage Gain Gyre f=1kHz 60 dB Source Side Output Vrgout Io=-2mA 3.7 v Saturation Voltage Sink Side Output Vrcop Io=2mA 13° =#=V Saturation Voltage Common-Mode CHR 80 dB x Signal Rejection FG Amp Common-Mode VrcG cH 0 3.5 #V Input Voltage Range Phase Margin 20 °C x Schmitt Amp Threshold Voltage Vrcint =2.5V, Vegour2 2.45 2.50 255 V atHtoL Schmitt Amp Hysteresis Vpgint =2.5V 20 40 60 mV Notel —: When standby pin is left open, standby operation is turned to off. Note 2 : Values shown are design targets only. No measurements have been taken. Overlap spec. are regarded as test spec. ee eeSSSSSSSSSsSSSSSSeSeSSSSsSSSeSSS : No.3659-2/6

LB1851M — Pin Assignment . FRAME GND [1_| FRAME GND FRAME GND [2_| FRAME GND Wour BJ Vout vs La] Uour Vec2 [5] Ry Vect [6] Vint ST.BY. Uin2 ance [8 | LB1851M Vint NC {2 } Vin2 Foin- [io | Wint FGin* [it | Win2 FGourl [19] BR FGour2 [18] FRC FRAME GND FRAME GND FRAME GND [16] FRAME GND (Top view) Block Diagram - Ys het] Un 0 5 > Ls ou £ £ [as [J 3 3 Cc] é — SS rT > o aa cf ° oR ANGLEo [BRA ] Lh R Reference 15R " Ro voltage . ce “I > > i ‘ST BY FRC FONTFGIn” = FGoutl = FGot2 meee No.3659-3/6

Sample Application Circuit BR FRC ai i ry bos Pe] 27 2 LI Le 751) rh LB1851M PALFAR ER ECIBESICSBVARC AES BIEN -aP EBLE i ol 100k 2 3 Ve ¥ , Ot (ae sty MF Vs Vee! Olu a it * Unit (resistance: 9, capacitance: F) Truth Table we Source Forward/Reverse Sink Control 1 | Wobaseovphase Ya | V phaseW phase [ad phase>U phase Hiluly L Uphase->W phase VphaseWohase |, | W phase V phase

7 WrtaseVokase |, Py P

a phase-U phase uilLia L Uphese=r¥ phase Input: “H” :Input 1 of each phase is at a potential which is higher by more than 0.2V relative to input 2. “L” : Input 1 of each phase is at a potential which is lower by more than 0.2V relative to input 2. Forward/reverse control : “H”: 2.8V to Vecl “LL”: OV to 1.2V Ea Pdmax - Ta

1 EET TTT ETT try

giuopt ti tt? Pye EET TPIT TTT Soft TTT NPT & LTT TP PNY TT Bo $f fs |

2 LETT yy |

a Soil 1 ttt TT rit] ett tT Prrr yi | Boz [i | PT Ty TT on a Pet Ty Ty PSSeeeeeeeee Ambicn€Teinpernture, Fe — °C No.3659-4/6

Power supply pin for fixing the output 4 Vs <Voc2 amplitude. Must be lower than Voc2 voltage. Power supply pin for power amp circuit other than motor driver transistor.

5 Voc2 4V to 14V Power supply pin for supplying voltage

to other than the control section whose supply voltage is Vocl. Power supply pin for supplying voltage Vecl 4V to 6V. to the hall amp, forward/reverse control, FG amp, thermal shutdown circuit. va — When this pin is grounded, all the L took circuitry stops operating. In this case, OV max the supply current is approximate] 7 | ST.BY | H;2.0Vmin , 100 ee h PPro) y (When Vocl =5V) 200 uA. In the normal operation mode, i this pin is left open or made to be at a potential of more than 2V. © The hall input-output gain (slope of veel Le motor waveform) can be changed by al CA changing the resistance connected ANGLE ° across this pin and GND. 200 E FG signal input pin . Veet oo ¢ db 8) put pi 10 | FGin- | min ov ha _, | max 3.5V 11 f FGin* when Voc =5V) as H Pot * aol ® aD a FG amp output pin Ey 12 | FGourl » ver FG schmitt amp output pin 13 | FGour2 Veet Pin for forward/reverse control of motor H:2.8V min Llevel : Forward FRC L:1.2V max 100k (Less than 1.2V ; When Vgg1=5V) (When Vogl =5V) H level : Reverse 100k (More than 2.8V : When Voc1 =5V) Unit (resistance: 2) No.3659-5/6

. LB1851M eee Continued from preceding page. | a Pin for stopping the motor L level : Motor drive H:2.0V min (Less than 0.8V) BR | 1: 0.8V max x H level : Motor stop | ox (More than 2.0V) 20 | wing W phase hallelementinput pin | a | win ¥ va Logie “H” : Winl > Win2 | min 1.4V 22 Vin2 max 2.8V Po 2m ® V phase hall element input pin (When Voc] =5V) Logic “H” : Vinl > Vin2

23 Vinl @ i @

i

24 Uin2 U phase hall element input pin

ic “H” : Uinl > Vin2 25 Uinl Logi Uint>U! i v8 Output pin

27 Uour Q

28 | Vour ®

3 Wout

12 GND for other than output

14,15| FRAME (GND) 16,17 . 29,30 Unit (resistance: 2) Wo products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. M Anyone purchasing any products described or contained herein for an above-mentioned use shall: ® Accept full responsibility and indemnify and defend SANYO ELECTRIC CO, LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: ® Not impose any responsibility for any fault or negligence which may be cited in any such claim or . litigation on SANYO ELECTRIC CO, LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally, @ Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guarant- eed for volume production. SANYO, believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of _ third parties, : No.3659-6/6