LB1410 SANYO | Alldatasheet

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No.952¢ -LB1410 f Monolithic Digital IC Lever MeTeR . AC level meters such as VU meters. i ! | . | : . DC level meters such as signal meters. : : | ‘Functions i ‘ \\ | : i 1. Display format ! | | | | : . Ten red or green LEDs display the input level in the shape of a bar. \\ ‘ 2. Input amplifier | | i ' Wide application is available owing to the built-in DC amplifier whose gain ' is variable with external resistors. : : 3. Comparator level : | Setting is made by steps of 3dB as follows. i ! : ~21dB, -184B, -15aB, -124B, -9dB, -6dB, -3dB, OdB, +3dB, +6dB. | i : | 4. Supply voltage ' | i } Wide recommended supply voltage range :5.5V to 16 V (If pin Vref2 lis used, | : TV to 16V). i? ' 5. Reference voltage ! i i i Constant voltage output is available with an external transistor owing to! pin Vref2=5V. \\ ‘Comparator Level/OUT pin voltage at Ta=25°C,Vcc=12V, Vref1=3V, Comparator level Pin No. min typ max unit i DL 7 0.06 0.13* 0.17 v i \\ p2 8 O.11 0.18* 0.25 v : : ; D3 9 0.20 0.27* 0.34 v : | D4 10 0.30 0.38* 0.46 v : ' DS 11 0.45 0.53* 0.61 v : : D6 12 0.66 0.75 0.84 v D7 13 0.97 1.06 1.15 v D8 14 1.40 1.50 1.60 v D9 16 2.02 2.12 2.22 v D10 17 2.90 3.00 3.10 v *:No overlap occurs in each individual IC. lz “Pin Assignment Reames tet a ero ‘ a0 ioe tt td “Be Fol | EN Lerero 500 < Ce TT TTT ven views a 0 | | |_| Voc Vretl Vint vy OUT GNO DI 02 03 2 | | Case Outline _3007A-D18IC a el ig: © F | | it 920 0 OB... Ca ao i ;

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Specifications and information herein are subject to change without notice.05 \\? 25 SANYO: DIP1S SANYO Electric Co.,Ltd. Semiconductor Overseas Marketing Div. 15-13, 6 chome, Sotokanda, Chiyoda-ku, TOKYO 101 JAPAN 8277K1/8225MW/9124KI/3052KI,TS No.952-1/3

Equivalent Circuit | | : “5 NC . | 14,13612,11610, 9 Vref 1 VCC Vret 2 010 Da { D2 o1 20 01 918 79 169 08 97 | | ae 029k) OgK | IN¢tO | 4 | i = || | our GND Internal resistance : R8(2.34kM), RI(1.65KN), R6C1.17K0), F5CBG0M), RAC5EEM), R3C41A), 1 , | f Absolute Maximum Ratings at Ta=25°C uit | Maximum Supply Voltage Vocmax = Pin 1 -0.3 to +18 vo} Input Voltage Vin Pin 3, 4 -0.3 to Voc vf D1 to DLO Output Voltage Vour(p) Dl toD10 OFF -O.3totl8. Vo. D1 to D10 Output Current ToL (Dp) Pins 7 to17,Dl to +300 «mA o D10 ON (Pin 15 NC) First Reference Flow-out Current Iye¢(1) Pin 2 -ltoO m |; Second Reference Flow-out Tref(2) Pin 18 -6toO mA ‘ Current Vout Supply Voltage VouT Pin 5 -0.3 to6 v Allowable Power Dissipation Pgmax Ta=55°C 500 mW Operating Temperature Topg -10 to +60 °c . Storage Temperature Tstg 40 to +125 °c i Allowable Operating Conditions at Ta=25°C unit | Supply voltage Voc Pinl, ( ): Using -5.5 to +16 v Vref2 (+7 to +16) v Input Voltage VintorVin7 Pin 3o0r4 -0.3 to Voc vo ¢ Output Pin Load Resistance Ru Between pin 5 OUT 15k to 20k ohm | and pin 6 GND. : Electrical Characteristics at Ta=25°C,Voc=12v min typ max unit Input Bias Current Tqnt(A) Pin3,Vrn+=0V,Vin-=3V, -2 0 vA (Amplifier) GND=0V : Tmn-(A) Pin4,Vint=3V,Vgy-=0V, — ~2 ° uA GND=OV Input Bias Current TInt+(C)+ Pin5,Vin+=0V,Vin-=3V, ~10 0 uA (Comparator) + Output To (A) OUT=OV , GND=0V : i Leak Current Offset Voltage (1) Voffset(1) Pin5,Vcc=6V,VINt+=Vin- —180 +180 mV =0V, GND=-6V , GAIN=20dB Offset Voltage (2) Voffset(2) PinS,VINt=VIN-=0V, i} +180 nv GND=0V, GAIN=20dB ' First Reference Voltage Vref (1) Pin2,Tye¢=0 to lma 2.6 3.0 iv Second Reference Voltage Vyef(2) Pinl8,Iref=5mA 4.2 4.7 5,2 iv Current Dissipation tec Pinl, VINt=3V,VIN-=0V 10 20 mA Amplifier Gain ve Open loop 30 i | B Continued on next page. No.952-2/3

Continued from preceding page. : : min typ m unit Output Flow-out Current Tou pin5 ,Vint=3V,VIN-=0V, : i -1d mA . Vour=0V | Pin'D Output ON Voltage Von (D) Pin7 to 17,D1 to D10, IoL= 1. 20mA, Vpnt=3V, VIN-=OV : (Pin 15 NC) ‘ Pin D Output Leak Current IoH(D) Pin7 to17,D1 to D10, 10 «UA Vin+=0V, VIN-=3V,Vp1 to i { p10=12V (Pin: 15..NC) ‘ | Output Voltage (Amplifier) Von Pin5,Voc=5.5V,VINt=3V, 4 y Vin-=O0V , RL=1Skohms | | PinS ,Vcc=12V,Vint=3V, 9.5 | v Vry-=0V, Ry=15kohms ; | | Application Circuits (with offset adjustment) { | . Circuit not using Vref2 : ! | Veco Adjusting procedure i : | | 1. Turn the center of 10kohm VR largely + to 4.7uF capacitor side. | 1000 at HEE R 2, Input AC signal of 50/ 20mV from jac IN. n OY SODOOOO® 3. Adjust lkohm VR so that the output at) 7 ion 9 OUT becomes 500mV DC. _ \\ 3 . Equation used in the calculation of R an Le14i0 to be inserted in series with LED. i AC INO H Gain : 204B | i i R(red) =(Vcc-2.5) /6 kohms » ot reen) =(Vec-2.8) /1 — = ta sour R(green) =(Vcc-2-8) /18 kohms ’ { t t . Circuit using Vref2 Adjusting procedure : } . R to be inserted in series with LED is‘ as follows irrespective of Vcc. ' rH i R R(red) =360ohms(App. 6mA) : TRAD, @@ OOSOOQLOO R(green)=1000hms (App. 18mA) — ' vec © A 7) LL, YY . TRL should be chosen with Pc considered. OUT og: a The following transistors are recommended. Red LED drive 2SD400 AC at 4.0 123456789 Green LED drive 2SD325 ; : co : [sik] '

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Information furnished by SANYO is be- i lieved to be accurate and reliable, However, i no responsibility is assumed by SANYO for : | its use; nor for any infringements of patents : 1 or other rights of third parties which may \\ | result from its use, and no license is granted by implication or otherwise under any . : patent or patent rights of SANYO. \\ i \\ | | | 5 EO No.952-3/3