KTS1601 KINETIC | Alldatasheet

Document overview

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  • PDF pages: 11

Technical content

Features

  • Operating Range: 1.5V~5.5V
  • Low RDS(ON) MOSFET: Typ. 24mΩ @ 3.3V
  • Continuous DC current up to 2.0A
  • Built-in slew rate controlled turn-on: 2.7ms
  • Low quiescent current < 1µA
  • ESD Protection  Human Body Model : 8kV  Charged Device Model : >2.0kV  Compliance to IEC61000-4-2 level 4 ■ Contact Discharge : 8kV ■ Air Discharge : 15kV
  • Pb-Free Packages:  WLCSP-4, 1.0 x 1.0mm  RoHS and Green Compliant
  • -40°C to +85°C Temperature Range

Applications

  • Mobile Phones & Tablets
  • SSD (Solid State Drive)
  • Portable Instruments
  • DSC, DVR, GPS Brief Description The KTS1601 is slew rate controlled load switch designed for 1.5 V to 5.5 V operation. It features a controlled soft -on slew rate of typical 2. 7ms that limits the inrush current for designs with heavy capacitive load s and thereby minimizing any resulting voltage droop at the power rails. The very low R DS(ON) allows currents up to 2.0A, whilst minimizing the power dissipation and voltage drop from supply to load. The KTS1601 features an active high enable pin, which is capable of interfacing directly with low input control signals, without any additional level shifting circuitry. The KTS1601 also includes an active pull -down option to ensure the device remains off, should the enable be allowed to float. The KTS1601 provides reverse blocking in the OFF state to ensure that power supplies are not discharged. The KTS1601 is available in an optimized, lead-free, fully green compliant, small 4-pin WLCSP 1.0 x 1.0mm package with 0.5mm pitch Typical Application CIN 1.0µF IN EN Enable Logic Control GND Gate Driver And Slew Rate Control Reverse Blocking Option OUT CIN 1.0µF Input Range 1.5V to 5.5V Output Enable Control 2.0A Slew Rate Controlled Load Switch with Reverse Blocking

April 2019 – Revision 04b Page 2 Company Confidential Pin Descriptions Pin # Name Function A1 OUT Power−switch output. Connect a 1.0uF ceramic capacitor from OUT to GND as close as possible to the IC is recommended. As an option, a pull-down transistor can be added to OUT A2 IN Power−switch input voltage. Connect a 1.0µF or greater ceramic capacitor from IN to GND as close as possible to the IC. B1 GND Ground connection B2 EN Enable input, logic high turns on power switch. WLCSP-4, 1.0 x 1.0 x 0.625 mm 4-Bump 1.0mm x 1.0mm x 0.6mm micro SMD Package (Top Mark) XX = Device Code YY = Date Code, Z = Assembly Code TOP VIEW TOP VIEW XX YYZB A OUT GND IN EN

April 2019 – Revision 04b Page 3 Company Confidential Absolute Maximum Ratings1 (TA = 25C unless otherwise noted) Symbol Description Value Units IN, OUT, EN Input voltage, Enable Input Voltage, Output Voltage to GND -0.3 to +6.0 V ISW Maximum Continuous Switch Current (IMAX)2 2.0 A ESD IEC ESD Withstand Voltage (IEC 61000−4−2)3 (IN and OUT when bypassed with 1.0µF capacitor minimum) Air: 8 Contact: 15 kV ESD HBM Human Body Model (HBM) ESD Rating4,5 8 kV ESD CDM Charge Device Model (CDM) Rating3,4 2.0 ESD MM Machine Model (MM) ESD Rating3,4 400 V TJ Operating Junction Temperature Range -40 to 150 C Ts Storage Temperature Range -65 to 150 TLEAD Maximum Soldering Temperature (at leads, 10sec) 300 MSL Moisture Sensitivity6 Level 1 Thermal Capabilities7 Symbol Description Value Units θJA Thermal Resistance – Junction to Ambient 100 C/W PD Maximum Power Dissipation at TA ≤ 25C 1.25 W ΔPD/C Derating Factor Above TA = 25C -10 mW/C

Ordering Information

Part Number Marking8 Operating Temperature OUT Pull-Down Package KTS1601EUM-TR9 KKYYZ -40°C to +85°C NO WLCSP-4, 1.0 x1.0 x 0.625 mm KTS1601EUM-1-TR JMYYZ YES 1. Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at conditions other than the operating conditions specified is not implied. Only one Absolute Maximum rating should be applied at any one time. 2. Limited by design 3. Guaranteed by design. 4. According to JEDEC standard JESD22−A108 5. This device series contains ESD protection and passes the following tests: Human Body Model (HBM) ±8.0 kV per JEDEC standard: JESD22−A114 for all pins. Machine Model (MM) ±400 V per JEDEC standard: JESD22−A115 for all pins. 6. Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: J−STD−020. 7. Junction to Ambient thermal resistance is highly dependent on PCB layout. Values are based on thermal properties of the device when soldered to a PCB board. 8. “YYZ” is the date code and assembly code. 9. Contact sales for availability

April 2019 – Revision 04b Page 4 Company Confidential Electrical Characteristics10 The Min and Max specs are applied over the full operation temperature range of -40°C to +85°C, VIN = 1.5V to 5.5V unless otherwise noted, while Typ values are specified at VIN = 4.5V and room temperature (TA = 25C) unless otherwise noted. Symbol Description Conditions Min Typ Max Units VIN Input Voltage Range 1.5 5.5 V IQ Quiescent Current VIN = 1.5V to 5.5V, EN = Active, IOUT = 0mA 14 A IQ_OFF No Load Quiescent Current VIN = 1.5V to 5.5V, EN = Inactive, OUT = OPEN 1.0 A ISD Shutdown Current VIN = 1.5V to 5.5V, EN = GND, OUT = GND, TA = -40°C to +85°C 4.0 A IEN_LEAK EN Input Leakage Current VEN = 5.5V, VIN = 0V -10 10 A VEN = 0V, VIN = 5.5V -1.0 1.0 RDS(ON) On-Resistance VIN = 5.5V, IOUT = 1A, TA = 25°C 19 mΩ VIN = 4.5V, IOUT = 1A, TA = 25°C 20 mΩ VIN = 3.3V, IOUT = 500mA, TA = 25°C 24 30 mΩ VIN = 2.7V, IOUT = 500mA, TA = 25°C 27 mΩ VIN = 1.5V, IOUT = 500mA, TA = 25°C 49 mΩ VIH EN Input Logic High Level VIN = 1.5V to 5.5V 1.15 V REN_DOWN EN Pull-down Resistor VIN = VEN = 1.5V to 5.5V, TA = -40°C to +85°C 6.38 7.65 8.86 MΩ ROUT_PD OUT Pull-down Transistor (-1) Only VEN = 0V, IOUT = 20mA 50 Ω IOUT_OUT VOUT Shutdown Current VEN = 0V, VOUT = 4.2V, VIN = Short to GND 1.0 A tDELAY_ON Turn-On Delay Time11,12 VIN = 4.5V, RLOAD = 5Ω, CLOAD = 100µF, TA = 25°C 1.7 ms tR VOUT Rise Time9,10 2.7 tON Turn-On Time9,10 4.4 tDELAY_ON Turn-On Delay Time9,10 VIN = 4.5V, RLOAD = 150Ω, CLOAD = 100µF, TA = 25°C 1.7 ms tR VOUT Rise Time9,10 1.5 tON Turn-On Time9,10 3.2 tDELAY_OFF Turn-Off Delay Time9,13 V = 4.5V, RLOAD = 150Ω, CLOAD = 100µF, TA = 25°C 1.8 ms tF VOUT Fall Time9,11 34 tOFF Turn-Off Time9,11 35 10. All specifications are 100% production tested at T A = +25°C, unless otherwise noted. Specifications are over -40°C to +85°C and are guaranteed by design 11. tDELAY_ON/tDELAY_OFF/TR/TF are defined in Figure 1 12. tON = tR + tDELAY_ON 13. tOFF = tF + tDELAY_OFF

Figure 1. Timing Diagram

April 2019 – Revision 04b Page 6 Company Confidential Typical Characteristics VIN = 5V, CIN = 0.1µF, COUT = 1µF, Temp = 25°C unless otherwise specified. Quiescent Current vs. Temperature Quiescent Current vs. Supply Voltage Shutdown Current vs. Temperature Shutdown Current vs. Supply Voltage On Resistance vs. Supply Voltage (IOUT = 500mA) On Resistance vs. Temperature (IOUT = 500mA) -40 -15 10 35 60 85 Quiescent Current (µA) Temperature (°C) VIN = 1.5V VIN = 2.5V VIN = 3.5V VIN = 5.5V Quiescent Current (µA) Supply Voltage (V) +25°C -40°C +85°C -40 -15 10 35 60 85 Shutdown Current (µA) Temperature (°C) VIN = 5.5V 0.0 0.5 1.0 1.5 2.0 2.5 Shutdown Current (µA) Supply Voltage (V) 100 On Resistance (mΩ) Input Voltage (V) +85°C +25°C -40°C 100 -40 -15 10 35 60 85 On Resistance (mΩ) Temperature (°C) VIN = 5.5V VIN = 3.5V VIN = 2.5V VIN = 1.5V

April 2019 – Revision 04b Page 7 Company Confidential Typical Characteristics (continued) VIN = 5V, CIN = 0.1µF, COUT = 1µF, Temp = 25°C unless otherwise specified. EN Pin Threshold vs. Supply Voltage Turn-On & Turn-Off Response In-rush Current Waveform (VIN = 4.5V, CIN = 10µF, COUT = 100µF, RL = 5Ω) (VIN = 5.0V, CIN = 10µF, COUT = 100µF, RL = Open) Turn-On Response Turn-Off Response (VIN = 4.5V, COUT = 100µF, RL = 150Ω) (VIN = 4.5V, COUT = 100µF, RL = 150Ω) 0.5 0.6 0.7 0.8 0.9 EN Pin Threshold (V) VIN (V) High Threshold Low Threshold IIN 500mA / div 2ms / div VOUT 2V / div VEN 2V / div VIN 2V / div IIN 100mA / div 2ms / div VOUT 2V / div VEN 2V / div 1ms / div VOUT 1V / div VEN 1V / div 2ms / div VOUT 1V / div VEN 1V / div

April 2019 – Revision 04b Page 8 Company Confidential Functional Block Diagram Gate Driver And Slew Rate Control Enable Logic Control Reverse Blocking EN IN OUT GND Option Functional Description The KTS1601 is an advanced slew-rate controlled high-side load switch comprised of a low resistance MOSFET power switch, level shift with slew -rate control logic and reverse blocking protection . The KTS1601 is a low resistance MOSFET power dist ribution switch designed to connect an external voltage, such as a DC power supply or battery, directly to the system. The high-side MOSFET is turned-on sequence is initiated via an active high, low voltage logic voltage signal. Once above the input threshold voltage, the MOSFET turn-on is slew-rate limited to avoid excessive current surges, due to high capacitance loads. By limiting the turn -on, large voltage over-shoot can also be avoided. Once fully on the MOSFET will provide a low resistance path to the load, both minimizing the voltage drop from IN to OUT, while keeping the power dissipation to a minimum . Should the voltage on the output of The KTS1601 switch, in the OFF state , be higher than the input voltage, Reverse Blocking circuitry will be activated to stem the flow of current preventing power supplies for discharging. The KTS1601 integrates a pull -down resistor on the enable pin to ensure that the device should remain OFF when the EN is left floating. An option of the KTS1601 adds an active pull-down (discharge) transistor between OUT and GND to discharge any voltage stored in the output capacitors to GND.

April 2019 – Revision 04b Page 9 Company Confidential

Application Information

The EN pin is compatible with active HIGH GPIO and CMOS logic voltage levels and operates over the 1.5V to 5.5V operating voltage range . The KTS1601 incorporates an internal pull -down resistor on the enable pin, to ensure that the device remains OFF, in the event that the pin is left floating. Reverse Current Blocking The KTS1601 implements reverse current blocking circuitry, to prevent reverse current flow through the switch. The reverse current blocking circuitry is active when the device is in the OFF state. Input Capacitor To limit the voltage drop on the input supply caused by transient inrush currents, an input bypass capacitor is recommended. A minimum capacitance of 1.0µF, must be placed as close as possible between pins VIN and GND) to be Compliant with IEC 61000−4−2 (Level 4). Higher value capacitors can further help to reduce the voltage drop. Ceramic capacitors are recommended for their ability to withstand input current surges from low impedance sources such as batteries in portable devices. Output Capacitor Depending on the sink current during system start -up and system turn -off, a capacitor must be placed on the output. A 1.0μF or larger capacitor across OUT and GND pins is recommended to accommodate load transient condition. This capacitor can also help to prevent parasitic inductance which can force the output voltage to fall below GND during turn -off. The output capacitor has minimal effect on The KTS1601’s turn-on slew-rate time. There is no requirement on capacitor type or it’s ESR. Inrush Current Inrush current occurs when the device is turned on. Inrush current is dependent on output capacitance and slew- rate control capability, as expressed by: Where: COUT - Output capacitance tR - Slew-rate or rise time at VOUT VIN - Input voltage VINITIAL - Initial voltage at COUT, usually GND ILOAD - Load current Higher inrush current causes higher input voltage drop, depending on the distributed input resistance and input capacitance. High inrush current can cause problems. The KTS1601 has a 2.7ms of slew -rate capability under 4.5V IN at 1000uF of C OUT and 5Ω of R LOAD so inrush current can be minimized and no input voltage drop appears. LOAD R INITIALIN OUTINRUSH It VVCI +−=

respectively. Using wide traces for input, output, and GND help reducing the case to ambient thermal impedance. Figure 2. KTS1601 Evalauation Board Layout (TOP Layer)

April 2019 – Revision 04b Page 11 Company Confidential Packaging Information WLCSP-4, 1.0mm x 1.0mm Package Recommended Footprint Kinetic Technologies cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Kinetic Technologies product. No intellectual property or circuit patent licenses are implied. Kinetic Technologies reserves the right to change the circuitry and specifications without notice at any time. WLCSP 1.0 x 1.0 1 X 0.500mm A1 Corner Top Side Die Coating Top View Bottom ViewSide View 0.620 ± 0.050mm 0.025 ± 0.003mm 1.00 ± 0.030mm 1.00mm ± 0.030mm

4 X Ø

0.310 ± 0.031mm 1 X 0.500mm 0.270 ± 0.027mm (NSMD Pad Type) * Dimensions are in millimeters. 0.50 Ø0.25 Copper Pad Diameter Ø0.35 Solder Mask Opening 0.50