KS8803B SAMSUNG | Alldatasheet

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Technical content

The KS8803B/4B are designed to select 10/15 channels of cordlss phone of which frequency band is 46/49MHz. It has reference frequency generator, programmable divid- er for transmit and receive section and phase detector.

FEATURES

  • 10 Channels selectable : KS8803B (both transmit/receive)
  • 15 Channels selectable : KS8804B (both transmit/receive)
  • Include oscillation circuit with external x-tal (10.24MHz)
  • 5KHz output for guard tone
  • Unlock detector (phase difference more than 6.25us)
  • Stand-by function for power saving BLOCK DIAGRAM Device Package Operating Temperature KS8803B 16-DIP-300A - 30°C ~ + 75°C KS8803BD 16-SOP-225 5 6 7 8 OSC IN OSC OUT PDT TIF SB D0 D1 D2 D3 MODE LDT RIF PDR VSSVDD REFERENCE DIVIDER PHASE DETECTOR (Tx) PHASE DETECTOR (Rx) PROGRAMMABLE DIVIDER (Tx) PROGRAMMABLE DIVIDER (Rx) DECODER UNLOCK DETECTOR VDD+ 16-DIP-300A

ORDERING INFORMATION

1 OSC OUT

  • This output generates reference frequency when it is connected to Pin 16 with external OSC of which frequency is 10.24MHz

2 MODE

  • Base/Remote Unit Selection Pin “High” : Base Unit “Low” : Remote Unit 3 SB
  • Stand-by pin
  • This input controls Tx PLL for reducing the power dissipation “High” : Normal operation “Low” : Stand-by

4 F1 • 5KHz output

  • Channel selection pins
  • The Combinations of these inputs select one channel among the 10/15 channels

9 TIF

  • Input to programmable divider of Tx
  • AC coupling with VCO
  • In case of lager signal, It needs DC-coupling
  • Min. input voltage is 0.1Vrms

10 LDT • Unlocked signal out pin

(see output charateristics)

11 PDT

  • Phase detector output for Tx
  • PDT detects the phase error from Tx PLL and its output is connected to external low pass filter

12 VSS

  • This pin is negative supply of the IC.
  • It usually grounded

13 PDR

  • Phase detector output for Rx
  • PDR detects the phase error from Rx PLL and its output is connected to external low pass filter

14 RIF

  • Input of programmable divider for Rx.
  • AC coupling with VCO
  • In case of lager signal (standard CMOS logic), it needs DC coupling
  • Min. input voltage is 0.1Vrms

15 VDD

  • This pin is positive supply of the IC
  • Its reference is VSS, and normally + 3.0V ~ + 5.5V more positive than VSS

16 OSC IN

  • X-TAL osc connection pin
  • This input generates the reference frequency when it is connected to pin 1 with external osc

ABSOLUTE MAXIMUM RATING ES (Ta = 25°C) ELECTRICAL CHARACTERISTICS (Ta = 25°C, VDD = 5V, unless otherwise specitied) Characteristic Symbol Value Unit Supply voltage Input Voltage Power Dissipation Operating Temperature Storage Temperature VDD VI PD TOPR TSTG - 0.5 ~ 6.0 - 0.3 ~ VDD + 0.5 350 - 30 ~ + 75 - 40 ~ + 125 V V mW Characterostoc Symbol Test Conditions Min Typ Max Unit Supply Voltage VDD - 3 - 5.5 V VIH1 D0 - D3, SB 0.7VDD - VDD V VIL1 D0 - D3, SB - - 0.3VDD V VIH2 MODE 0.9VDD - VDD V VIL2 MODE - - 0.1VDD V fI1 VTIF = 0.15Vrms 10 - 52 MHz Input Frequency fl2 VRIF = 0.15Vrms 30 - 42 MHz fI3 OSCIN = 0.3Vrms 5 10.24 11 MHz VI(AMP)1 fTIF = 52MHz 0.1 - 0.3VDD Vrms Input Amplitude VI(AMP)2 fRIF = 42MHz 0.1 - 0.3VDD Vrms VI(AMP)3 OSCIN = 11MHz 0.3 - 0.3VDD Vrms IIH VIN = VDD - - 40 µA IIL VIN = VSS - - 40 µA Input Voltage Input Current

ELECTRICAL CHARACTERISTICS (Ta = 25°C, VDD = 5V, unless otherwise specified)

  • NOTE 1) OSCIN : 10.24MHz X-tal Connection TIF : 27MHz 150mVrms RlF : 42MHz 150mVrrns MODE : V DD, SB = VDD, others are opened
  • NOTE 2) OSCIN : 10.24MHz X-tal Connection TlF : 27MHz 150rnVrms RIF : 42MHz 150mVrms MODE : V DD, SB = VSS, others are opened
  • Capacitor more than 2000pF should be connected between VDD & VSS Characteristic Symbol Test Conditions Min Typ Max Unit VOH1 PDT, RDR : IO = 0.5mA VDD-1.0 - - V VOL1 PDT, RDR : IO = 0.5mA - - 1.0 V VOH2 LDT : IO = 1mA VDD-1.0 - - V VOL2 F1 : IO = 1mA - - 1.0 V Output OFF Leakage ILKG1 PDT, PDR : VO = VDD/VSS - 0.01 1.0 µA Current ILKG2 LDT : VO = VSS - - 5.0 µA ISB1 VDD = 3V (Note 2) - 1.0 2.0 mA ISB2 VDD = 3V (Note 2) 3.5 4.0 - mA IDD1 VDD = 3V (Note 1) - 2.0 3.0 mA IDD2 VDD = 5V (Note 1) - 6.0 7.0 mA Output Voltage Stand-by Current Operating Current

1) LOCK Reference Divider Programmable Divider LDT 2) UNLOCK Reference Divider Programmable Divider LDT tPD tPD tPD : Phase Difference ( 6.25µs ) VDD VSS VDD VSS Floating VDD VSS VSS VDD VDD Floating6.4ms

TABLE 1. Channel & Frequency table to Base/Remote input data tor KS8803B (10CH)

TABLE 2. Channel & Frequency table to Base/Remote input data tor KS8804B (15CH)

Divider ( TX ) Programmable Divider ( RX ) Phase Detector ( TX ) REF. DIVIDER Phase Detector ( RX ) to MICOM ( Unlock Detect ) X - TAL 10.24MHz VDD BASE REMOTE 3 4 VDD : TX PLL ENABLE VSS : TX PLL DISABLE to MICOM ( D0, D1, D2, D3 ) 5.0KHz BPF BPF 1’st MIX 2’nd MIX RX VCO 911 TX VCO 46.610MHz ( R ) 49.670MHz ( B ) 10.695MHz 49.670MHz ( R ) 46.610MHz ( B ) 455KHz 39.915MHz 38.975MHz ( B ) 10.24MHz ANT ( R ) : REMOTE UNIT ( B ) : BASE UNIT 15 12 5 6 7 8 VDD