KDA0316 SAMSUNG | Alldatasheet

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INTRODUCTION 20.01P-200A ‘The KDA0316 is a CMOS 16-bit digital-to-analog con- verter for compact disc player that uses a dynamic level ‘shift conversion method combining R-string, Pulse ‘Width Modulation and level shift. FEATURES y © 2's complement serial data input fn + Contains bo chemnal DIA converte '* Can output L out and R out in phase + To 176.4KHz maximum sampling frequency 20-SOP-375A '* (comesponding to four oversampling) © Sigate CMOS process (low power consumption)

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© Built-in test circuit for PWM DAC © Output swing level can be adjusted by t) the Vp input voltage: » MSB first and LSB first mode of input digital audio data is available: TYPICAL APPLICATIONS * Portable cassette radios with CDP * Home audio component systems * Electronic keyboards ORDERING INFORMATION Music centers. ‘carer [—Sevics [rnb qwani6e)| Package | Tomperaturs Rang | Max Oversampiing | froansiewn [005 [a5 o¥p-2008 [koacsien —[ 000 — | [koaosie.0 | 005 | aesopars [koacsi60 [0.09 | Fs: sampling frequency (44.1KHz) PIN CONFIGURATION Dual-in-line Package & ‘Smail Outline Package ver) () now vue) @) ve @) C*) vem omeQ (®) s0r0 vee) Onn use(s) (*) 208 woon(?) () ont) ©) wo?) @. ov,() (*) ran eSSsSeSeSSSSSSSSSSSSSSSSSSSSSSSSFFFeesesee mM 7964142 0039474 bTb Me

Vp, TOPT Vp, BTM LouT Vrtorz Vem ROUT BIT CK o WOCK1 o TIMING PM PWM WOCK2 0] GENERATOR SWITCH SWITCH LRCK o MS 0 SHIFT POTENTIOMETRIC POTENTIOMETRIC vame ma t-cH R-CH LATCH LATCH ‘ELECTRONICS Mm 7964142 0039475 532 me

ABSOLUTE MAXIMUM RATINGS (Note 1 & 2) Supply Voltage Voo 703-470 Vv Input Voltage Ve 03~Voo +0.3 v Output Vottage Vour 03 ~Voo +0.3 v Operating Temperature Range Vege -30~ +75 °C Storage Temperature Range Tos 40~ +125 °c ESD Susceptibility (Note 3) Veso +900 v Latch-up Current Ve 50 mA RECOMMENDED OPERATING CONDITIONS. |__eveswrnses [set Twn [ve [we Toe ‘Supply Voltage Voo 45 55 Vv Operating Temperature Range Toe 30 15 *c Input “H” Voltage Vow 22 Voo +0.3 v Input “L Voltage Ve 03 os v Reference “H" Voltage Varo° Voo-0.5 oo v Reference “L" Voltage Vas 0 05 v Sampling Frequency fo 176.4 KHz

ELECTRICAL CHARACTERISTICS

(Converter Specifications: Voo = SV, Var H # SV, Viv = A GND, MS * OV, fs = 176.4KHz, Ta = 25°C, Unless otherwise noted.) |__crwcirnace [ symvet | vsiconone [wn [te [wor [umn | | 3s | gree fe] | MS = OV or 5V 0081 Data = 1kHz, dB 0.08 Total Harmonic Distortion | THO Fy oy orev [omsiemoe | | | | [ Detas tHe ogee Voo = 4.5V Da 08 || Signat to Noise Ratio MS =5V [omens | | | MS = 5V, Voo = 45V [ crosstaie Tct | dates tere. ogs as “4: User's option value (KDA0S16LN, KDA0316LD) Note 1: ABSOLUTE MAXIMUM RATINGS are those values beyond which the life of the device may be impaired. Normal operation is not guaranteed at these extremes. ‘Note 2: Ail voltage are measured with respect to the GND, unless otherwise noted. The separate A GND point should ‘always be wired to the D GND. ‘Note 3: 100pF discharged through a 1.5K resistor, a ———— Me 756442 OO3947b 475

TIMING DIAGRAM 1 (When Ms = *H") a a - FSBBRBSSORCRROAD FOSORCRORCCRCE fe SC i OD wf a 5 CD = “== at AAT wc et ECR wl sxrcx «asa wae tance: mare TIMING DIAGRAM 2 (when MS = °L") a a -__ Pe OROOROSECOOEGER ARC i ig i a | ~JI a + aa “25 owt Levee RELATE wn 84 a eroczteonie we raon isha: Sa «mr y M@™ 7964342 0039477 305 mm

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  1. Calling for Digital Audio Data Digital audio data is a 16-bit serial 's complement signal. The KDA0S16 corresponds to MSB first code or LSB first code of digital audio data: the mode can be changed by the level of the MS pin. Data through the DATA pin is applied to the LCH latch and RCH latch of the two D/A converters built in the separate LCH and RCH. (1) When MSB First (MS =“H” level) (see Timing Diagram 1) Digital audio data is carried in MSB first sequence from the data pin to the Shift Register in synchronization with the BIT CK rising edge (Data transition occurs at the BIT CK falling edge.). LCH data and RCH data are cartied to the LCH latch and RCH latch by both the LCH latchable (L-CHLATE) and RCH latchable (R-CHLATE). (2) When LSB First (MS =“L” level) (see Timing Diagram 2) Digital audio data is carried in LSB first sequence from data pin to Shift Register in synchronization with BIT CK falling edge (Data transition is occurred at the BIT CK falling edge.). LCH data and RCH data are carried to the LCH latch and RCH latch by both the LCH tatchable (L-CHLATE) and RCH latchable (R-CHLATE). 2. D/A Conversion Circuit (see Fig. 1) ‘The KDA0316 has two D/A conversion circuits in the LCH and RCH independently. The two conversion methods are the same: a Complex Potentiometric Method, combining Resistor-Ladder D/A conversion, PWM (Pulse Width Modulation) D/A conversion, and Variable Resistor D/A conversion. After storing in the latch, the upper 9 bits of data (D15 ~ D7) inputs into the Resistor-Ladder DAC, the middie 3 bits of data (D6 ~ D4) into the PWM DAC and the lower 4 bits of data (D3 ~ D0) into the Variable Resistor DAC of the whole 16 bits of digital audio data (D15 ~ D0), respectively. ‘The Digital audio data of the LCH and RCH, which were inputted by the time division multiplexing method from the DATA pin, synchronize with the conversion clock and after being converted by the D/A converters the respective ‘analog signals in phase are outputted from the L OUT and R OUT pins. (1) Resistor-Ladder DAC ‘The G-bit D/A conversion circuit, which has @ 512 (= 2°) unit resistor string, divides the whole voltage (Varop. Vem) across a Resistor-Ladder into 512 steps. The two adjoining Va and Vb of the whole voltage, which are divided into 512 steps according to the upper 9 bits of data (D15 ~ D7), are outputted by @ switching circuit of PWM DAC, where Vb-Va = (Vezop - Ve aruV512. (2) PWM DAC ‘The 3-bit PWM DAC makes the differential voltage between Va and Vb, which is applied from a Resistor-Ladder DAC, divided into 8 steps by pulse width modulation. According to the value of the upper 3 bits of data (D6 ~ D4), Va and Vb is outputted through the LCH or RCH terminal, A PWM DAC clock uses the BIT CK, and a relationship of sampling frequency and BIT CK frequency is shown in the Timing Diagrams. (3) Variable Resistor DAC ‘The 4-bit Variable Resistor DAC has two variable resistors, VRrop and VRenu. in series with the Resistor-Ladder. According to the lower 4 bits of data (D3 ~ DO), VRrop and VRaru vary @s follows: 1) Irrespective of the value of data, (VRrop + VRenu) is constant. 2) According to the value of data, VRrop and VRenw ranges from zero to 15R/128 (R is a unit resistor of the Resistor-Ladder): in R/128 steps, Therefore according to the lower 4 bits of data (D3 ~ 00), Va and Vb of an R-string DAC outputs range from zero to 154V/128 (AV = (Vroe - Veru’512} in A V/128 stops. ELECTRONICS: me 7964142 0039479 148 a

=—_—n CA CONVERTER 3. How to Use Ve(see Fig. 1) ‘Vr, the reference voltage across a Resistor-Ladder, is usually recommended with Va ror 1 = 5V, Var = OV, One way of avoiding an amplitude mismatching between the V_ and OP amp input connected to the output of the KDA0316 is to reduce the analog output amplitude with Vp.rop2 * 5V and Vesnu2 = OV (at this time about ‘47uF ~ 100yF capacitors should be connected from Ve.ror 1 and Vesnwt to GND.). By the effect of built-in Rrop and Renu with this choice, the maximum analog output amplitude results in a narrow range of about 1.5 ~ 3.5V for 0d8. playback. . Yaron © ed Le ce oe = “ bse [ws ne Low 4 ie Verne O———— Ea sagem ete 3 Fae anes Fig. am aecmowucs mm 7964142 0039480 47T

co} Gian Jind Sal ° C) ee <© oN a ae pote “ Te. Ted | - : t= =o elo37 Ted ple 1G ne .o CS LPF : low pass filter (Ic=20KHz) on Ge) om ra Voo = 5V co one Vr=5V Toten san @) woe ° C) wm «® (Nl Onn vem G) ABP Lael [F f-o1or ve oe Om we rT ° ro oI dom we |+3- “Sh| SE /t6- ~d- > ° Ce" ~® b LPF : low pass filter ((c=20KH2) ° (5) eve, wr | so Voo = 5V = odio Va = 5V eo roted son @) hao EG) wn =@ “f° ir an ee “OJ pl ad a. ee oe re= OT eloer isd] tle ° LB we oe >. LPF : low pass filter (fc=20KHz) on LG) ove rr) | Voo = 5V mor S ode Yon a Me 7964142 0039 48) 836 i 82051

Dimensions in Milimeters/Inches 18-DIP-300B ae 218 #10 ee a 38 — |

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Dimensions in Milimeters/inches 20-SOP-300 Og. #20 att ARAAAAAAgoaASA Hoo on —U UO oo of g 2|8 ae) oals = po HHYHUUUoOoog$ UOoOGoO0obUEHE od at 210 i 16.10 010 8|s jece MAX 0.20" 05 She SSS. ——— gi ° 0008 °3 302 38/ 13704020 38] 3 0539-0008 gis. eg rr Ce} O70 FAK HA 1% 0.40. z rcs 0.016 -0002 ae 20-SOP-375 8 ae 220 eM HHAAAAAAA, UU oon pit ti tt ti fi tt i} als 38 A sls HHHUUEEOoo UU0U0GDCOdOoOoO . > 1 310 . 02038 alg _ _osntx _ alg] x 0.008 °3985 sg 777 gig} 3 iS

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