KB9223 SAMSUNG | Alldatasheet
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Technical content
RF AMP & SERVO SIGNAL PROCESSOR KB9223 / KB9223-L M/M-97-P006 1997. 10. 17 80-QFP-1420C
ORDERING INFORMATION
APPLICATIONS
- CD Player
- Video-CD RELATED PRODUCT
- KS9286 Data Processor
- KS9284 Data Processor
- KA9258D/KA9259D Motor Driver Device Package Tempe. Range KB9223 80-QFP-1420C -20 °C ~ +70 °C KB9223-L OVERVIEW The KB9223 is a 1-chip BICMOS integrated circuit to per- form the function of RF amp and servo signal processor for compact disc player applications.It consist of blocks for RF signal processing ,focus, tracking, sled and spindle servo.Also this IC has adjustment free function and embed- ded opamp for audio post filter.
FEATURES
- RF amplifier & RF equalizer
- Focus error amplifier & servo control
- Tracking error amplifier & servo control
- Mirror & defect detector circuit
- Focus OK detector circuit
- APC(Auto Laser Power Control) circuit for constant laser power
- FE bias & focus servo offset adjustment free
- EF balance & tracking error gain adjustment free
- Embedded audio post filter
- The circuit for Interruption countermeasure
- Double speed play available
- Operating voltage range KB9223 : 5V KB9223-L : 3.4V
Figure 1. Block diagram
Figure 2. Pin configuration
Table 1. PIN DESCRIPTION
1 MCP Capacitor connection pin for mirror hold
2 DCB Capacitor connection pin for defect Bottom hold
3 FRSH Capacitor connection pin for time constant to generate focus search waveform
4 DCC2 The input pin through capacitor of defect bottom hold output
5 DCC1 The output pin of defect bottom hold
6 FSET The peak frequency setting pin for focus,tracking servo and cut off frequency of CLV
7 VDDA Analog VCC for servo part
8 VCCP VCC for post filter
9 GC2I Amplifier negative input pin for gain and low pass filtering of DAC output CH2
10 GC2O Amplifier output pin for gain and low pass filtering of DAC output CH2
11 CH2I The input pin for post filter channel2
12 CH2O The output pin for post filter channel2
13 CH1O The output pin for post filter channel1
14 CH1I The input pin for post filter channel1
15 GC1O Amplifier output pin for gain and low pass filtering of DAC output CH1
16 GC1I Amplifier negative input pin for gain and low pass filtering of DAC output CH1
17 RRC The pin for noise reduction of post filter bias
18 VSSP VSS for post filter
19 MUTEI The input pin for post filter muting control
20 ISET The input pin for current setting of focus search,track jump and sled kick voltage
21 VREG The output pin of regulator
22 WDCK The clock input pin for auto sequence
23 SMDP The input pin of CLV control output pin SMDP of DSP
24 SMON The input pin for spindle servo ON through SMON of DSP
25 SMEF The input pin of provide for an external LPF time constant
26 FLB Capacitor connection pin to perform rising low bandwidth of focus loop
27 FS3 The pin for high frequency gain change of focus loop with internal FS3 switch
28 FGD Reducing high frequency gain with capacitor between FS3 pin
29 LOCK Sled runaway prevention pin
30 TRCNT Track count output pin
31 ISTAT Internal status output pin
32 ASY The input pin for asymmetry control
33 EFM EFM comparator output pin
34 VSSA Analog VSS for servo part
35 MCK Micom clock input pin
36 MDATA Micom data input pin
37 MLT Micom data latch input pin
38 RESET Reset input pin
39 MIRROR The mirror output for test
40 FOK The output pin of focus OK comparator
61 TGU The capacitor connection pin for high frequency tracking gain switch
62 TG2 The pin for high frequency gain change of tracking servo loop with internal TG2 switch
63 FEBIAS Focus error bias voltage control pin
64 DVEE The DVEE pin for logic circuit
65 PD1 The negative input pin of RF I/V amplifier1(A+C signal)
66 PD2 The negative input pin of RF I/V amplifier2(B+D signal)
67 F The negative input pin of F I/V amplifier (F signal)
68 E The negative input pin of E I/V amplifier(E signal)
69 PD The input pin for APC
70 LD The output pin for APC
71 VR The output pin of (AVEE+AVCC)/2 voltage
72 VCC VCC for RF part
73 RF- RF summing amplifier inverting input pin
74 RFO RF summing amplifier output pin
Table 1. PIN DESCRIPTION (Continued)
75 IRF The input pin for AGC
76 EQO The output pin for AGC
77 RFI Tne input pin for EFM comparision
78 EQC The capacitor connection pin for AGC
79 EI Feedback input pin of E I/V amplifier for EF Balance control
80 GND GND for RF part
RF AMP & SERVO SIGNAL PROCESSOR KB9223 / KB9223-L M/M-97-P006 1997. 10. 17 ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
Table 2. Absolute Maximum Ratings Table 3. Electrical Characteristics
Table 3. Electrical Characteristics (Continued)
Low voltage test for post filter.
Figure 3. Test Circuit
1.1 RF Amplifier
(A+B+C+D) signal, is outputted through RFO(pin74) and the eye pattern can be checked at this pin. Figure 4. RF amp circuit
1.2 Focus Error Amp
from the range of +100mV ~ -100mV by connecting the resistor on pin 63 (FEBIAS). Figure 5. Focus error amp circuit note1> VA and VB refer to output signal of PD1 and PD2 I/V amp.
1.3 Tracking Error Amp
generates the difference between E I-V AMP and F I-V AMP voltage output. can be adjusted automatically by controlling the peak voltage at pin TE2 by micom program. Figure 6. Tracking error amp circuit
1.4 Focus OK Circuit
Figure 7. Focus OK circuit
1.5 Mirror Circuit
constant for the mirror hold must be sufficiently larger than that of the traverse signal. Figure 8. Mirror Circuit
1.6 EFM Comparator
The EFM comparator converts a RF signal into a binary signal. Figure 9. EFM Comparator & asymmetry circuit
1.7 Defect Circuit
The RFO signal bottom, after being inverted, is held with two time constants of long and short. Figure 10. Defect Circuit
1.8 APC (Auto Power Control) Circuit
Figure 11. APC Circuit
1.9 AGC Stability Circuit
p, and inputted to EFM Slice. Figure 12. AGC block
1.10 Post Filter
Figure 13. Post Filter circuit
1.11 Center Voltage Generation Circuit
75 VCA EQUALIZE 78
2.1 Focus Servo Block
servo loop is on and the focus error signal from FE2 pin(pin 58) is outputted through the focus servo loop. Figure 15. Focus servo block
2.2 Tracking Servo Block
controlled by TM7 switch of break circuit. occasionally unstable. Hence unnecessary jumping with many tracking error should be prevented. Figure 16. Tracking servo block
2.3 Sled Servo Block
The moving of pick-up is controlled by tracking servo output through a low pass filter. The sled kick voltage is outputted for track jump operation. Figure 17. Sled servo block
2.4 Spindle Servo Block
Figure 18. Spindle servo block
3.1 Description
2~4 micom command by one auto-sequence command. Figure 19. CPU serial interface timing chart Table 4. CPU serial interface timing characteristics
3.2 Micom Command Set
Table 5. Servo control command set
3.2.1 Focus Control($0X)
This command consists of 8 bits data and expressed by two hexa $0X. $02:FS2 switch become off and the value of servo output pin is as below. $03:If FS1 switch is 1, the current supply is cut off and the discharge is performed. Figure 20. Waveform at pin 3 when FS1 is switched from 0 to 1 The waveform of servo output pin according to FS1 and FS2 switches is as below. Figure 21. Focus search waveform at pin 48 by $02 and $03
RF AMP & SERVO SIGNAL PROCESSOR KB9223 / KB9223-L M/M-97-P006 1997. 10. 17
3.2.2 Tracking Control($1X)
This command is used for tracking loop gain control, break circuit and anti-shock on/off control. TG2 and TG1 are internal switch for tracking gain set.
3.2.3 Tracking mode($2X)
This command is used for tracking and sled servo on/off and jump for searching track. <Tracking control & Sled control>
3.2.4 Peak value set($3X)
This command is used for the peak value setting of focus search and sled kick . D0,D1:Sled kick D2,D3:Focus search peak value
3.2.5 Auto Sequencer command($4X)
This command is used for reducing control time and replacing several command by one auto- sequence command.
- Auto sequencer mode is performed from the first falling edge of WDCK clock after the falling of the latch pulse.
- Auto sequencer does not carry out tracking gain up,brake,anti-shock and focus gain down.
- Micom checks ISTAT pin(/BUSY) and sends to $40 command to reset preceding auto sequencer status D7 D6 D5 D4 D3 D2 D1 D0 ISTAT 0 0 0 1 Anti shock on/off Break circuit on/off TG2 TG1 Anti shock D7 D6 D5 D4 D3 D2 D1 D0 ISTA T 0 0 1 0 Tracking control Sled control TZC D3 D2 Tracking mode D1 D0 Sled mode 0 0 Tracking servo off 0 0 Sled servo off 0 1 servo on 0 1 servo on 1 0 Forward jump 1 0 Forward kick 1 1 Reverse jump 1 1 Reverse kick
3.2.6 RAM Set($5X~$7X)
This command is used for auto control of offset,balance,gain adjustment and reference voltage setting. . This command is also in control of on/off and sub type of laser diode and test or set mode.
4.1 Tracking balance ($800~$81F)
Table 6. Auto sequence command
1 Track jump $48
10 Track
Table 7. RAM set table
RF AMP & SERVO SIGNAL PROCESSOR KB9223 / KB9223-L M/M-97-P006 1997. 10. 17
4.2 Tracking gain ($820~$83F)
4.3 Tracking balance & gain window level setting
- The tracking balance and gain window level is set by D2,D3 data and the value has two kinds of window levels set
4.3.1 Tracking balance window level
4.3.2 Tracking gain window level
4.4 Focus loop offset adjustment start command($841,$842)
This command is used for adjusting focus error bias and removing focus servo offset. This command is executed during laser diode off.
4.5 APC circuit operation and Interruption on/off setting condition($85X)
This command is used for setting of laser diode on/off ,sub type(P_sub or N_sub) of laser diode and interruption countermeasure circuit on/off . Item Hexa Data(5bits) initial value ISTAT(pin31) TRCNT(pin30) Tracking gain $820~$83F D4~D0 $820 GAIN TGL Item Hexa D3 D2 D1 D0 initial value window level setting $84X gain balance 0 0 $840 D2 data 0 1 Tracking balance window level -10~+15mV -20~+20mV D3 data 0 1 Tracking gain window level 250~400mV 150~300mV Hexa command meaning $841 Focus error bias adjustment start command $842 Focus servo offset cancel adjustment start command Item Hexa D3 D2 D1 D0 initial value APC & Interruption on/off condition $85X LD on/off 0 : On 1 : Off Sub-type 0:N_sub 1:P_sub Interruption ON/OFF and time setting $858
RF AMP & SERVO SIGNAL PROCESSOR KB9223 / KB9223-L M/M-97-P006 1997. 10. 17
4.5.1 Time setting for Interruption countermeasure circuit on/off
4.6 Focus servo offset reset command and set mode command (86X)
This command is used for set and release before focus servo loop offset adjustment and mode change. (note1) The set mode command is sent by micom right after tracking gain is tuned. (note2) The ISTAT pin is outputted the internal status of $00 ~ $7X command.
4.7 Direct command(DIRC) and focus bias reset command($87X)
This command is used for direct 1 track jump on/off setting and focus bias adjustment set and release D1 D0 Meaning 0 0 Countermeasure circuit on for all mirror signal 0 1 Countermeasure circuit on up to 20KHz mirror signal 1 0 Countermeasure circuit off 1 1 Countermeasure circuit on up to 10KHz mirror signal Item Hexa D3 D2 D1 D0 Set mode focus servo offset reset command $86X 0:offset release 1:offset reset option (Pin41 output) 0:Defect 1:SSTOP 1 1 Item Hexa D3 D2 D1 D0 DIRC focus bias reset $87X 0:DIRC On 1:DIRC Off 0:reset 1:reset release X X
5.1 Focus Error Bias & Servo Offset Cancel Adjustment
Figure 22. Focus error bias & servo offset cancel adjustment flow chart
5.2 Tracking Balance Adjustment
Figure 23. Tracking balance adjustment flow chart
5.3 Tracking Gain Adjustment
Figure 24. Tracking gain adjustment flow chart
Figure 25. Application circuit