J174 CALOGIC | Alldatasheet
Document overview
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Technical content
J174 – J177 / SST174 – SST177
FEATURES
- • Low Insertion Loss
- • No Offset or Error Generated By Closed Switch -Purely Resistive -High Isolation Resistance From Driver
- • Short Sample and Hold Aperture Time
- • Fast Switching
APPLICATIONS
- • Analog Switches
- • Choppers
- • Commutators ABSOLUTE MAXIMUM RATINGS (TA = 25oC unless otherwise specified) NOTE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ORDERING INFORMATION
Part Package Temperature Range J174-J177 Plastic TO-92 -55 oC to +135oC SST174-SST177 Plastic SOT-23 -55 oC to +135oC For Sorted Chips in Carriers see 2N5114 series. CORPORATION PIN CONFIGURATION TO-92 SGD SOT-23 G S D PRODUCT MARKING (SOT-23) SST174 P04 SST175 P05 SST176 P06 SST177 P07 5508
ELECTRICAL CHARACTERISTICS (TA = 25oC unless otherwise specified) SYMBOL PARAMETER J174 J175 J176 J177 UNITS TEST CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX IGSS Gate Reverse Current (Note 1) 1111 n A VDS = 0, VGS = 20V VGS(off) Gate Source Cutoff Voltage 5 10 3 6 1 4 0.8 2.25 V VDS = -15V, ID = -10nA BV GSS Gate Source Breakdown Voltage 30 30 30 30 V DS = 0, IG = 1µA IDSS Drain Saturation Current (Note 2) -20 -135 -7 -70 -2 -35 -1.5 -20 mA V DS = -15V, VGS = 0 ID(off) Drain Cutoff Current (Note 1) -1 -1 -1 -1 nA V DS = -15V, VGS = 10V rDS(on) Drain-Source ON Resistance 85 125 250 300 Ω VGS = 0, VDS = -0.1V C dg(off) Drain-Gate OFF Capacitance 5.5 5.5 5.5 5.5 pF VDS = 0, VGS = 10V f = 1MHz (Note 3)C sg(off) Source-Gate OFF Capacitance 5.5 5.5 5.5 5.5 C dg(on) + Csg(on) Drain-Gate Plus Source Gate ON Capacitance 32 32 32 32 VDS = VGS = 0 td(on) Turn On Delay Time 2 5 15 20 ns Switching Time Test Conditions (Note 3) J174 J175 J176 J177 VDD -10V -6V -6V -6V VGS(off) 1 2 V 8 V3 V3 V R L 560Ω 12kΩ 5.6kΩ 10kΩ VGS(on) 0V 0V 0V 0V tr Rise Time 5 1 02 02 5 td(off) Turn Off Delay Time 5 1 01 52 0 tf Fall Time 10 20 20 25 NOTES: 1. Approximately doubles for every 10oC increase in TA. 2.Pulse test duration -300µs; duty cycle ≤3%. 3.For design reference only, not 100% tested.